ARINC 429, "Mark33 Digital Information Transfer System (DITS)," is also known as the Aeronautical Radio INC. (ARINC) technical standard for the predominant avionics data bus used on most higher-end commercial and transport aircraft. It defines the physical and electrical interfaces of a two-wire data bus and a data protocol to support an aircraft's avionics local area network. Technical description Medium and Signaling ARINC 429 is a data transfer standard for aircraft avionics. It uses a self-clocking, self-synchronizing data bus protocol (Tx and Rx are on separate ports). The physical connection wires are twisted pairs carrying balanced differential signaling. Data words are 32 bits in length and most messages consist of a single data word. Messages are transmitted at either 12.5 or 100 kbit/s to other system elements that are monitoring the bus messages. The transmitter constantly transmits either 32-bit data words or the NULL state (0 Volts). A single wire pair is limited to one transmitter and no more than 20 receivers. The protocol allows for self-clocking at the receiver end, thus eliminating the need to transmit clocking data. ARINC 429 is an alternative to MIL-STD-1553. Bit numbering, Transmission Order, and Bit Significance The ARINC 429 unit of transmission is a fixed-length 32-bit frame, which the standard refers to as a 'word'. The bits within an ARINC 429 word are serially identified from Bit Number 1 to Bit Number 32 or simply Bit 1 to Bit 32. The fields and data structures of the ARINC 429 word are defined in terms of this numbering. While it is common to illustrate serial protocol frames progressing in time from right to left, a reversed ordering is commonly practiced within the ARINC standard. Even though ARINC 429 word transmission begins with Bit 1 and ends with Bit 32, it is common to diagram and describe ARINC 429 words in the order from Bit 32 to Bit 1. In simplest terms, while the transmission order of bits (from the first transmitted bit to the last transmitted bit) for a 32-bit frame is conventionally diagrammed as First bit > 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, ... 29, 30, 31, 32 < Last bit, this sequence is often diagrammed in ARINC 429 publications in the opposite direction as Last bit > 32, 31, 30, 29, ... 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 < First