Alchemy is a family of ultra low power embedded microprocessors originally designed by Alchemy Semiconductor for communication and media devices. Alchemy processors are SoCs integrating a CPU core, a memory controller, and a varying set of peripherals. All members of the family use the Au1 CPU core implementing the MIPS32 instruction set by MIPS Technologies. History Alchemy Semiconductor was a fabless semiconductor company based in Austin, Texas. Founded in 1999 with a seed investment by Cadence Design Systems it licensed the 32-bit MIPS architecture to design, develop, and market high performance, ultra low power SoCs for the Internet Edge Device market. Peripherals were licensed from third parties. The founding team included former members of DEC's Austin Research and Design Center working on the StrongARM project, dissolved after DEC sold its microprocessors business to Intel. In May 2000 Alchemy Semiconductor became an independent company. Alchemy Semiconductor unveiled the first member of the family, the Au1000 processor, at the Embedded Processor Forum in San Jose, CA, on June 13, 2000, with limited customer sampling in February 2001 and availability in production quantities in Q2 of that year, followed in 2001 and 2002 by the Au1500 and Au1100. In February 2002 AMD acquired Alchemy in order to compete with Intel's ARM-based XScale processors, successor to the StrongARM line. They expanded the family with the Au1550 Security Network Processor and the Au1200 processor optimized for PMP applications, as well as the Am1772 wireless chipset consisting of the Am1770 transceiver and Am1771 integrated baseband/MAC chips. In Summer 2006 AMD sold its Alchemy assets to Raza Microelectronics, later renamed RMI Corporation. This company introduced the Au1210 and Au1250, based on and pin-compatible with the Au1200, and finally in 2009 the Au1300 series integrating a graphics processor. RMI merged with NetLogic Microsystems in late 2009, itself acquired by Broadcom Corporation in February 2012. Broadcom continued to sell Alchemy processors, if only under long term availability obligations, until at least 2017. Au1 CPU core The Au1 CPU core designed by Alchemy implements the MIPS32 ISA Release 1 and supports the MIPS EJTAG interface. A floating-point unit is not present, FP instructions generate an exception and can be emulated by software. Code compression (MIPS16) and the optional Supervisor Mode were also omitted. Virtual address translation is TLB-based and relies on a fast exception handler rather than a hardware table walker. The core supports eight interrupt sources with prioritization by