DC coupled. The filtered analog signal passed through a custom sample and hold and was digitized by an Analogic MP8016 16-bit Analog-to-Digital Converter operating at a 50 kHz sample rate. A three-bit sync pattern and an even-parity bit were added to each 16-bit sample to form a 20-bit word that was serialized and transmitted by interface electronics to the tape transport where each audio channel's data were written to two separate tape tracks. The two tracks are laterally separated by ~ 11mm on the 1" tape thus avoiding the same tape dropout from affecting both tracks containing identical channel information. Encoding of the 16 bit audio at the time of recording inverts every other audio bit in order to minimize DC going to tape (magnetic channel) in quiet passages when the MSB's were mostly zeros. Another effect of the encoding process was to increase AC in the channel code to aid in clock recovery (bit sync) on playback. The every other bit inversion encoding process is reversed on playback so there is no effect on audio quality. During tape playback or while recording and monitoring from tape, the redundant tracks of recorded data from the transport were sent to data recovery circuitry. The first stage of data recovery was the data slicer which automatically detected and adjusted to the ideal threshold for detecting the zero crossings of the magnetic channel data. This reduced clock recovery jitter. Because the data recorded on tape are necessarily bandwidth-limited, the data slicer squared-up the data signals into binary logic level signals and then recovered clocks to match the incoming data streams. Additional circuitry located word boundaries and converted the data to parallel format. In the event of tape dropouts, an error-avoidance scheme selected the unaffected track's data. The selected data were then clocked into an Analogic MP1926A Digital-to-Analog Converter (DAC) at the original crystal-controlled sample rate. The DAC analog output signal was buffered by an Analogic MP201A distortion suppression amplifier (aka deglitching amplifier). The MP201A suppresses the glitches present during the narrow segment of time that the binary input word to the DAC was transitioning from one sample to another. The analog signal from the distortion suppression amplifier was routed to the output low-pass (reconstruction) filter that is identical to the input anti-alias filter and then to NE5534 based output buffer amplifier with a discrete transistor output stage. Voltage and current gain sufficient for