A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs. The convention for naming the package is SOIC or SO followed by the number of pins. For example, a 14-pin 4011 would be housed in an SOIC-14 or SO-14 package. JEDEC and JEITA/EIAJ standards Small outline actually refers to IC packaging standards from at least two different organizations: JEDEC: MS-012 PLASTIC DUAL SMALL OUTLINE GULL WING, 1.27 MM PITCH PACKAGE, 3.9 MM BODY WIDTH. MS-013 VERY THICK PROFILE, PLASTIC SMALL OUTLINE FAMILY, 1.27 MM PITCH, 7.50 MM BODY WIDTH. JEITA (previously EIAJ, which term some vendors still use): Semiconductor Device Packages. (EIAJ Type II is 5.3 mm body width, and slightly thicker and longer than JEDEC MS-012.) Note that because of this, SOIC is not specific enough of a term to describe parts which are interchangeable. Many electronic retailers will list parts in either package as SOIC whether they are referring to the JEDEC or JEITA/EIAJ standards. The wider JEITA/EIAJ packages are more common with higher pin count ICs, but there is no guarantee that an SOIC package with any number of pins will be either one or the other. However, at least Texas Instruments and Fairchild Semiconductor consistently refer to JEDEC 3.9 and 7.5 mm width parts as "SOIC" and to EIAJ Type II 5.3 mm width parts as "SOP". General package characteristics The SOIC package is shorter and narrower than DIP, the side-to-side pitch being 6 mm for an SOIC-14 (from lead tip to lead tip), and the body width being 3.9 mm. These dimensions differ depending on the SOIC in question, and there are several variants. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 in (1.27 mm). SOIC (JEDEC) The picture below shows the general shape of a SOIC narrow package, with major dimensions. The values of these dimensions (in millimetres) for common SOICs is shown in the table. SOP (JEITA/EIAJ) These are sometimes called "wide SOIC", as opposed to the narrower JEDEC MS-012, but they in turn are narrower than the JEDEC MS-013, which may also be called "wide SOIC". Next to the narrow SOIC package (commonly represented as