transistor. The input transistor may be of any low-UCEO type, while the others, acting as stacked linear series voltage regulators, should be able to withstand a considerable fraction of the supply voltage. Note that for a large output-voltage swing, their base voltages should not be bypassed to ground by capacitors, and the uppermost ladder resistor should be able to withstand the full supply voltage. This shows that a linear series voltage regulator is actually a current buffer with its input and output designations swapped. Two-port parameters The cascode configuration can be represented as a simple voltage amplifier (or more accurately, as a g-parameter two-port network) by using its input impedance, output impedance, and voltage gain. These parameters are related to the corresponding g-parameters below. Other useful properties not considered here are circuit bandwidth and dynamic range. BJT cascode: low-frequency small-signal parameters The idealized small-signal equivalent circuit can be constructed for the circuit in figure 2 by replacing the current sources with open circuits and the capacitors with short circuits, assuming they are large enough to act as short circuits at the frequencies of interest. The BJTs can be represented in the small-signal circuit by the hybrid-π model. MOSFET cascode: low-frequency small-signal parameters Similarly, the small-signal parameters can be derived for the MOSFET version, also replacing the MOSFET by its hybrid-π model equivalent. This derivation can be simplified by noting that the MOSFET gate current is zero, so the small-signal model for the BJT becomes that of the MOSFET in the limit of zero base current: where VT is the thermal voltage. The combination of factors gmrO occurs often in the above formulas, inviting further examination. For the bipolar transistor this product is (see hybrid-pi model): In a typical discrete bipolar device the Early voltage VA ≈ 100 V and the thermal voltage near room temperature is VT ≈ 25 mV, making gmrO ≈ 4000, a rather large number. From the article on hybrid-pi model, we find for the MOSFET in the active mode: At the 65-nanometer technology node, ID ≈ 1.2 mA/μ of width, supply voltage is VDD = 1.1 V; Vth ≈ 165 mV, and Vov = VGS-Vth ≈ 5%VDD ≈ 55 mV. Taking a typical length as twice the minimum, L = 2 Lmin = 0.130 μm and a typical value of λ ≈ 1/(4 V/μm L), we find 1/λ ≈ 2 V, and gmrO ≈ 110, still