In digital computing, the Muller C-element (C-gate, hysteresis flip-flop, coincident flip-flop, or two-hand safety circuit) is a small binary logic circuit widely used in design of asynchronous circuits and systems. It outputs 0 when all inputs are 0, it outputs 1 when all inputs are 1, and it retains its output state otherwise. It was specified formally in 1955 by David E. Muller and first used in ILLIAC II computer. In terms of the theory of lattices, the C-element is a semimodular distributive circuit, whose operation in time is described by a Hasse diagram. The C-element is closely related to the rendezvous and join elements, where an input is not allowed to change twice in succession. In some cases, when relations between delays are known, the C-element can be realized as a sum-of-product (SOP) circuit. Earlier techniques for implementing the C-element include Schmitt trigger, Eccles-Jordan flip-flop and last moving point flip-flop. Truth table and delay assumptions For two input signals the C-element is defined by the equation , which corresponds to the following truth table: This table can be turned into a circuit using the Karnaugh map. However, the obtained implementation is naive, since nothing is said about delay assumptions. To understand under what conditions the obtained circuit is workable, it is necessary to do additional analysis, which reveals that delay1 is a propagation delay from node 1 via environment to node 3, delay2 is a propagation delay from node 1 via internal feedback to node 3, delay1 must be greater than delay2. Thus, the naive implementation is correct only for slow environment. The definition of C-element can be generalized for multiple-valued logic , or even for continuous signals: For example, the truth table for a balanced ternary C-element with two inputs is Implementations of the C-element Depending on the requirements to the switching speed and power consumption, the C-element can be realized as a coarse- or fine-grain circuit. Also, one should distinguish between single-output and dual-rail realizations of C-element. A dual-rail C-element can be realized on 2-input NANDs (NORs) only. A single-output realization is workable if and only if: The circuit, where each input of a C-element is connected through a separate inverter to its output, is semimodular relatively to the state, where all the inverters are excited. This state is live for the output gate of C-element. Gate-level implementations There is a number of different single-output circuits of