MHz. Later the Am29040 was released at 33, 40, and 50 MHz, being like the Am29030 except for featuring a 4 KB data cache, a multiplication unit, and a few other enhancements. The 119 mm² Am29040 contained 1.2 million transistors on a 0.7-micron process. A superscalar version of 29K was being designed, but canceled in favor of x86. It was codenamed Jaguar, and was described in November 1994 and August 1995. It was an advanced design, capable of four-way dispatch into six reservation stations and speculative out-of-order execution of instructions, with four-way retire. The register file permitted four reads and two writes at once. The caches for instructions and data were 8 KB each. Loads from cache could bypass stores. It had no on-chip FPU due to cost reasons and the target market. It was expected to attain 100 MHz frequency on a 0.4-micron process. AMD used the unreleased 29K microarchitecture as the basis of the K5 series of x86-compatible processors. The ALUs were carried over, as was the re-order buffer with a slight modification. The FPU was taken from the 29050, but extended to 80 bits precision. The K5 translated the x86 instructions into "RISC-OPs" upon decoding, aided by the predecode information held of the cached instructions. AMD claimed that the superscalar 29K would have only a slightly lower performance than the K5, but much lower cost due to the size difference. The Honeywell 29KII is a CPU based on the AMD 29050, and it was extensively used in real-time avionics. See also List of AMD Am2900 and Am29000 families References External links AMD 29k (Streamlined Instruction Processor) ID Guide pdf book about 29k family chipdb.org Images of different Am29000 processors Microcontrollers Am29000 Superscalar microprocessors 32-bit microprocessors