software which might be handled by dedicated hardware in future versions of the 990 minicomputer series. In typical comparisons with the Intel 8086, the TMS9900 had smaller programs. Some disadvantages were the small address space and need for fast RAM. Implementation The TMS9900 was implemented in an N-channel silicon gate MOS process, which required +5 V, −5 V and +12 V power supplies and a four-phase (non-overlapping) clock with a maximum frequency of 3 MHz (333 ns cycle), usually generated from a 48 MHz crystal using a TIM9904 (aka 74LS362) clock generator chip. The shortest instructions require eight clock cycles or 2.7 μs to complete (assuming 0 external wait cycles), many others run between 10 and 14 cycles (3.3...4.7 μs); the longest-running instruction (DIV) can take up to 124 cycles (41.3 μs). The chip was packaged in a (then unusual) 64-pin, 0.9" wide DIP. The comparatively large number of pins allowed for the 15-bit (word) address bus and 16-bit data bus to be brought out on dedicated pins without the use of multiplexing (unlike e.g. the Intel 8086 CPU), keeping external memory connections simple. Contrary to the convention used by many other manufacturers, TI labeled the most significant address and data lines "A0" and "D0", respectively. All internal data paths and the ALU are 16 bits wide. The processor can be paused with the address bus tri-stated for external direct memory access (DMA). Memory accesses are always 16 bits wide, with the CPU automatically performing read-before-write operations for byte-wide accesses. The hardware interrupt system supports a 4-bit interrupt priority input, which needed to be higher than the priority level stored in the status register (bits 12−15) in order for the interrupt request to be served. In addition, the /LOAD input provides a non-maskable interrupt facility with a dedicated vector. The TMS9900 CPU also contains a 16-bit shift register ("CRU") designed for interfacing with external shift registers, with dedicated instructions supporting access to fields of 1−16 bit width out of a total of 4096 addressable bits. Parallel peripherals can be attached in memory-mapped fashion to the regular address and data bus. Applications The TMS9900 was used in the TI-99/4 and TI-99/4A home computers. Unfortunately, to reduce the production costs, TI chose to use in these systems just 128 16-bit words of the fast kind of RAM that the TMS9900 could access directly. The rest of the memory was 16KB of 8-bit