both source and destination operands. In the opcode, "Symbolic" mode is represented as Indexed mode with the register field set to 0, therefore workspace register 0 (WR0) cannot be used in Indexed mode. In less frequently used dual-operand instructions like XOR, the destination operand must be a workspace register (or workspace register pair in the case of multiply and divide instructions). Flow control is facilitated through a group of one unconditional and twelve conditional Jump instructions. Jump targets are relative to PC with an offset of -128 to +127 word addresses. For subroutine calls, the Branch and Load Workspace Pointer (BLWP) instruction loads new WP and PC values, then saves the values of WP, PC and ST to the (new) registers 13, 14 and 15 respectively. At the end of the subroutine, the Return Workspace Pointer (RTWP) restores these in reverse order. Using BLWP/RTWP, it is possible to nest subroutine calls despite the absence of a stack, however, the programmer needs to assign the appropriate register workspace explicitly. The instruction set also contains a Branch and Link (BL) opcode that only saves PC to register 11 without changing WP. In this case, a branch instruction (B) using WR11 as the destination address can serve as the return opcode, but BL-type subroutines cannot be nested without the programmer taking actions to save the return address. The TMS9900 supports an execute instruction "X" (eXecute). This instruction executes the instruction in a register. It can be used for debugging (as a breakpoint instruction) and for creating indexed-opcode tables as used in byte-code interpreters. The TMS9900 also supports the eXtended OPeration (XOP) instruction. XOP is given a number in the range 0-15 as well as a source address. When invoked, the instruction will perform a context switch through one of sixteen vectors at predefined locations in memory. The XOP instruction also places the effective address of the source operand in register 11 of the new workspace. XOP is less flexible than a BLWP, as the transfer vectors have to be at fixed locations, but allows one source operand to be directly addressed rather than passed in a register or otherwise. XOP can be used to implement a system call facility. In TI's DX10 operating system, XOP 15 invokes a system call. A programmer might define an assembler macro, for example SVC, which invokes XOP 15. Another use of XOP was to implement instructions in