Blank Interrupt", at the end of the display frame. Other register-based functions: Variable screen width up to horizontal overscan Define the distance of movement for Horizontal and Vertical Fine scrolling Provides real-time information of the electron beam's vertical screen location. Reads a light pen horizontal/vertical coordinates (CRT only) Soft, re-definable character set. Adjustable display of inverse video characters. Characters may be vertically reflected. Control the display-oriented Vertical Blank and Display List interrupts, and the Reset key interrupt. Performs DMA for CTIA/GTIA to produce Player/Missile graphics (aka sprites) Non-fixed RAM. This allows RAM for graphics features to be located almost anywhere in the 16-bit memory address range. This applies to: Display lists. Playfield graphics data Character set fonts Player/Missile graphics data Versions by part number C012296 — NTSC: Used in Atari 400, 800, and 1200XL computers. C014887 — PAL/SECAM: Used in Atari 400 and 800 computers. C021697 — NTSC: Used in Atari 600XL, 800XL, and XE models. C021698 — PAL/SECAM: Used in Atari XL, and XE models. Atari, Inc. intended to combine functions of the ANTIC and GTIA chips in one integrated circuit to reduce production costs of Atari computers and 5200 consoles. Two such prototype circuits were being developed, but neither entered production. C020577 — CGIA C021737 — KERI Pinout Registers The Atari 8-bit computers and the Atari 5200 console map the ANTIC chip to the $D4xxhex page. ANTIC provides 15 Read/Write registers controlling Playfield display parameters, DMA for Player/Missile graphics, fine scrolling, light pen input, and interrupts. Hardware registers do not return the written values back when read. This problem is solved by Operating System Shadow registers implemented in regular RAM as places to store the last value written to registers. Operating System Shadow registers are copied from RAM to the hardware registers during the vertical blank. Therefore, any writes to hardware registers which have corresponding shadow registers will be overwritten by the value of the Shadow registers during the next vertical blank. Some Write hardware registers do not have corresponding Shadow registers. They can be safely written by an application without the value being overwritten during the vertical blank. If the application needs to know the last state of the register then it is the responsibility of the application to remember what it wrote. Operating System Shadow registers also exist for some Read registers where reading the value directly from hardware at an unknown stage in the display