The static nature was unusual for the time, and meant that the processor could be halted simply by stopping the clock signal. Programmers made grateful use of this feature to "single step' through a program using a push-button switch to generate the clock pulses. Unique was the 8-level 15-bit wide stack for the subroutine and interrupt return addresses which was integrated into the processor. The stack pointer used 3 bits of the upper status register. This meant subroutines and interrupts could only be nested 8 levels deep. The processor had only 13 real address lines, a further 2 address lines were connected to a 2-bit 'page register', resulting in a 32 KB address space. The page register was set when an absolute (direct) branch instruction, which used a full 15-bit address, was executed. All logical and arithmetic instructions used a 13-bit address augmented by the contents of the page register, thereby limiting their scope to an 8 KB page. These 2 upper address lines were also used (multiplexed) to select the appropriate I/O port during I/O operations (Control port, Data port or Extended port). Although the 2650 had only one interrupt input, this was a 'vectored' interrupt – the interrupting device needed to put a zero-relative displacement on the data bus, that would be used as the operand of a ZBSR (zero branch to subroutine relative) instruction to branch to the specified interrupt routine. Therefore, using indirect addressing, a maximum of 30 interrupt vectors could be stored in the first 64 bytes of memory. (The first three bytes were needed to hold an unconditional branch to the 'reset' routine). This vectored interrupt is also reminiscent of the PDP-11 minicomputer. Instruction set Although the 2650 is basically an 8-bit microprocessor, 64 opcodes are actually 9-bit, and another 32 opcodes are 11-bit (using bits in the address field). Of the remaining 128 8-bit opcodes, 124 (126 in the 2650B) are implemented, giving a total of 444 (446) instructions. Many more instructions are available as the behavior of the standard instructions can be modified by setting or clearing status bits: WC (with or without carry) and COM (logical or arithmetic compare). This doubled the number of rotate, add, subtract and compare instructions. The instruction set is strongly orthogonal: all logic and arithmetic instructions can use all nine addressing modes: register immediate PC relative and PC relative indirect absolute and absolute indirect absolute indexed,