The IBM System/4 Pi is a family of avionics computers used, in various versions, on the F-15 Eagle fighter, E-3 Sentry AWACS, Harpoon Missile, NASA's Skylab, MOL, and the Space Shuttle, as well as other aircraft. Development began in 1965, deliveries in 1967. It descends from the approach used in the System/360 mainframe family of computers, in which the members of the family were intended for use in many varied user applications. (This is expressed in the name: there are 4π steradians in a sphere, just as there are 360 degrees in a circle.) Previously, custom computers had been designed for each aerospace application, which was extremely costly. Models System/4 Pi consisted of basic models: Model TC (Tactical Computer) - A briefcase-size computer for applications such as missile guidance, helicopters, satellites and submarines. Weight: about Model CP (Customized Processor/Cost Performance) - An intermediate-range processor for applications such as aircraft navigation, weapons delivery, radar correlation and mobile battlefield systems. Weight: total Model CP-2 (Cost Performance - Model 2), weight Model EP (Extended Performance) - A large-scale data processor for applications requiring real-time processing of large volumes of data, such as crewed spacecraft, airborne warning and control systems and command and control systems. Weight: System/360 connections Connections with System/360: Main storage arrays of System/4 Pi were assembled from core planes that were militarized versions of those used in IBM System/360 computers Software was for both 360 and 4 Pi Model EP used an instruction subset of IBM System/360 (Model 44) - user programs could be checked on System/360 Uses The Skylab space station employed the model TC-1, which had a 16-bit word length and 16,384 words of memory with a custom input/output assembly. AP-101 The AP-101, being the top-of-the-line of the System/4 Pi range, shares its general architecture with the System/360 mainframes. It has 16 32-bit registers, and uses a microprogram to define an instruction set of 154 instructions. Originally only 16 bits were available for addressing memory; later this was extended with four bits from the program status word register, allowing a directly addressable memory range of 1M locations. This avionics computer has been used in the U.S. Space Shuttle, the B-52 and B-1B bombers, and other aircraft. It is a repackaged version of the AP-1 used in the F-15 fighter. When it was designed, it was a high-performance pipelined processor with core memory. While its specifications are exceeded by most