of the modern microprocessors, it was considered high-performance for its era as it could process 480,000 instructions per second (0.48 MIPS; compared to the 7,000 instructions per second (0.007 MIPS) of the computer used on Gemini spacecraft, while top-of-the line microprocessors as of 2020 are capable of performing more than 2,000,000 MIPS). It remained in service on the Space Shuttle because it worked, was flight-certified, and developing a new system would have been too expensive. The Space Shuttle AP-101s were augmented by glass cockpit technology. The B-1B bomber employs a network of eight model AP-101F computers. The AP-101B originally used in the Shuttle had core memory. The AP-101S upgrade in the early 1990s used semiconductor memory. Each AP-101 on the Shuttle was coupled with an input-output processor (IOP), consisting of one Master Sequence Controller (MSC) and 24 Bus Control Elements (BCEs). The MSC and BCEs executed programs from the same memory system as the main CPU, offloading control the Shuttle's serial data bus system from the CPU. The Space Shuttle used five AP-101 computers as general-purpose computers (GPCs). Four operated in sync, for redundancy, while the fifth was a backup running software written independently. The Shuttle's guidance, navigation and control software was written in HAL/S, a special-purpose high-level programming language, while much of the operating system and low-level utility software was written in assembly language. AP-101s used by the US Air Force are mostly programmed in JOVIAL, such as the system found on the B-1B Lancer bomber. References Bibliography External links IBM Archive: IBM and the Space Shuttle IBM Archive: IBM and Skylab NASA description of Shuttle GPCs NASA history of AP-101 development Space Shuttle Computers and Avionics Guidance computers 4999System 4 Pi Military computers