branch prediction. Multithreading The PPU runs two hardware threads simultaneously. The main registers for code execution are duplicated, as are the exception and interrupt-handling registers, and several essential arrays and queues. They can generate exceptions simultaneously, and perform branch prediction on their individual branch histories. The execution engine and caches are not duplicated though - so it is still just a single-core design. Floating point capacity Its 64-bit double precision floating-point unit, and 128-bit VMX unit (using the AltiVec instruction set), can perform a theoretical 12 floating-point operations per cycle, as its floating-point unit can do floating-point multiply-adds, and come no smaller than 64-bits. That gives 3.2 billion clock cycles × 12 = 38.4 billion floating-point operations/second. The PPU is enhanced in the PowerXCell 8i processor to be able to make single cycle double precision floating point operations, tailored for high performance computing in supercomputers. The VMX unit in the XCPU in the Xbox 360 is enhanced with 128 registers and is not entirely compatible with regular AltiVec. References Cell BE architecture IBM microprocessors PowerPC architecture Xbox 360 hardware