The NEC V60 is a CISC microprocessor manufactured by NEC starting in 1986. Several improved versions were introduced with the same instruction set architecture (ISA), the V70 in 1987, and the V80 and AFPP in 1989. They were succeeded by the V800 product families, which is currently produced by Renesas. The V60 family includes a floating-point unit (FPU) and memory management unit (MMU) and real-time operating system (RTOS) support for both Unix-based user-application-oriented systems and I-TRON–based hardware-control-oriented embedded systems. They can be used in a multi-cpu lockstep fault-tolerant mechanism named FRM. Development tools included Ada certified system MV-4000, and an in-circuit emulator (ICE). The V60/V70/V80's applications covered a wide area, including circuit switching telephone exchanges, minicomputers, aerospace guidance systems, word processors, industrial computers, and various game arcades. Introduction NEC V60 is a CISC processor manufactured by NEC starting in 1986. It was the first 32-bit general-purpose microprocessor commercially available in Japan. Based on a relatively traditional design for the period, the V60 was a radical departure from NEC's previous, 16-bit V–series processor, the V20-V50, which were based on the Intel 8086 model, although the V60 had the ability to emulate the V20/V30. According to NEC's documentation, this computer architectural change was due to the increasing demands for, and the diversity of, high-level programming languages. Such trends called for a processor with both improved performance, achieved by doubling the bus width to 32 bits, and with greater flexibility facilitated by having a large number of general-purpose registers. These were common features of RISC chips. At the time, a transition from CISC to RISC seemed to bring many benefits for emerging markets. Today, RISC chips are common, and CISC designs—such as Intel's x86 and the 80486—which have been mainstream for several decades, internally adopt RISC features in their microarchitectures. According to Pat Gelsinger, binary backward compatibility for legacy software is more important than changing the ISA. Overview Instruction set The V60 ( μPD70616) retained a CISC architecture. Its manual describes their architecture as having "features of high-end mainframe and supercomputers", with a fully orthogonal instruction set that includes non-uniform-length instructions, memory-to-memory operations that include string manipulation, and complex operand-addressing schemes. Family The V60 operates as a 32 bit processor internally, whilst externally providing 16-bit data, and 24-bit address, buses. In addition, the V60 has 32 32-bit general-purpose registers. Its basic architecture is used in several variants. The V70 (μPD70632), released in 1987,