A cycle-accurate simulator is a computer program that simulates a microarchitecture on a cycle-by-cycle basis. In contrast an instruction set simulator simulates an instruction set architecture usually faster but not cycle-accurate to a specific implementation of this architecture; they are often used when emulating older hardware, where time precision is important for legacy reasons. Often, a cycle-accurate simulator is used when designing new microprocessorsthey can be tested, and benchmarked accurately (including running full operating system, or compilers) without actually building a physical chip, and easily change design many times to meet expected plan. Cycle-accurate simulators must ensure that all operations are executed in the proper virtual (or real if it is possible) timebranch prediction, cache misses, fetches, pipeline stalls, thread context switching, and many other subtle aspects of microprocessors. See also Instruction set simulator References External links The Archer virtual infrastructure for computer architecture simulation Simulation software Computer architecture