some form of nitrided hafnium silicates (). and are susceptible to crystallization during dopant activation annealing. NEC Electronics has also announced the use of a dielectric in their 55 nm UltimateLowPower technology. However, even is susceptible to trap-related leakage currents, which tend to increase with stress over device lifetime. This leakage effect becomes more severe as hafnium concentration increases. There is no guarantee, however, that hafnium will serve as a de facto basis for future high-κ dielectrics. The 2006 ITRS roadmap predicted the implementation of high-κ materials to be commonplace in the industry by 2010. See also Low-κ dielectric Silicon–germanium Silicon on insulator References Further reading Review article by Wilk et al. in the Journal of Applied Physics Houssa, M. (Ed.) (2003) High-k Dielectrics Institute of Physics CRC Press Online Huff, H.R., Gilmer, D.C. (Ed.) (2005) High Dielectric Constant Materials : VLSI MOSFET applications Springer Demkov, A.A, Navrotsky, A., (Ed.) (2005) Materials Fundamentals of Gate Dielectrics Springer "High dielectric constant gate oxides for metal oxide Si transistors" Robertson, J. (Rep. Prog. Phys. 69 327-396 2006) Institute Physics Publishing High dielectric constant gate oxides] Media coverage of March, 2007 Intel/IBM announcements BBC NEWS|Technology|Chips push through nano-barrier, NY Times Article (1/27/07) Gusev, E. P. (Ed.) (2006) "Defects in High-k Gate Dielectric Stacks: Nano-Electronic Semiconductor Devices", Springer Electronic engineering Transistors Semiconductor fabrication materials MOSFETs