to that on the left; this pulse rate doubling is consistent with the input voltage being doubled. Construction of the waveforms illustrated at (4) is aided by concepts associated with the Dirac delta function in that, by definition, all impulses of the same strength produce the same step when integrated. Then (4) is constructed using an intermediate step (6), a hypothetical waveform not in the circuit but in which each integrated ideal delta function impulse is integrated to a step. The effect of the finite duration of the actual pulse is constructed in (4) by drawing a line from the base of the impulse step at zero volts to intersect the decay line from (6) at the full duration of the pulse. In the circuit outside the loop, the summing interval is a predetermined fixed time, and at its expiry, the count is stored, and the buffer and the counter are reset. The buffer then presents a sequence of digital values corresponding to quantizations of the analog signal levels during the summing intervals. Using a summing interval is a way (not necessarily the ideal way) to quantize the asynchronous pulse stream to a code; it will have less quantization error if the interval start is synchronized to a pulse. Delta-sigma converters further constrain operation of the impulse generator such that the start of the impulse is delayed until the next occurrence of the appropriate clock-pulse boundary. The effect of this delay is illustrated in Figure 1a for a sequence of impulses that occur at a nominal 2.5 clock intervals. Practical implementation A circuit diagram for a delta-sigma modulator implementation is shown in Figure 1b, with the associated waveforms in Figure 1c. The waveforms shown in Figure 1c are unusually complicated because they are intended to illustrate the loop behavior under extreme conditions, saturated at full scale of 1.0 V, and saturated at zero. An intermediate state is also indicated, at 0.4V, where it is very similar to the operation of the illustration of Figure 1. From the top of Figure 1c, the waveforms, labeled as they are on the circuit diagram, are: The clock (a) – this is shown as varying from 0.4 V initially to 1.0 V and then to zero volts to show the effect on the feedback loop. (b) The impulse waveform feeding the integrator. Controlled by flip-flop output (f) below. (c) The current into the capacitor,