In electronics, a common-source amplifier is one of three basic single-stage field-effect transistor (FET) amplifier topologies, typically used as a voltage or transconductance amplifier. The easiest way to tell if a FET is common source, common drain, or common gate is to examine where the signal enters and leaves. The remaining terminal is what is known as "common". In this example, the signal enters the gate, and exits the drain. The only terminal remaining is the source. This is a common-source FET circuit. The analogous bipolar junction transistor circuit may be viewed as a transconductance amplifier or as a voltage amplifier. (See classification of amplifiers). As a transconductance amplifier, the input voltage is seen as modulating the current going to the load. As a voltage amplifier, input voltage modulates the current flowing through the FET, changing the voltage across the output resistance according to Ohm's law. However, the FET device's output resistance typically is not high enough for a reasonable transconductance amplifier (ideally infinite), nor low enough for a decent voltage amplifier (ideally zero). Another major drawback is the amplifier's limited high-frequency response. Therefore, in practice the output often is routed through either a voltage follower (common-drain or CD stage), or a current follower (common-gate or CG stage), to obtain more favorable output and frequency characteristics. The CS–CG combination is called a cascode amplifier. Characteristics At low frequencies and using a simplified hybrid-pi model (where the output resistance due to channel length modulation is not considered), the following closed-loop small-signal characteristics can be derived. Bandwidth Bandwidth of common-source amplifier tends to be low, due to high capacitance resulting from the Miller effect. The gate-drain capacitance is effectively multiplied by the factor , thus increasing the total input capacitance and lowering the overall bandwidth. Figure 3 shows a MOSFET common-source amplifier with an active load. Figure 4 shows the corresponding small-signal circuit when a load resistor RL is added at the output node and a Thévenin driver of applied voltage VA and series resistance RA is added at the input node. The limitation on bandwidth in this circuit stems from the coupling of parasitic transistor capacitance Cgd between gate and drain and the series resistance of the source RA. (There are other parasitic capacitances, but they are neglected here as they have only a secondary effect on bandwidth.) Using Miller's theorem, the circuit of Figure 4 is transformed to that of