movement are local, tremendous bandwidth is possible with little power. This same technique is used in the R10000 register renaming mapping file, which stores a 6-bit virtual register number for each of the physical registers. In the renaming file, the renaming state is checkpointed whenever a branch is taken, so that when a branch is detected to be mispredicted, the old renaming state can be recovered in a single cycle. (See Register renaming.) See also Sum-addressed decoder References External links Register file design considerations in dynamically scheduled processors - Farkas, Jouppi, Chow - 1995 Computer architecture Digital electronics Digital registers