Geode was a series of x86-compatible system-on-a-chip microprocessors and I/O companions produced by AMD, targeted at the embedded computing market. The series was originally launched by National Semiconductor as the Geode family in 1999. The original Geode processor core itself is derived from the Cyrix MediaGX platform, which was acquired in National's merger with Cyrix in 1997. AMD bought the Geode business from National in August 2003 to augment its existing line of embedded x86 processor products. AMD expanded the Geode series to two classes of processor: the MediaGX-derived Geode GX and LX, and the modern Athlon-derived Geode NX. Geode processors are optimized for low power consumption and low cost while still remaining compatible with software written for the x86 platform. The MediaGX-derived processors lack modern features such as SSE and a large on-die L1 cache but these are offered on the more recent Athlon-derived Geode NX. Geode processors tightly integrate some of the functions normally provided by a separate chipset, such as the northbridge. Whilst the processor family is best suited for thin client, set top box and embedded computing applications, it can be found in unusual applications such as the Nao robot and the Win Enterprise IP-PBX. The One Laptop per Child project used the GX series Geode processor in OLPC XO-1 prototypes, but moved to the Geode LX for production. The Linutop (rebranded Artec ThinCan DBE61C or rebranded FIC ION603A) is also based on the Geode LX. 3Com Audrey was powered by a 200 MHz Geode GX1. The SCxxxx range of Geode devices are a single-chip version, comparable to the SiS 552, VIA CoreFusion or Intel's Tolapai, which integrate the CPU, memory controller, graphics and I/O devices into one package. Single processor boards based on these processors are manufactured by Artec Group, PC Engines (WRAP), Soekris, and Win Enterprises. AMD discontinued all Geode processors in 2019. Features CPU features table National Semiconductor Geode Geode GXm Rebranded Cyrix MediaGXm. Returns "CyrixInstead" on CPUID. 0.35 μm four-layer metal CMOS MMX instructions Core speed: 180, 200, 233, 266 MHz 3.3 V I/O, 2.9 V core 16 KB four-way set associative write-back unified (I&D) L1 cache, 2 or 4 KB of which can be reserved as I/O scratchpad RAM for use by the integrated graphics core (e.g. for bitblits) 30-33 MHz PCI bus interconnect with CPU bus 64-bit SDRAM interface Fully static design CS5530 companion chip (implements sound and video functions)