logic that depend upon the law of excluded middle; since that law is not usable under this scheme, there are propositions that cannot be proven that way. Suszko's thesis Functional completeness of many-valued logics Functional completeness is a term used to describe a special property of finite logics and algebras. A logic's set of connectives is said to be functionally complete or adequate if and only if its set of connectives can be used to construct a formula corresponding to every possible truth function. An adequate algebra is one in which every finite mapping of variables can be expressed by some composition of its operations. Classical logic: CL = ({0,1}, ¬, →, ∨, ∧, ↔) is functionally complete, whereas no Łukasiewicz logic or infinitely many-valued logics has this property. We can define a finitely many-valued logic as being Ln ({1, 2, ..., n} ƒ1, ..., ƒm) where n ≥ 2 is a given natural number. Post (1921) proves that assuming a logic is able to produce a function of any mth order model, there is some corresponding combination of connectives in an adequate logic Ln that can produce a model of order m+1. Applications Known applications of many-valued logic can be roughly classified into two groups. The first group uses many-valued logic to solve binary problems more efficiently. For example, a well-known approach to represent a multiple-output Boolean function is to treat its output part as a single many-valued variable and convert it to a single-output characteristic function (specifically, the indicator function). Other applications of many-valued logic include design of programmable logic arrays (PLAs) with input decoders, optimization of finite state machines, testing, and verification. The second group targets the design of electronic circuits that employ more than two discrete levels of signals, such as many-valued memories, arithmetic circuits, and field programmable gate arrays (FPGAs). Many-valued circuits have a number of theoretical advantages over standard binary circuits. For example, the interconnect on and off chip can be reduced if signals in the circuit assume four or more levels rather than only two. In memory design, storing two instead of one bit of information per memory cell doubles the density of the memory in the same die size. Applications using arithmetic circuits often benefit from using alternatives to binary number systems. For example, residue and redundant number systems can reduce or eliminate the ripple-through carries that are involved in normal binary