The Intel 8061 microcontroller is most notable for its use in the Ford EEC-IV automotive engine control unit. A close relative of the 8096, the Intel 8061 is second-sourced by Toshiba (under the model number 6127 and 6126) and Motorola (now Freescale Semiconductor). Introduction The MCS-96 family originated as a commercial derivative of the Intel 8061, the first processor in the Ford EEC-IV engine controller family. Differences between the 8061 and the 8096 include the memory interface bus, the 8061's M-Bus being a 'burst-mode' bus requiring a tracking program counter in the memory devices. There were also considerable differences in the I/O peripherals of the two parts - the 8061 had 8 HSI (pulse-measurement) inputs, 10 HSO (pulse-generation) outputs entirely separated from the HSI pins, and a non-sampling 10-bit ADC with more channels than the 8096 had. Many differences between the EEC-IV and the 8096 resulted from an effort to share pins to reduce I/O pin count in favor of using the pins for a more conventional memory interface bus. The 8061 and its derivatives were used in almost all Ford automobiles built from 1983 through the end of the 20th century. This processor controlled fuel mixture and injection timing, spark advance (often in conjunction with a separate spark module), exhaust gas recirculation, and other engine functions. M-Bus The 8061 had an interruptible-burst-mode 11-wire 8-bit memory interface bus called the M-Bus. This bus required a program counter and a data address register in each memory device. Each chip reset or branch instruction would update the program counter in the memory devices, after which instruction stream data would be read sequentially. The instruction stream could be interrupted to read or write data bytes and words using the memory's data address register while retaining the memory's program counter copy—allowing resumption of reading the instruction stream without having to re-send a program address after each data access. Address map The 8061 had a 240-byte internal register file, from address 0010H to 00FFH. I/O addresses were from 0002H to 000FH. Throughout the 8061 family, address 0000H was reserved for a constant ZERO register. This permitted use of relative addressing to access absolute addresses. The stack pointer was at 00010H. 8061 could address 64K of memory. Reset was to 2000H. Interrupt vectors were at 2010H. Process, package The 8061 was built in a 3-micrometre N-MOS silicon-gate process. Plastic 68-pin flatpacks, ceramic packages, and 40-pin DIP