a supplier to business (and thus running COBOL) was the availability of BCD arithmetic in the ALU. Internally the machines employed 16-bit instructions and a 24-bit data path. The bit addressable memory supported the mix quite efficiently. Internally, the later generation memories stored data on 32-bit boundaries, but were capable of reading across this boundary and supplying a merged result. The initial hardware implementations were built out of the Complementary Transistor Logic (CTL) Family originally made by Fairchild Semiconductor but with the introduction of the B1955 in 1979 the series employed the more popular (and more readily obtainable) TTL logic family. Up through the B1955, the control logic was implemented with PROMs, muxes and such. The B1965, the last of the series, was implemented with a pair of microcode sequencers which stayed in lock step with each other. The majority of the instructions executed in a single cycle. This first cycle was decoded by FPLAs using 16 inputs (just the perfect size for a 16-bit instruction word) and 48 min-terms. Successive cycles from a multi-cycle instruction were sourced from PROMs. The FPLAs and PROM outputs were wired together. The FPLA would drive the output on the first cycle, then get tri-stated. The PROMs would drive the control lines until the completion of the instruction. I/O The I/O system for the B1000 series consisted of a 24-bit data path and control strobes to and from the peripherals. The CPU would place data on the data path, then inform the peripheral that data was present. Many of the peripheral adapters were fairly simplistic, and the CPU actually drove the adapter state machines through their operations with successive accesses. Later models of the machines in both the 1800 and 1900 series could be configured as either a single or dual processor. These were tightly coupled machines and competed in access to the main memory. The B1955 and B1965 could accommodate up to four processors on the memory bus, but at least one of these would be assigned to the Multi-Line adapter which supplied serial I/O to the system. Only Dual-processor configurations were ever actually sold. The Multi-Line was capable of driving multiple 19.2Kb RS485 serial lines in a multi-drop configuration. The serial I/O was polled. A given terminal would wait until it was addressed, and grab the line and send any data it had pending. The Multi-Line Adapter would DMA the data into