Cydrome (1984−1988) was a computer company established in San Jose of the Silicon Valley region in California. Its mission was to develop a numeric processor. The founders were David Yen, Wei Yen, Ross Towle, Arun Kumar, and Bob Rau (the chief architect). History The company was originally named ”Axiom Systems". However another company in San Diego called "Axiom" was founded earlier. Axiom Systems called its architecture "SPARC". It sold the rights to the name (but not the architecture) to Sun Microsystems and used the money to hire NameLab to come up with a new company name. They came up with "Cydrome" from "cyber" (computer) "drome" (racecourse). Cydrome moved from an office in San Jose to a business park in Milpitas on President's Day 1985. This site was used to host meetings of the Bay Area ACM chapter's Special Interest Group in Large Scale Systems (SIGBIG), in contrast to then SIGSMALL for microcomputers which are now called "PCs" and its present-day national SIGHPC. Late in its history, Cydrome received an investment from Prime Computers and OEMed the Cydra-5 through Prime. The system sold by Cydrome had white skins. The skins for the Prime OEM system was black. In the Summer of 1988 Prime was set to acquire Cydrome. At the last minute the board of Prime decided not to go through with the deal. That sealed the fate of Cydrome. The company closed after roughly 4 years of operation in 1988. Many of the ideas in Cydrome were carried on in the Itanium architecture. Product In order to improve performance in a new instruction set architecture, the Cydrome processors were based on a very long instruction word (VLIW) containing instructions from parallel operations. Software pipelining in a custom Fortran compiler generated code that would run efficiently. The numeric processor used a 256 bit-wide instruction word with seven "fields". In most cases the compiler would find instructions that could run in parallel and place them together in a single word. It also had a special mode where each of the operations could be executed sequentially. It implemented register rotation to aid in software pipelining of loops. There was an instruction cache only, since it was felt that a data cache would be inefficient on sparse array operations. The numeric processor also incorporated memory management and consequently employed virtual memory concepts. The memory subsystem implemented a 64 way interleaved 4-port memory. To ensure