RIT-A for the non-metallic structures and RIT-B for the metal layers. Miscellaneous A modern IC has to go through a long and complex design process before it is ready for tape-out. Many of the steps along the way use software tools collectively known as electronic design automation (EDA). The design must then go through a series of verification steps collectively known as "signoff" before it can be taped-out. Tape-out is usually a cause for celebration by everyone who worked on the project, followed by trepidation awaiting the first article, the first physical samples of a chip from the manufacturing facility (semiconductor foundry). First tapeout is rarely the end of work for the design team. Most chips will go through a series of iterations, called "spins", in which errors are detected and fixed after testing the first article. Many different factors can cause a spin, including: The taped-out design fails final checks at the foundry due to problems manufacturing the design itself. The design is successfully fabricated, but the first article fails functionality tests. See also Mask data preparation Semiconductor fabrication GDSII References Electronic design