bins. A bin is then defined as a good or bad die. This wafermap is then sent to the die attachment process which then only picks up the passing circuits by selecting the bin number of good dies. The process where no ink dot is used to mark the bad dies is named substrate mapping. When ink dots are used, vision systems on subsequent die handling equipment can disqualify the die by recognizing the ink dot. In some very specific cases, a die that passes some but not all test patterns can still be used as a product, typically with limited functionality. The most common example of this is a microprocessor for which only one part of the on-die cache memory is functional. In this case, the processor can sometimes still be sold as a lower cost part with a smaller amount of memory and thus lower performance. Additionally when bad dies have been identified, the die from the bad bin can be used by production personnel for assembly line setup. The contents of all test patterns and the sequence by which they are applied to an integrated circuit are called the test program. After IC packaging, a packaged chip will be tested again during the IC testing phase, usually with the same or very similar test patterns. For this reason, it may be thought that wafer testing is an unnecessary, redundant step. In reality this is not usually the case, since the removal of defective dies saves the considerable cost of packaging faulty devices. However, when the production yield is so high that wafer testing is more expensive than the packaging cost of defect devices, the wafer testing step can be skipped altogether and dies will undergo blind assembly. See also Bond characterization Non-contact wafer testing References Bibliography Fundamentals of Digital Semiconductor Testing (Version 4.0) by Guy A. Perry (Spiral-bound – Mar 1, 2003) Principles of Semiconductor Network Testing (Test & Measurement) (Hardcover)by Amir Afshar, 1995 Power-Constrained Testing of VLSI Circuits. A Guide to the IEEE 1149.4 Test Standard (Frontiers in Electronic Testing) by Nicola Nicolici and Bashir M. Al-Hashimi (Kindle Edition – Feb 28, 2003) Semiconductor Memories: Technology, Testing, and Reliability by Ashok K. Sharma (Hardcover – Sep 9, 2002) Semiconductor device fabrication