Protocol International Partnership Association, Inc. (OCP-IP) was an independent, non-profit semiconductor industry consortium formed to administer the support, promotion and enhancement of the Open Core Protocol (OCP). OCP was the first fully supported, openly licensed, comprehensive, interface socket for semiconductor intellectual property (IP) cores. The mission of OCP-IP was to address problems relating to design, verification, and testing which are common to IP core reuse in "plug and play" system on a chip (SoC) products. This initiative comprehensively fulfills system-level integration requirements by promoting IP core reusability and reducing design time, risk and manufacturing costs for SoC designs. Design teams developing consumer, data processing, telecom (wireless or wired), datacom and mass storage applications can gain significant benefits from the OCP-IP solution. Accellera membership Corporate members have a right to be eligible for election to the Board of Directors. Associate member companies have voting rights in all of Accellera's Technical Working Groups. Standards The following EDA standards developed by Accellera were ratified by IEEE by 2019: Verilog or IEEE 1364 or IEC 61691-4 VHDL or IEEE 1076 or IEC 61691-1-1 Property Specification Language (PSL) or IEEE 1850 or IEC 62531 SystemC or IEEE 1666 SystemC Analog/Mixed-Signal extensions or IEEE 1666.1 SystemVerilog or IEEE 1800 Standard Delay Format (SDF) or IEEE 1497 or IEC 61523-3 Delay and Power Calculation System (DPCS/OLA; see Standard Parasitic Exchange Format) or IEEE 1481 Advanced Library Format (ALF) or IEEE 1603 or IEC 62265 Open Compression Interface (OCI) or IEEE 1450.6.1 Unified Power Format (UPF) or IEEE 1801 Open Model Interface (OMI) or IEEE 1499 IP-XACT or IEEE 1685 Universal Verification Methodology (UVM) or IEEE 1800.2 The following EDA initiatives were developed by Accellera: Open Core Protocol (OCP) Open Verification Language (OVL) Open Verification Library (OVL) Portable Test & Stimulus Standard (PSS) Standard Co-Emulation-Modeling Interface (SCE-MI) Soft IP Tagging SystemRDL (System Register Description Language) Unified Coverage Interoperability Standard (UCIS) Universal Verification Methodology (UVM) Verilog-AMS (Analog Mixed-Signal) See also Design Automation Standards Committee (DASC) References External links Electronic design automation organizations Standards organizations in the United States