addressing mode "base+index+offset" (detailed below) allows one to add two registers and a constant together in one instruction and store the result in a third register. Simple addressing modes for code Some simple addressing modes for code are shown below. The nomenclature may vary depending on platform. Absolute or direct +----+------------------------------+ |jump| address | +----+------------------------------+ (Effective PC address = address) The effective address for an absolute instruction address is the address parameter itself with no modifications. PC-relative +----+------------------------------+ |jump| offset | jump relative +----+------------------------------+ (Effective PC address = next instruction address + offset, offset may be negative) The effective address for a PC-relative instruction address is the offset parameter added to the address of the next instruction. This offset is usually signed to allow reference to code both before and after the instruction. This is particularly useful in connection with jumps, because typical jumps are to nearby instructions (in a high-level language most if or while statements are reasonably short). Measurements of actual programs suggest that an 8 or 10 bit offset is large enough for some 90% of conditional jumps (roughly ±128 or ±512 bytes). Another advantage of PC-relative addressing is that the code may be position-independent, i.e. it can be loaded anywhere in memory without the need to adjust any addresses. Some versions of this addressing mode may be conditional referring to two registers ("jump if reg1=reg2"), one register ("jump unless reg1=0") or no registers, implicitly referring to some previously-set bit in the status register. See also conditional execution below. Register indirect +-------+-----+ |jumpVia| reg | +-------+-----+ (Effective PC address = contents of register 'reg') The effective address for a Register indirect instruction is the address in the specified register. For example, (A7) to access the content of address register A7. The effect is to transfer control to the instruction whose address is in the specified register. Many RISC machines, as well as the CISC IBM System/360 and successors, have subroutine call instructions that place the return address in an address register—the register-indirect addressing mode is used to return from that subroutine call. Sequential addressing modes Sequential execution +------+ | nop | execute the following instruction +------+ (Effective PC address = next instruction address) The CPU, after executing a sequential instruction, immediately executes the following instruction. Sequential execution is not considered to be an addressing mode on some computers. Most instructions on most CPU architectures are sequential instructions.