the insulator, an appropriately oriented crystalline insulator, or vias through the insulator from the underlying substrate. An exhaustive review of these various manufacturing processes may be found in reference Microelectronics industry Research The silicon-on-insulator concept dates back to 1964, when it was proposed by C.W. Miller and P.H. Robinson. In 1979, a Texas Instruments research team including Al F. Tasch, T.C. Holloway, Kai Fong Lee and James F. Gibbons fabricated a silicon-on-insulator MOSFET (metal–oxide–semiconductor field-effect transistor). In 1983, a Fujitsu research team led by S. Kawamura fabricated a three-dimensional integrated circuit with SOI CMOS (complementary metal–oxide–semiconductor) structure. In 1984, the same Fujitsu research team fabricated a 3D gate array with vertically stacked dual SOI/CMOS structure using beam recrystallization. The same year, Electrotechnical Laboratory researchers Toshihiro Sekigawa and Yutaka Hayashi fabricated a double-gate MOSFET, demonstrating that short-channel effects can be significantly reduced by sandwiching a fully depleted SOI device between two gate electrodes connected together. In 1986, Jean-Pierre Colinge at HP Labs fabricated SOI NMOS devices using 90 nm thin silicon films. In 1989, Ghavam G. Shahidi initiated the SOI Research Program at the IBM Thomas J Watson Research Center. He was the chief architect of SOI technology at IBM Microelectronics, where he made fundamental contributions, from materials research to the development of the first commercially viable devices, with the support of his boss Bijan Davari. Shahidi was a key figure in making SOI CMOS technology a manufacturable reality. In the early 1990s, he demonstrated a novel technique of combining silicon epitaxial overgrowth and chemical mechanical polishing to prepare device-quality SOI material for fabricating devices and simple circuits, which led to IBM expanding its research program to include SOI substrates. He was also the first to demonstrate the power-delay advantage of SOI CMOS technology over traditional bulk CMOS in microprocessor applications. He overcame barriers preventing the semiconductor industry's adoption of SOI, and was instrumental in driving SOI substrate development to the quality and cost levels suitable for mass-production. In 1994, an IBM research team led by Shahidi, Bijan Davari and Robert H. Dennard fabricated the first sub-100 nanometer SOI CMOS devices. In 1998, a team of Hitachi, TSMC and UC Berkeley researchers demonstrated the FinFET (fin field-effect transistor), which is a non-planar, double-gate MOSFET built on an SOI substrate. In early 2001, Shahidi used SOI to developed a low-power RF CMOS device, resulting in increased radio frequency, at IBM. Commercialization Shahidi's