core usually known as the "small" or E-core. A common use of such topology is to provide better power efficiency, especially in mobile SoCs. ARM big.LITTLE (succeeded by DynamIQ) is the prototypical case, where faster high-power cores are combined with slower low-power cores. Apple has produced Apple silicon SoCs with similar organization. Intel has also produced hybrid x86-64 chips codenamed Lakefield, although not without major limitations in instruction set support. The newer Alder Lake reduces the sacrifice by adding more instruction set support to the "small" core. Challenges Heterogeneous computing systems present new challenges not found in typical homogeneous systems. The presence of multiple processing elements raises all of the issues involved with homogeneous parallel processing systems, while the level of heterogeneity in the system can introduce non-uniformity in system development, programming practices, and overall system capability. Areas of heterogeneity can include: ISA or instruction-set architecture Compute elements may have different instruction set architectures, leading to binary incompatibility. ABI or application binary interface Compute elements may interpret memory in different ways. This may include both endianness, calling convention, and memory layout, and depends on both the architecture and compiler being used. API or application programming interface Library and OS services may not be uniformly available to all compute elements. Low-Level Implementation of Language Features Language features such as functions and threads are often implemented using function pointers, a mechanism which requires additional translation or abstraction when used in heterogeneous environments. Memory Interface and Hierarchy Compute elements may have different cache structures, cache coherency protocols, and memory access may be uniform or non-uniform memory access (NUMA). Differences can also be found in the ability to read arbitrary data lengths as some processors/units can only perform byte-, word-, or burst accesses. Interconnect Compute elements may have differing types of interconnect aside from basic memory/bus interfaces. This may include dedicated network interfaces, Direct memory access (DMA) devices, mailboxes, FIFOs, and scratchpad memories, etc. Furthermore, certain portions of a heterogeneous system may be cache-coherent, whereas others may require explicit software-involvement for maintaining consistency and coherency. Performance A heterogeneous system may have CPUs that are identical in terms of architecture, but have underlying micro-architectural differences that lead to various levels of performance and power consumption. Asymmetries in capabilities paired with opaque programming models and operating system abstractions can sometimes lead to performance predictability problems, especially with mixed workloads. Data Partitioning While partitioning data on homogeneous