STT proponents expect the technique to be used for devices of 65 nm and smaller. The downside is the need to maintain the spin coherence. Overall, the STT requires much less write current than conventional or toggle MRAM. Research in this field indicates that STT current can be reduced up to 50 times by using a new composite structure. However, higher-speed operation still requires higher current. Other potential arrangements include "vertical transport MRAM" (VMRAM), which uses current through a vertical column to change magnetic orientation, a geometric arrangement that reduces the write disturb problem and so can be used at higher density. A review article provides the details of materials and challenges associated with MRAM in the perpendicular geometry. The authors describe a new term called "Pentalemma", which represents a conflict in five different requirements such as write current, stability of the bits, readability, read/write speed and the process integration with CMOS. The selection of materials and the design of MRAM to fulfill those requirements are discussed. Comparison with other systems Density The main determinant of a memory system's cost is the density of the components used to make it up. Smaller components, and fewer of them, mean that more "cells" can be packed onto a single chip, which in turn means more can be produced at once from a single silicon wafer. This improves yield, which is directly related to cost. DRAM uses a small capacitor as a memory element, wires to carry current to and from it, and a transistor to control it – referred to as a "1T1C" cell. This makes DRAM the highest-density RAM currently available, and thus the least expensive, which is why it is used for the majority of RAM found in computers. MRAM is physically similar to DRAM in makeup, and often does require a transistor for the write operation (though not strictly necessary). The scaling of transistors to higher density necessarily leads to lower available current, which could limit MRAM performance at advanced nodes. Power consumption Since the capacitors used in DRAM lose their charge over time, memory assemblies that use DRAM must refresh all the cells in their chips several times a second, reading each one and re-writing its contents. As DRAM cells decrease in size it is necessary to refresh the cells more often, resulting in greater power consumption. In contrast, MRAM never requires a refresh. This means that not