RELATED APPLICATIONS 
     This application is a 371 of PCT/EP04/04639, which has an international filing date of Apr. 30, 2004, designating the United States Of America, and claims the benefit of European Patent Application 03291060.6 filed on Apr. 30, 2003. 
     TECHNICAL FIELD  
     This invention relates to the conversion between analog and digital signals. 
     BACKGROUND 
     Wireless local area networks (WLANs) are expected to become the main method of conveying data in the near future. However, to provide continuity of service with current or future cellular systems such as GPRS or UMTS, one will need to couple WLAN and cellular systems. 
     One significant problem foreseen for dual WLAN/cellular terminals is power consumption. Among the various components within a typical mobile terminal that consume significant power is the analog to digital converter (ADC). 
     In a typical implementation of IEEE802.11a or BRAN HIPERLAN/2 WLAN, two ADCs are required for separate in-phase and quadrature-phase (I/Q) paths. 
     As an example, Analog Devices manufacture the AD775 ADC, whose specification states that it provides 20 Msamples/sec at 8-bit resolution, requiring 60 mW power—which is described in the specification as ‘very low’. 
     Within the WLAN frameworks mentioned, this equates to a total ADC power consumption of 120 mW. 
     This level of power consumption will reduce the lifetime of a battery within the terminal as compared with a similar terminal only connected to a cellular network. Possible solutions include using a larger battery, which is likely to result in a larger, heavier terminal, or find means to reduce the power consumption of the ADC within the dual WLAN/cellular terminal. 
     More generally, lower power consumption within ADCs and to a lesser extent digital to analog converters (DACs) is desirable in many portable devices, such as voice recorders, portable stereos and transceivers. 
     U.S. Pat. No. 4,395,732 discloses a system in which ADC quantization levels are adapted to a changing distribution of the analogue input signal so that each threshold is statistically as significant as every other threshold and therefore the quantizer&#39;s dynamic range is not wasted. In particular, the specification proposes to adapt the ADC quantization levels after each line of a television image. However, there is no description of how a single adaptation is performed; in particular, it is not described what algorithm is used to perform each single adaptation of the thresholds. 
     The present invention addresses the above problem of reducing ADC/DAC power consumption. 
     SUMMARY OF THE INVENTION 
     The present invention provides a method of and apparatus for analog to digital conversion, as described in accompanying claims. 
    
    
     
       BRIEF DESCRIPTION OF THE DRAWINGS 
         FIG. 1  is a block diagram of an example method of conversion between analog and digital signals; 
         FIG. 2  illustrates a non-linear transfer function and the Gaussian-like gradient thereof; 
         FIG. 3  illustrates quantisation levels and bins as utilised within a converter; and 
         FIG. 4  is a block diagram of a method of conversion between analog and digital signals in accordance with an embodiment of the present invention. 
     
    
    
     DETAILED DESCRIPTION 
     Within typical ADCs, power consumption is proportional to the number of bits used to quantise the incoming signal. In “Numérisation du signal radiofréquences, Récepteur PCS 1900, Architectures de convertisseurs analogique-numérique pipeline” by Patrick Loumeau and Jean-Francois Naviner (Formation Continue, Ecole Nationale Supérieure des Télécommunications (ENST) Paris, 2002), an empirical power consumption law was given for typical ADC devices as:
 
 P=C·F   data ·2 ENOB   Eq. 1
 
     Where P is the power consumption (for example, in mW), C is a constant, F data  is the data output rate (for example, in Mwords/s) and ENOB is the effective number of bits in the quantisation. 
     The purpose of such an ADC (and conversely, a digital to analogue converter, or DAC) is to represent the values of the incoming signal as accurately as possible. This accuracy is achieved though the number of bits used to quantise the possible value range, with the consequential change in power consumption noted in Equation 1. 
     Thus to achieve as accurate a representation as possible, ADCs typically use linear quantisation; that is, they divide the value range equally over the available values defined by 2 ENOB . Thus for example if 8 bits are used, then the possible value range is divided into 256 equal bins. Input values falling within the sub-range of a given bin are assigned a quantised level or value, usually the median of the bin&#39;s sub-range. 
     By contrast, within many data communication (source coding) protocols the aim of quantisation is to compress the number of bits used for transmission, with the result that the integrity of the signal suffers some loss. Typically the quantisation process used is highly non-linear, as discussed in “Design of Multiple Description Scalar Quantizers” by Vinay Anant Vaishampayan (IEEE Transactions on Information Theory, 1993) or “Vector Quantization and Signal Compression” by A. Gersho and R. M. Gray (Kluwer Academic Publishers, Norwell, Mass., USA, 1992). 
     The inventors of the present invention have appreciated, however, that for signal sources with non-uniform probability density distributions (PDD) such as for example orthogonal frequency division multiplexed (OFDM) signals, an ADC may nevertheless employ a non-linearity within the quantisation process such that the associated loss of signal integrity due to compression is concentrated within the lowest probability input value ranges. 
     In particular, the present invention provides means to constantly adapt the (non-linear) quantisation such that this benefit is maintained in varying input conditions. 
     This enables a non-linear ADC process to use at least one less effective number of bits to achieve substantially similar bit error rates (BERs) in the final interpreted signal to that of a linear ADC process. The result is an approximate halving in power consumption for the ADC used. 
     Conversely if the problem of power consumption is alleviated by developments in battery technology, the present invention will improve the BER for a given number of quantisation bits relative to current ADCs. Improved BER for a given number of bits is beneficial for example where the number of possible bits is constrained by other technology that may be coupled to the ADC. 
     Referring to  FIGS. 1 and 2 , consider an input signal passed through an analog device ( 120 ) with a non-linear transfer function ( 126 ,  210 ), for example a suitably adapted diode. 
     The non-linear transfer function of the analog device is predefined as a sigmoid-like function ( 126 ,  210 ) whose gradient is a function of an assumed Gaussian probability density distribution (PDD) ( 220 ) for the input signals. Thus the non-linear transfer function has a maximum gradient substantially at the mean of the Gaussian PDD ( 222 ), and a gradient approaching zero for values of the Gaussian PDD approaching zero. 
     The effect is illustrated in  FIG. 2 , wherein input value intervals δ in1  and δ in2  are identical, but output value interval δ out1  is compressed whilst δ out2  is expanded. 
     The effect of the non-linear transfer function is thus to expand or compress value intervals in proportion to their probability of occurrence. 
     The non-linear output of the analog device is then quantised using a linear ADC ( 130 ), the linear ADC having at least 1 less bit quantisation accuracy (bins at least twice as large) as would be found in an ADC of a comparable prior system. This provides a power consumption saving of approximately 50% as per equation 1. 
     As probable input value intervals have been expanded by the non-linearity, they fit the larger quantiser bins much as a linear version of the input would fit smaller quantiser bins. For the compressed, less probable values, the quantiser bins appear proportionally larger, but any resulting inaccuracy is mitigated by the low frequency of occurrence and in the case of OFDM-type transmissions by the low significance of such quantisation errors to final interpreted bit error rate. 
     The non-linear quantised output of the ADC is then linearised ( 140 ), either by computing a function that substantially implements the inverse transfer function of the analog device on the output, or by relating the output to a look-up table of pre-defined values. 
     The linearised output is then treated as the output of a standard linear ADC ( 150 ). 
     Note that if the output does not need to be treated as the output of a standard linear ADC, for example because the present invention is not being used as a direct substitute for linear ADCs within pre-existing systems, then the linearising means ( 140 ) is optional, as subsequent processes may be designed to use the non-linear output. 
     Clearly, approximations to the aforesaid non-linear transfer function will vary between analog components. 
     The main disadvantage of the above technique, however, is that the non-linear transfer function of the analog device may only be a crude approximation to the current probability density function of the input. 
     Referring now to  FIG. 4 , an example non-linear converter is discussed. 
     Currently, non-linear quantization is used, for example, in the framework of telephone applications (speech quantisation, see for example “Simon Haykin: Communication systems, 4 th  edition, Wiley &amp; Sons, 2001, chapter 3”). Here, a non-linear compression/decompression device is used in combination with a linear ADC. Such non-linear devices are mainly applied to very simple and very narrow-band applications (e.g. speech coding). 
     The problem in such applications is that the non-linear compression element increases the bandwidth of the signal (as any non-linear device does). ADC, however, usually have an inherent low-pass filter and thus the signal is distorted by the ADC device. Therefore, the proposed solution is to adapt the quantisation device to the signal distribution. 
     The inventors of the present invention assume that non-linear ADCs can be manufactured with quantisation bins of varying size within the input range. 
     An input signal is passed to a non-linear ADC, within which the quantisation bins are spaced according to the following process: 
     Referring to  FIG. 3 , if b i  are the bounding values of the quantiser bins, and a i  are quantiser levels (typically the medians of each bin range), the optimal spacing of the quantisation bins is achieved by minimising the global mean-squared quantisation error (MSE) of the quantiser levels over all individual bins. 
     Minimising the global MSE is a matter of making bins for probable values of input x smaller to minimise (x−a i ) 2  when b i &lt;x=b i+1 , at the cost of making improbable value bins larger, until a global minimum MSE over all bins is reached. The probability of values of input x is defined by a probability density function p(x), for example based on a Gaussian function with variance σ 2   g . 
     An error function J is defined: 
     
       
         
           
             
               
                 
                   
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                     J   ⁡     (       a     i   +   1       ,     a   i     ,     a     i   +   1         )       =             σ   g   2     +     a   i   2       2     ·     [       erf   ⁡     (         a   i     +     a     i   +   1             8     ⁢     σ   g         )       -     erf   ⁡     (         a   i     +     a     i   -   1             8     ⁢     σ   g         )         ]       +         2   π       ⁢       σ   g     ·   exp     ⁢       {     -         (       a     i   +   1       +     a   i       )     2       8   ⁢     σ   g   2           }     ·     (       a   i     -         a     i   +   1       +     a   i       4       )         -         2   π       ⁢       σ   g     ·   exp     ⁢       {     -         (       a     i   -   1       +     a   i       )     2       8   ⁢     σ   g   2           }     ·     (       a   i     -         a     i   -   1       +     a   i       4       )                   Eq   .           ⁢   3               
where exp( ) is the exponential function exp(m)=e m , and erf( ) is the error function
 
     
       
         
           
             
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     The set of quantisation levels ā=(a 0 , . . . , a N−1 ) T  corresponding to the global minimum of J tot  determines the quantisation scheme to be used. 
     The global minimum can be found by numerical multidimensional optimisation methods, searching a first approximated solution as a polynomial sequence, or other methods of optimising global MSE known in the art. 
     Similarly, it is clear that p(x) can be chosen according to knowledge/assumptions about the signal type or by using empirical data. 
     Whilst the above technique provides a superior non-linear transfer function to the previous analog device, it does not provide the means for continuous or even periodic re-estimation of p(x) in case of changes to the nature the input. 
     PREFERRED EMBODIMENT 
     Referring again to  FIG. 4 , a preferred embodiment of the invention utilises programmable non-linear ADCs that can resize any or all of their quantisation bins dynamically. This is of particular value where the input power varies, for example when the input signal has already been passed through an automatic gain control (AGC), which can potentially alter the probability density function of the input signal over time. 
     In this embodiment an iterative gradient descent process is used to update the quantisation levels. An initial estimation of the quantisation levels ā (0) =(a 0   (0) , . . . , a N−1   (0) ) T  is chosen. Usually, ā (0) =(a 0   (0) , . . . , a N−1   (0) ) T  is the optimum set adapted to the distribution of the incoming signal as it occurs in a majority of cases, either taken from stored values as derived previously, or based on a previous update history or by some other estimation means. 
     An iteration counter k is set to 0. 
     Taking the previously defined cost function J, then within the expression for 
                 ∂     J     a   i           ∂     a   i         ,         
i=0, . . . , N−1, the exp and erf functions are substituted by expressions of their Taylor series about the point a i =a i   {k}  (i.e. the current value of a i ), preferably only taking the first-order terms of the Taylor series to minimise complexity, although consistent truncation at any order is feasible.
 
     These terms may be either calculated directly, found by pre-computed look-up table, or using approximation as for example given by “Abramowitz and Stegun: Handbook of mathematical functions, Dover publications, New York, 1972”). 
     The substituted expression is given as 
     
       
         
           
             
               
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     The N linear equations 
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i=0, . . . , N−1 are resolved independently by substituting all remaining a i  within the equations by the approximate a i   {k} , resulting in updated quantisation levels a i   {k+1} , as given below, including special cases for a 0   {k+1}  and a N−1   {k+1} .
 
     
       
         
           
             
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                                   2 
                                 
                               
                             
                           
                         
                         ) 
                       
                     
                   
                   - 
                   
                     exp 
                     ⁢ 
                     
                       
                         { 
                         
                           - 
                           
                             
                               
                                 ( 
                                 
                                   
                                     a 
                                     i 
                                     
                                       ( 
                                       k 
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                                     a 
                                     
                                       i 
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                                       1 
                                     
                                     
                                       ( 
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                                 ) 
                               
                               2 
                             
                             
                               8 
                               ⁢ 
                               
                                 σ 
                                 g 
                                 2 
                               
                             
                           
                         
                         } 
                       
                       · 
                       
                         ( 
                         
                           1 
                           + 
                           
                             
                               a 
                               i 
                               
                                 ( 
                                 k 
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                             · 
                             
                               
                                 
                                   a 
                                   i 
                                   
                                     ( 
                                     k 
                                     ) 
                                   
                                 
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                                   a 
                                   
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                                     1 
                                   
                                   
                                     ( 
                                     k 
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                                 4 
                                 ⁢ 
                                 
                                   σ 
                                   g 
                                   2 
                                 
                               
                             
                           
                         
                         ) 
                       
                     
                   
                 
                 ] 
               
             
           
         
       
       
         
           
             
               denom 
               i 
               
                 ( 
                 
                   k 
                   + 
                   1 
                 
                 ) 
               
             
             = 
             
               
                 
                   
                     2 
                     π 
                   
                 
                 · 
                 
                   σ 
                   g 
                 
                 · 
                 
                   [ 
                   
                     
                       exp 
                       ⁢ 
                       
                         
                           { 
                           
                             - 
                             
                               
                                 
                                   ( 
                                   
                                     
                                       a 
                                       i 
                                       
                                         ( 
                                         k 
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                                 ⁢ 
                                 
                                   σ 
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                           } 
                         
                         · 
                         
                           
                             
                               a 
                               i 
                               
                                 ( 
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                       ⁢ 
                       
                         
                           { 
                           
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                                   ( 
                                   
                                     
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                                         ( 
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                         · 
                         
                           
                             
                               a 
                               i 
                               
                                 ( 
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               + 
               
                 erf 
                 ⁡ 
                 
                   ( 
                   
                     
                       
                         a 
                         i 
                         
                           ( 
                           k 
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                       + 
                       
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                           ( 
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                         8 
                       
                       ⁢ 
                       
                         σ 
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                 ⁡ 
                 
                   ( 
                   
                     
                       
                         a 
                         i 
                         
                           ( 
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                         a 
                         
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                           ( 
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                         8 
                       
                       ⁢ 
                       
                         σ 
                         g 
                       
                     
                   
                   ) 
                 
               
             
           
         
       
     
     If the residual error 
               J   res     =         ∑     i   =   0       N   -   1       ⁢           ⁢              a   i     (     k   +   1     )       -     a   i     (   k   )              2           ∑     i   =   0       N   -   1       ⁢           ⁢            a   i     (   k   )            2               
is below a threshold Δa, set a i =a i   (k+1) , i=0,1, . . . , N−1. Otherwise, set k=k+1 and repeat the update of the Quantisation levels.
 
     The iterative optimisation process can be left ongoing, periodically re-started or used once during an initialisation period. 
     The above embodiment is of particular interest in the case of Orthogonal Frequency Division Multiplexed (OFDM) signals, and more generally within systems with high Peak to Average Power Ratios (PAPR) as they typically exhibit input probability distributions to which the embodiments are well suited. 
     It should be clear to a person skilled in the art that the non-linear transfer function described herein and the predifined and iterative adaptations based thereon are applicable to any Gaussian-like input distribution, and will provide a benefit relative to linear converters for many non-Gaussian input distributions for which a Gaussian approximation is nonetheless superior to a linear one.
A method for conversion of signals between analog and digital characterised by; applying a non-linear transfer function to an input signal, such that the relation between the quantisation levels of the converter and the input signal vary as a non-linear function of the magnitude of the input signal. The non-linear transfer function is related to the probability density function of the input signal so that larger quantisation bins of the converter correspond to less probable values of the input signal.