BACKGROUND OF THE INVENTION 
     The development of low-loss multimode optical fibers has resulted in interest in the light emitting-diode (LED) as a telecommumications optical source. Fiber-optic cables are being used in applications requiring freedom from electromagnetic interference, low weight, and the ability to tolerate high temperature environments. The attractiveness of the optical transmission of digital data is a function of the bandwidth obtained. 
     The frequency limitation in driving an LED is theoretically set by the carrier lifetime, τ c , but is practically established by the ability to supply charging current to the LED&#39;s capacitance. With presently available diodes, carrier lifetime (f=1/(2τ c ), theoretically allows operation at more than 200Mhz. The data rates for practical circuits, however, have only been about 100Mhz. 
     Frequency response, however, is dependent on capacitance, which is a function of area, which determines current handling capability. With the selection of a high capacitance LED, any driver would suffer a speed reduction over the low capacitance case. To obtain high speed, the capacitance of the device must be minimized. This is the distinguishing feature of high speed LED&#39;s. The capacitance of high frequency LEDs may vary, typically from the 100 pF to the 1000 pF range during the switching time. Currents up to 200 mA are required to charge this capacitance at 100Mhz (1000 pF is about 1.6ohms reactive at 100Mhz). 
     LEDS can be modulated directly by step-recovery diodes, Gunn-effect diodes or Trapatt diodes at frequencies of 100Mhz and higher. But a forward-biased LED has a non-linear low impedance. One way to achieve maximum speed is to drive the LEDS directly from a low-impedance source (approximately equal to r d ). However, such a brute force method is not ideal for solid state circuits since the efficiency is low. 
     To prevent the LED rise time from limiting the system bandwidth, the following rule of thumb should be applied: t r  (LED)≦0.35/(2.2BWreceiver). Usually the bandwidth restriction should be assigned to the photoreceiver to maximize signal to noise and sensitivity. 
     A large number of circuits have evolved for the purpose of driving LED&#39;s. Typical high frequency applications require that currents in the 25-200 mA range be put through the diode. A representative circuit for driving an LED is the emitter-coupled video stage. Its basic function, however, as a fast current switch is well recognized and is exploited in the emitter-coupled-logic (ECL) family. In using the discrete version of this circuit, the designer would select a relatively costly device to obtain high speed in the 50-200 mA range, or would parallel two or more devices to obtain a composite Q 2  stage where the current load would be shared. The base of Q 2  would normally be biased to match the video stage to the logic type used to develop the signal. 
     OBJECT OF INVENTION 
     An object of this invention is to use the uncommitted outputs of standard emitter-coupled-logic (ECL) devices to economically drive an LED at high speed and appreciable currents. 
     An object of this invention is to use the uncommitted outputs of standard emitter-coupled-logic (ECL) devices to economically drive an injection diode. 
     Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings. 
    
    
     BRIEF DESCRIPTION OF THE DRAWINGS 
     FIG. 1: The MC 10210 OR gate connected as a current switch to drive a LED 
     FIG. 2: A logic diagram of FIG. 1. 
     FIG. 3: A Schottky diode and current source let the MC 10210 gate operate as current shunt. 
     FIG. 4: Tandem hookup of MC 10210 OR gate doubles drive current to LED. 
     FIG. 5: Power output characteristics of a double heterostructure injection laser diode. 
     FIG. 6: MC 10210 OR gate with the addition of a discrete component current source connected as current switch to drive an injection laser diode. 
    
    
     DETAILED DESCRIPTION OF THE INVENTION 
     A LED can be driven at currents approaching 100 mA and at frequencies up to 100Mhz utilizing available members of the ECL family. Perhaps the most convenient commercially available ECL device for this purpose is the MC 10210 (designated reference numeral 20) high speed dual three input-three output OR gate. This gate has a typical propagation delay of 1.5ns. 
     Most ECL circuits have two V cc  leads, V cc1  and V cc2 . V cc  is a general term for the most positive power supply voltage to a MECL device, usually ground. V cc1  (pins 1 and 15) is the power supply voltage for the output devices. V cc2  (pin 16) is the power supply voltage for the current switches and bias circuit. The separate V cc  pins reduce cross-coupling and V bb  spiking when the ICs drive heavy loads, where V bb  is the midpoint of the ECL logic swing, midway between the upper logic level and the lower logic level. The V cc1  pins 1 and 15, supply current to the output drivers, while V cc2  pin 16 is connected to the circuit&#39;s logic transistors. The MC 10210 device, 20, is used here for driving an LED, a purpose entirely different from the Boolean OR operation. It can only be used for this purpose through an unconventional connection of the outputs. The MC 10210 designed for clock driving, has three emitter follower outputs pins 2, 3, 4, and 14, 13 and 12 for each of its two OR gates. Each output group of three drivers has its own V cc1  pin 1 to 15. Thus, there is free access to the collectors of the output transistors for connection of the LED 33 in a current-switch configuration. By wire-ORing the output emitters, pins 2, 3, 4, 12, 13 and 14, full current drive capability of the multiple OR-gate output structure is obtained. 
     FIG. 1 and FIG. 2 show one LED driver configuration in which the normal logic function is preserved. The input source 40 is wired to pin 5. V Bias  36 is the LED 33 bias voltage, that is the cathode of the LED 33 is connected to the V cc  pin 5 of the gate while the anode of the LED is connected to V Bias  36. R E  37, which is a current setting resistor, is connected to pins 2, 3, 4, 12, 13 and 14. The value of R E  37 is selected to provide the desired current for the emitter coupled pair and, in turn, the LED current. V EE  39, the most negative power supply voltage, usually -5.2 volts, is at pin 8. V TT  38 a termination resistor voltage supply for the outputs is nominally -2.0 volts when V EE  is -5.2 volts. V TT  38 or V EE  39 is connected to output terminals through R E  37. The V CC  -V EE  voltage differential is generally limited to less than  8 volts. V CC  is the higher bias value and is generally 0 volts (ground). This allows the gate inputs 9, 10, 11 on the LED driving half of the IC to be left open (logic ZERO), while the logic signal can be applied to the other gate. Thus the output transistors function as a composite emitter follower Q 1  34, which drives a composite base amplifier Q 2  35. 
     Electrically, the signal that appears at the gate outputs 2, 3, 4, 12, 13, 14 is very similar to what would appear if the LED were not inserted in the collector circuit. That is, when any of the inputs 5, 6, 7 are high (logic ONE), while inputs 9, 10, 11 are low (logic ZERO), the output 2, 3, or 4 is high (logic ONE). 
     However, these outputs are not now the primary outputs. The concern here is with the photon output of the light emitting diode. In FIG. 1, when the input is high, the output gate is high, but the light intensity of the LED is low. Correspondingly, when the input is low, the photon output of the LED is high. That is, a conversion from electrical representation to light representation has been made. 
     The circuit can also be driven differentially by complementary operation of the two gates. The circuit of FIG. 1 would be expected to have slightly better frequency performance than the differential drive circuit. 
     However, Q 1  34 will never be turned off and only about half the current swing, V OL  -V EE  /2R E  vs. V OH  -V EE  /R E  of the differential drive is available. V OL  is the output logic LOW voltage level, that is, the voltage level at the output terminal for a specified output current, with the specified conditions applied to establish a LOW level at the output. Similarly V OH  is the output logic HIGH voltage level. Maximum speed can be obtained when the LED supply, V Bias , is higher than V CC2 . But reasonable results are obtained if the V CC  supply is increased to above 6 volts and used for both V CC1 , V CC2  and the LED V Bias . 
     For the nominal 5.2 volts V CC  -V EE  differential, the Q 2  35 emitter voltage will be about -1.7 volts. With a 1.3 volts drop across the LED 33, the base-collector junction becomes forward-biased by 0.3 to 0.4 volts, and the transistor approaches saturation. 
     An alternate approach to the logic-gate drive method is to shunt a constant current source on or off the LED 33, depending on the gate logic input. The circuit of FIG. 3 uses a Schottky 41 or other fist diode to pull the LED&#39;s 33 anode potential below ground when the composite Q 2  35 emitter is at V OL  (logic ZERO) thereby back biasing the LED and shunting the constant current source 50 through Q 1  34. The current demand through Q 1  34, established by R E  37, should be slightly higher than the constant current source value. This will guarantee that the Schottky diode 41 has some drive. Then when the logic input changes, Q 1  34 will be cut off and the constant current source 50 will be shunted through the LED 33. The available LED current is just slightly less than (V OL  -V EE )/2R E . 
     This circuit can also be driven differentially. Fastest circuit operation, as before, is obtained for common-emitter/common-base operation. True constant-current performance results from the differential drive, and the current through R E  37 is halved. The LED current doesn&#39;t change appreciably, but the output power dissipation gets cut in half because either Q 1  34 or Q 2  35 is always off. 
     To get higher current drive, all six output transistors can be connected to form one composite device. The circuit can then drive a 100 to 150 mA load. At only a small sacrifice in speed, two of the 10210 ICs can be connected in tandem to form the differential drive circuits of FIG. 1 and FIG. 3. 
     The MC 10210 can also be connected as one composite device and used single-ended for applications where high speed isn&#39;t critical but high current drive is (FIG. 4). The standard termination potential, V TT  38, of -2 volts proves useful, since it allows a large current swing in the LED 33. 
     The emitter-coupled, current switch configurations can also drive double-heterostructure, AlGaAs diode injection lasers 45. Such laser diodes 45 have a power output that typically has a threshold level, but they can reach bit rate of 1 GHz. See FIG. 5. The diode 45 should be prebiased to just below threshold to avoid the time delay associated with population inversion buildup when the current is switched on. 
     The circuit of FIG. 1 can be used with the addition of a discrete component constant current source 50 as shown in FIG. 6. The current through the laser diode 45 is approximately (V OL  -V EE )/2R E  when the input signal is high and increases to (V OL  -V EE )/R E  when the input goes low. The idling current is established by the current source but can also be produced by an inductively coupled bleed. 
     The MC 10210 is rated at 40 mA maximum for each output driver and should be capable of an output approaching 120 mA total for all six drivers. If even more power is needed the tandem connection or a discrete component emitter-coupled current switch can be used. The MC 10123 (a triple 4-3-3input bus driver) can supply a full 40 mA per output emitter-follower and might be more useful in some applications. The MC 10128 bus driver can provide still more current than the 10123.
Methods of driving a light-emitting diode (LED) or an injection diode at very high digital data rates using high speed emitter coupled logic (ECL) gates.