BACKGROUND 
   The subject invention relates generally to document rendering, and more particularly to rendering of gray scale images with devices that have a limited ability to print elements or data with a finite number of gray scale levels. The invention is particularly applicable to image rendering from printing devices. However, it will be appreciated that the teachings herein are suitably used in connection with any image rendering device. 
   Halftoning is a process by which gray scale images may be generated on a device that may, for example, only produce black dots on a white background. In a halftoning system, a small area or array of dots is treated as a large picture element (“halftone cell”). While this area is substantially larger than that of a dot, selectively turning on various dots or patterns of dots in this area allows it to be perceived, from a distance, as having a shade of gray associated with such a dot arrangement. These “dithered” areas are constructed so as to be placed to allow for visual perception of gray levels to be associated with each such area. Thus, halftoning allows for a trade off between resolution and gray scale. This allows for generation of fairly accurate, black-and-white images from a monotone document rendering device, such as a common laser printer. 
   More recently, devices such as printers have the ability to generate dots in two or more gray scale levels. While this additional capability allows for generation of high resolution gray scale levels, frequently the number of gray scale levels that are available for generation of a suitable image is insufficient for visual acceptability. Thus, a hybridized system that allows for generation of dithered or halftone images, which system also uses the gray scale capabilities native to a device, is advantageous. 
   Earlier systems that seek to use a combination of native gray scale levels with halftoning have been heretofore implemented with complicated procedures. Such procedures, for example, may incorporate a mechanism for switching between various arrays, each of which requires a specialized data structure. Additionally, such structures often require unique software or hardware environments to allow for generation of images. 
   It is desirable to have a system and method that quickly and simply implements halftoning in systems that have limited, native gray scale generation capability and that allows for ready implementation of standardized data structures for output in a multi-bit halftone image rendering device. 
   SUMMARY OF INVENTION 
   In accordance with the present invention, there is provided a system and method that quickly and simply implements halftoning in systems that have limited, native gray scale generation capability. 
   Further, in accordance with the present invention, there is provided a system and method that allows for ready implementation of standardized data structures for output in a multi-bit halftone image rendering device. 
   In accordance with the present invention, there is provided a system for receiving n-bit encoded image data. This encoded image data includes that representative of a plurality of pixels having 2 n  gray scale levels, wherein n is an integer greater than one. Further in accordance with the present invention, the system and method include a network for communicating data having 2 n  available gray scale levels wherein n is an integer greater than one to a document processing device. The system is directed to image rendering on a document processing device which has an ability to generate 2 m  discrete gray scale levels, wherein m is a positive integer less than n. Any suitable two-dimensional threshold array is suitably utilized. However, in the preferred embodiment, an array is chosen that has 2 n−m+1  elements. In accordance with received image data, one of the available m gray scale levels, or bits, are chosen, and this value is used to generate a dither matrix. This value is chosen in accordance with gray scale levels associated with an input image pixel. Within this matrix, additional dithering is provided to accomplish further gray scale gradations in accordance with an input image pixel. 
   In accordance with a limited aspect of the present invention, dithering added to a dither matrix is accomplished to further define perceived gray scale for such matrix. 
   In accordance with a more limited aspect of the present invention, each dither matrix is provided with two gray scale levels, a first being defined as a selected background gray scale level and a second being associated with all elements that are used to selectively populate the dither matrix to accomplish half-toning. 
   An advantage of the present invention is the provision of a system that quickly and simply implements halftoning in systems that have limited, native gray scale generation capability. 
   Another advantage is the provision of a system which allows for ready implementation of standardized data structures for output in a multi-bit halftone image rendering device. 
   Yet another advantage is the provision of an image rendering system which allows for ready utilization of available, native gray scale levels as described in any common printer display language to produce multi-level halftones. 
   Yet another advantage is the reduced contrast between a dot and its surrounding dots for reduced visibility of the halftone pattern itself when compared to more conventional halftoning techniques. 
   Further advantages will be appreciated by one of ordinary skill in the art by reading and understanding the subject specification. 


   
     BRIEF DESCRIPTION OF THE DRAWINGS 
     The subject invention will be described in connection with a series of figures, which are used to disclose the preferred embodiment of the invention, and not for the purposes of limiting the same, wherein: 
       FIG. 1  is a block diagram of an image rendering system using the multi-bit halftone generator of the subject invention; 
       FIG. 2  illustrates a multi-bit halftone generator of the subject invention; and 
       FIG. 3  illustrates a representative example of a multi-bit halftone generation in connection with the subject invention. 
   


   DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT 
   Turning to  FIG. 1 , an image rendering system A includes a multi-bit halftone generator  10  that receives electronic document data suitably in any standardized format via any suitable means. In a preferred embodiment, a PostScript format as propagated by Adobe Systems, Inc., is received as a threshold array  12 , such as that employed in Adobe Systems Type 1, Type 3, Type 6 or Type 10 formats. However, it is to be appreciated by one of ordinary skill in the art that any suitable page description language is contemplated for use. 
   The multi-bit halftone generator  10  is connected via any suitable means to receive threshold matrix information from threshold matrix storage  12 . The threshold matrix is used to generate halftone patterns as will be described in more detail below. While the preferred embodiment is directed to gray scale halftone generator it is to be appreciated that the subject system is fully capable to generate color tones in systems in which only a limited color palette is available. A multi-bit halftone image that has been generated by the generator  10  is communicated to a print engine  14  for rendering of an image or graphic element  16  therefrom. 
   Turning now to  FIG. 2 , the multi-bit halftoning generator  10  will be described in greater detail. In the subject image rendering, input image information is received in a format having n bits. These n bits provide 2 n  levels and are used with a threshold array of values to form an image. An output of digital data includes a value corresponding to m bits herein referred to as M or this value incremented by +1, i.e., M+1. It should be noted that 1 is not added in the event that M is of its maximum value, i.e., 2 m −1. In the event that a threshold array contains to 2 (n−m+1)  levels, than a total number of gray levels, including the printers inherent number of gray levels, will be equal to, or greater than, the full n bits, that is, 2 n  levels. The subject multi-bit image generator functions to extract information from a digital data input to allow for selection of levels of the various gray scale levels that can be generated by an image rendering device, such as a printer. While a document processing device such as a printer is a preferred embodiment, it will be appreciated by one of ordinary skill in the art that any device that renders an image from digital data is contemplated, such as facsimile machines, visual display terminals, and the like, as well as printers including laser printers, ink jet printers, and the like. 
   In the preferred embodiment, encoded image data is received which is binary, and is comprised of n bits, wherein n is a positive integer greater than one. Also, in the preferred embodiment, a Little Endian notation is used wherein lower order bits appear rightmost and higher order bits appear leftmost. Such notation is commonly employed, by way of example, in Intel processors. It is to be appreciated that a Big Endian format, wherein lower order bits appear leftmost and higher order bits appear right most, such as found in Motorola processors, is also readily utilized by using the bits in an opposite fashion as that in the illustration. 
   In the illustration, the higher or more significant m bits are used to select a native gray scale level that can be generated by the image generating device. A lower order or  n−m  bits are used to provide data values for comparison to a threshold array value. It will be appreciated by one of ordinary skill in the art that an output of a comparison is dependent upon whether an image, array, or both are additive or subtractive. For both image and array values that are subtractive, if an image value is greater than a threshold array value, a comparison operator outputs a value of M as represented by the m bits. Otherwise, it outputs a value of M+1. In the event that the image data and/or threshold data are additive in nature, the comparison is suitably adjusted to generate the correct results. This comparison output is then used as the output of the halftone process. Such extraction, or filtering, of high order m bit and low order  n−m  bits from image is suitably accomplished by means of masking techniques and/or bit shifting techniques as will be appreciated by one of ordinary skill in the art. As illustrated in  FIG. 2 , input image data V in  is received into a storage location  20 , from which location such masking and/or shift operation is suitably accomplished. As illustrated in the Figure, the input image is n bits in length. The most significant m bits are routed to a halftone module  22 . The  n−m  bits of an input image data portion are routed to halftone module  22  from which a determination, as noted above, of output relative to a selected threshold value T will be a zero or a one. A combination of the native resolution and interaction with the threshold array V forms an output value of either M+1 or M which is communicated to the image rendering device ( FIG. 1 ). 
   Turning now to  FIG. 3 , illustrated is an example of a multi-bit halftone rendering accomplished in connection with the afore-noted system. In  FIG. 3 , an input image data element is six bits in length. The image rendering device is capable of rendering dots of four different gray scale levels, i.e., m=2, such that M=0, 1, 2 or 3. While this limited gray scale capability is advantageous, it is insufficient for generating suitable images for viewing, which images employ substantially more colors or shades of gray. In the example, the four gray scale levels that can be output by the image generating device can be represented by two bits, which allows for representation for four possible values 00, 01, 10 and 11. This example sets the value m as two bits, which are the most significant bits from each group of six. The remaining four, n−m bits allow for 16 areas to be represented in an image formed by a threshold array. With specific reference to array  30 , illustrated is a threshold array having 16 locations, which is illustrated as a square array which is employed in one embodiment. However, it will be appreciated that any suitable two-dimensional array pattern is readily usable. The numbering in the blocks at  30  shows a build pattern for various bit patterns from the n−m bits. A pattern will be built 0, 1, 2, 3, . . . 15 in the locations of representative threshold array  30 . With specific reference to array  42 , illustrated is a threshold array having 32 locations, which is illustrated as a rectangular array, which is employed in one embodiment of the subject application. The numbering the blocks at  42  shows a build pattern for various bit patterns from the n−m+1 bits. A pattern will be build 0, 1, 2, 3, . . . P in the locations of representative threshold array  42 . The four gray scale dots that can be generated directly by the representative image generation device of the example are shown by  32 . 
   Turning to row  34 , illustrated is a build pattern for various gray scale levels associated with a first level of input. As used herein, V illustrates a numeric increase in a series of sets of 6 bits that are received into the multi-bit halftone generating device  10  representing image data to be rendered. It will be noted that the first two bits, corresponding to the highest order bits and the gray scale generation capability native to the output device, have been separated for ease and understanding. In this instance in row  34 , it will be appreciated that these first two bits are zero. Thus, the level zero from possible gray scale values listed at  32 , selected as white, is chosen as a default color for all pixels. As the lower order n−m+1 bits increase from left to right, the representative box as specified by the build pattern of the threshold array  42  is filled. 
   Turning next to row  36 , it will be noted that the most significant bits in each instance are 0 and 1. This results in a selection of a second gray scale level  1  as illustrated by possible values  32 . As V increases from 32, 33, . . . , a build pattern of array  42  is implemented, as it was in connection with row  34 . In this instance, the build pattern for lower order bits is selected from gray scale level  2  from available levels  34 . It will be appreciated by reference to row  34 , as well as  36 , that the preferred embodiment herein allows for this array to be selectively populated with a gray scale value 1 higher than that associated with a background level for each array as set by the most significant bit m. It will be appreciated that a similar build pattern is realized in connection with row  38 , in which the most significant bits are represented by gray scale level  2  of available levels at  32 . Similarly, as V increases from 64, 65, . . . , a build pattern of array  42  is again implemented, this time with dots having gray scale level  3  from available levels illustrated at  32 . 
   With reference to row  40 , it will be appreciated that the two most significant bits are 11, which results as a selection of the darkest gray scale level  3  from options listed at  32 . It will be noted that this results in an entire array of fully darkened pixels. Thus, at V equals 96, the lower bits are irrelevant insofar as a fully darkened area is resultant. Given this situation, it is advantageous to employ scaling for the subject grayscale levels such that saturation, such as is illustrated by row  40 , is avoided by shifting grayscale levels. 
   Although the preferred embodiment has been described in detail, it should be understood that various changes, substitutions, and alterations can be made therein without departing from the spirit and scope of the invention as defined by the appended claims. It will be appreciated that various changes in the details, materials and arrangements of parts, which have been herein described and illustrated in order to explain the nature of the invention, may be made by those skilled in the area within the principle and scope of the invention as will be expressed in the appended claims.
A multi-bit halftone generating system provides for halftone intergeneration in printers which can print dots of plural gray scale levels. Input image data includes information for more gray scale levels than can be handled by those associated with a printing device. Higher order bits of the pixels of the electronic document are used to select a gray scale level from those available from the printer. Remaining bits are used to generate a halftone pattern which is superimposed upon this selected gray scale. Thus, improved dither rendering is quickly and efficiently accomplished and improved image generation results from using the gray scales available from the printing device.