TECHNICAL FIELD  
       [0001]     Embodiments of the present invention relate generally to electronic systems and in particular to operational amplifiers. Particular embodiments relate to using operational amplifiers configured with current- and voltage-feedback amplifier stages.  
       BACKGROUND  
       [0002]     Operational amplifiers are a basic building block in electronic systems, and their performance broadly affects the overall performance of the systems in which they are embedded. The performance of operational amplifiers has been generally limited by the underlying characteristics of the transistors and other components with which they are built. Such component limitations directly affect the maximum bandwidth of the amplifier, its gain, and the efficiency with which it can amplify signals.  
         [0003]     Substantial progress has been made in the development of new amplifier circuits for applications requiring high amplifier performance since the invention of the transistor in the late 1940s. The familiar textbook transistor voltage amplifier, using a resistor in series with the collector and a grounded emitter, has been substantially replaced by current-based configurations using a compensating transistor directly coupled to the base of an amplifying transistor to provide current feedback. This approach, which is also referred to as a translinear circuit or translinear loop, substantially improves linearity and provides inherent temperature compensation. This circuit and variations are described in B. Gilbert, “A New Wide-Band Amplifier Technique,” IEEE J. Solid State Circuits, Vol. SC-3, No. 4, December 1968, pp. 353-365, which is incorporated herein by reference. Translinear circuit elements are described by B. A. Minch, et al., “The Multiple-Input Translinear Element: A Versatile Circuit Element,” Proc. 1998 IEEE International Symposium on Circuits and Systems, Vol. 1, 31 May 1998, pp. 527-530, which is referenced and incorporated herein. Current mirrors are now also used to couple the output of one amplifying stage to the input of another without the need for frequency-limiting coupling capacitors as described in P. Horowitz, et al., “The Art of Electronics,” Cambridge Univ. Press, 2nd Ed., 1989, pp. 98-104, which is incorporated herein by reference. Low impedance circuit nodes associated with current amplification in present amplifiers substantially eliminate the otherwise unavoidable high-frequency poles associated with circuit parasitic capacitance and enable the design of amplifiers with bandwidths approaching the underlying transistor frequency ft, the frequency at which the current gain of a transistor falls to unity. Differential amplifiers provide input signal symmetry and are readily configured with paired transistors. Class AB input amplifiers achieve high efficiency by alternately conducting current with some current overlap through the two output transistors depending on the polarity of the input signal. Class AB amplifiers with sufficient feedback can still provide high levels of linearity and high gain, and can be arranged with further symmetry with respect to the bias supply by totem-pole circuits employing complementary transistor types. Such circuits are described, for example, by N. Gibson, et al. in U.S. Pat. No. 6,794,943, which is hereby referenced and incorporated herein. The overall result of these developments is circuits with amplifying bandwidth from dc to almost the ft of the constituent transistors, and with high levels of linearity. Stable amplification gains are thereby provided that are substantially independent of temperature but are dependent principally on the ratio of transistor areas.  
         [0004]     Nonetheless, new applications for high bandwidth amplifiers continue to challenge previously obtainable results and present new needs for amplifiers with even better linearity while maintaining wide amplification bandwidth. High output drive capability and high gain are also often required. An example of such a need is for XDSL telephone circuits that accurately transmit high data-rate signals to modems on remote customer premises. A digital subscriber line, or DSL, can be configured in various arrangements, one of which is an asymmetric digital subscriber line, or ADSL, that transmits data at different rates depending on the direction of transmission; a generic descriptor for a DSL in one of various possible arrangements is “xDSL.” These XDSL applications utilize signals with frequency components exceeding 10 MHz and require minimal signal distortion for reliable data transmission. These applications also require the high amplification efficiency ordinarily associated with Class AB amplifiers to prevent overheating, but as the signal bandwidths continue to be extended beyond 10 MHz, the normal high efficiency of Class AB amplifiers is compromised by prior-art approaches that generally exhibit some level of current shoot-through in the last amplification stage that drives the output signal. This shoot-through results in power increase and degradation in linearity that can be at least proportional to the frequency of the signal being amplified. Thus, a new circuit approach is required to satisfy these applications without undue degradation in system performance, and that can use ordinary silicon components without introducing unnecessary power dissipation.  
         [0005]      FIG. 1  shows a cascade circuit arrangement for a wide bandwidth amplifier of the prior art, illustrated generally as the amplifier  100 , and is identified herein as Version 1. This circuit utilizes two cascade-coupled current-feedback amplifier stages driving a power output stage, and produces an output voltage V OUT  from differential input voltage signals V IN + and V IN −. The amplifier  100  typically operates as a Class AB amplifier to provide high amplification efficiency. The amplifier  100  is configured with a first current-feedback amplifier sub-circuit including the bipolar transistors Q 1 , Q 2 , Q 3 , and Q 4  arranged as a generally symmetric differential current-feedback amplifier, and is supplied with constant and substantially equal currents from the current sources I 1  and I 2 . The areas of transistors Q 1 , Q 2 , Q 3 , and Q 4  are also generally equal. The transistors Q 2  and Q 4  can alternatively be configured as emitter followers as is well understood in the art. Current-feedback amplifiers are generally used in such applications because they can provide high slew rates, usually with good linearity, in response to high-frequency input signals. The current sources I 1  and I 2  are coupled respectively to the positive and negative bias rails V CC  and V EE . Currents supplied by these current sources may be on the order of 0.1 mA, but other current levels can be used to meet the needs of a particular application.  
         [0006]     The output currents from this non-symmetric input buffer subcircuit are reflected by current mirrors CM 1  and CM 2  to provide input currents for a second, current-feedback amplifier sub-circuit configured with bipolar transistors Q 5 , Q 6 , Q 7 , and Q 8 . The current mirrors CM 1  and CM 2  are usually configured with unity gain but can be arranged to provide current gain by altering the ratio of their constituent transistor areas as is well known in the art. The areas of transistors Q 5 , Q 6 , Q 7 , and Q 8  are also usually equal. Transistors Q 5  and Q 7  are arranged in a diode-coupled circuit configuration to provide dc bias for transistors Q 6  and Q 8 . A high-impedance node, node A, is formed at the junction of the emitters of transistors Q 5  and Q 7  and is by-passed to the negative bias rail V EE  with compensation capacitor C 1  to provide low impedance for signal components of interest and stable operation. The output currents from this second, current-feedback amplifier sub-circuit produced at the collectors of transistors Q 6  and Q 8  are reflected by current mirrors CM 3  and CM 4 , also usually configured with unity gain, and are coupled to a unity gain buffer configured with bipolar transistors Q 9 , Q 10 , Q 11 , and Q 12 . The areas of transistors Q 9 , Q 10 , Q 11 , and Q 12  are usually equal. Transistors Q 9  and Q 11  are arranged in a diode-coupled circuit configuration to provide dc bias for transistors Q 10  and Q 12 . Transistors Q 9 , Q 10 , Q 11 , Q 12 , Q 13 , Q 14 , Q 15 , and Q 16  constitute a buffered amplifier for the output signal V OUT . A high-impedance node is formed at node C, the junction of the emitters of transistors Q 9  and Q 11 , and is by-passed to the negative bias rail V EE  with compensation capacitor C 2 , again to provide a low impedance for signal components of interest and stable operation. The output node of this third sub-circuit is coupled to a further current mirror configured with bipolar transistors Q 15  and Q 16  and another current mirror configured with bipolar transistors Q 13  and Q 14  that are arranged to drive the output signal V OUT . The transistors Q 14  and Q 16  are large to support the high output-current driving ability of the amplifier, and are indicated on the figure as being N times larger than the transistors Q 13  and Q 15  where N can be substantially larger than unity and by and large is dependent on the system specifications. In practical terms, these ratios should be large enough to maintain low power dissipation and good linearity when driving heavy loads. Thus, the current mirrors configured with bipolar transistors Q 15  and Q 16  and transistors Q 13  and Q 14  have current gains of approximately N: 1.  
         [0007]     The output, V OUT , from the amplifier  100 , is coupled through the resistor R 1  to an inverting node, node B, of this cascaded amplifier arrangement to provide negative feedback to configure the gain of this portion of the amplifier  100 . The current gain and stability of the amplifier  100  depend on the resistor R 1 .  
         [0008]     A significant limitation of the circuit configuration illustrated in  FIG. 1  is the high level of bias current that is drawn when amplifying signals with high-frequency components such as encountered in xDSL applications. This is a consequence of current “shoot through” resulting from the substantial collector-to-base junction capacitance of the large output transistors Q 14  and Q 16 . When transistor Q 16  is turned on by a high-frequency signal, the output voltage V OUT  increases and an incremental current flows into node D due to the collector-to-base junction capacitance of transistor Q 14 . This current divides between the bases of transistors Q 13  and Q 14 , but substantially all of the current flows into the base of transistor Q 14  due to its larger area. The current moderately raises the voltage of node D because it is coupled to bases of two transistors with grounded emitters, and thereby briefly turns on transistor Q 14  by the current that is caused to flow though the collector-to-base junction capacitance of transistor Q 14  by the increasing voltage difference between its collector and base. Thus, a current shoot-through path is formed from the V CC  bias rail to the V EE  bias rail that can result in power dissipation for each cycle of the high-frequency signal being amplified. If the frequency components of the input signal are sufficiently high, the power dissipated is significant. A similar dissipative path is formed for current resulting from quickly varying voltage across the collector-to-base junction capacitance of transistor Q 14  when the output voltage V OUT  is rapidly decreasing. The voltage of node E is correspondingly reduced, briefly turning on transistor Q 16  by the current that is caused to flow though the collector-to-base junction capacitance of transistor Q 16  by the increasing voltage difference between its collector and base. Again, shoot-through results for each cycle of the high-frequency signal. Thus, substantial power is dissipated by the circuit in  FIG. 1  when amplifying signals with high-frequency components, particularly above 10 MHz such as for xDSL type signals. The power dissipation is a consequence of the totem-pole arrangement of the output portion of the amplifier and the uncompensated collector-to-base capacitance of the output transistors with collectors coupled in series and to the output. Such high power dissipation results in low amplifier efficiency and even component damage if sufficient heat-sinking arrangements are not provided for the power-dissipating circuit elements. Although this circuit can be configured with high voltage gain, it also does not provide sufficient amplification linearity for high performance xDSL applications.  
         [0009]      FIG. 2  shows another cascade arrangement of two current-feedback amplifier stages of the prior art, illustrated generally as the amplifier  200 , and identified herein as version 2. Amplifier  200  also utilizes two cascade-coupled current-feedback amplifier stages driving a power output stage to produce an output voltage V OUT  from a differential input signal V IN + and V IN −. This second version can provide better amplification linearity than the first version illustrated in  FIG. 1 , but exhibits even worse shoot-through and attendant lower efficiency than the circuit illustrated on  FIG. 1 , particularly when amplifying signals with frequency components greater than 10 MHz.  
         [0010]     The amplifier  200  includes current sources  11  and  12  and transistors Q 1 , Q 2  . . . Q 8  that are similar to corresponding circuit elements on  FIG. 1  with the same reference designations and will not be re-described in the interest of brevity. The current sources  13  and  14  replace the current mirrors CM 3  and CM 4  illustrated on  FIG. 1  and typically provide equal currents to bias the collectors of transistors Q 6  and Q 8 . These currents are not necessarily equal to the currents from current sources  11  and  12 . The output current signals from transistors Q 6  and Q 8  are coupled to transistors Q 19  and Q 20  which are biased by bias sources BIAS A  and BIAS B . These bias sources may be configured, for example, with translinear loops as illustrated and described below with reference to  FIG. 3   a  to provide a stable dc operating point for transistors Q 19  and Q 20 . Other bias schemes could be used. Transistors Q 19  and Q 20  are typically larger than transistors Q 1 , Q 2  . . . Q 8  to provide sufficient drive for the output stage. Capacitors C 5   6  and C 6   6  provide added Miller compensation for the second stage of the amplifier beyond that normally provided by the intrinsic collector-to-base capacitance of the transistors and are included to split high-frequency poles in the circuit for added stability. Transistors Q 23  and Q 25  provide linearized and temperature-corrected bias voltage for the output transistors Q 24  and Q 26 . The area ratio of Q 23  to Q 24  is 1: M as indicated on the figure, where M is usually substantially greater than unity and by and large is determined by system requirements and process parameters. The area ratio of Q 25  to Q 26  is also 1:M. The resistor R 2  injects a feedback current signal dependent on the output voltage V OUT  into the node B, which is a low impedance signal-inverting node for the current feedback amplifier—stage  2 . The resistor R 2  is usually selected to provide unity gain for the current feedback amplifier—stage  2 . The resistor R 2  also affects circuit bandwidth and stability.  
         [0011]     The amplifier  200  illustrated on  FIG. 2  also exhibits shoot-through because Q 19  and Q 20  have substantial Miller compensation capacitance plus the parasitic collector-to-base capacitance that forms a dynamic current path for high-frequency signals that is in phase between the base of Q 19  and the base of Q 20 . An unwanted increase in signal current is directly coupled to the output stage that in turn amplifies the current, producing a shoot-through current pulse. The output stage is configured with large-area transistors Q 24  and Q 26  that provide the further current pulse amplification. Thus, a current shoot-through path is formed from the V CC  bias rail to the V EE  bias rail that can result in significant power dissipation, and substantial power is dissipated by the circuit on  FIG. 2 , particularly when amplifying signals with frequency components above 10 MHz, again due to the totem-pole arrangement of the output portion of the amplifier and the uncompensated collector-to-base capacitance of the output transistors, this time with emitters coupled in series and to the output.  
         [0012]     Thus, linear amplifiers employing circuits of the prior art have limited utility in xDSL and other wide bandwidth applications requiring high efficiency. Wide bandwidth signals ordinarily incur unnecessary power losses using totem-pole circuit configurations of the prior art due to current shoot-through, particularly when utilizing two transistors of substantial area and configured either with emitters or collectors coupled in series. A need thus exists for further improvement to these circuits to reduce or eliminate shoot-through without compromising circuit linearity, bandwidth, gain, or output drive capability.  
       SUMMARY OF THE INVENTION  
       [0013]     In one aspect, the present invention relates to utilizing a voltage feedback amplifier stage to drive a totem-pole output stage. The voltage feedback amplifier stage can in turn be driven by a current-feedback amplifier stage. In an exemplary application, the amplifier is configured to drive an xDSL load which requires an amplification bandwidth exceeding 10 MHz with substantial linearity and gain. The design and efficient manufacture of amplifiers with high gain, linearity, and wide bandwidth without compromising power efficiency for such loads is thereby enabled.  
         [0014]     Embodiments of the present invention achieve technical advantages by configuring a linear amplifier circuit with a voltage feedback amplifier to drive a totem-pole output stage. Preferably the output stage of the linear amplifier circuit is configured as a Class AB amplifier. Preferably, the output stage of the linear amplifier circuit includes a series arrangement of an npn output transistor and a pnp output transistor with their emitters coupled together and to an output node. Preferably, the output transistors are driven with their bases coupled to the bases of feedback compensating transistors arranged in a diode configuration. Preferably, the output stage is driven by a voltage amplifier also configured with totem-pole elements wherein a conductive path is included to reduce conduction of an output transistor in the output stage when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. Preferably a current-feedback amplifier stage is included to drive the voltage feedback amplifier stage. And preferably, a capacitor is included between the collector and base of a transistor in the circuit path that drives an output transistor in the output stage to briefly reduce its conduction when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. Preferably, the linear amplifier is configured with high gain to produce high amplification linearity.  
         [0015]     Embodiments of the present invention achieve technical advantages by configuring an xDSL communication system with a linear amplifier circuit employing a voltage feedback amplifier to drive a totem-pole output stage. Preferably, the output stage driving an xDSL line is configured as a Class AB amplifier. Preferably, the output stage includes a series arrangement of an npn output transistor and a pnp output transistor with their emitters coupled together and to an output node. Preferably, the output transistors are driven with their bases coupled to the bases of feedback compensating transistors arranged in a diode configuration. Preferably, the output stage is driven by a voltage amplifier, also configured with totem-pole elements wherein a conductive path is included to reduce conduction of an output transistor in the output stage when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. Preferably, a current-feedback amplifier stage is included to drive the voltage feedback amplifier stage. And preferably, a capacitor is included between the collector and base of a transistor in the circuit path that drives an output transistor in the output stage to briefly reduce its conduction when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. Preferably, the linear amplifier is configured with high gain to produce high amplification linearity.  
         [0016]     Another embodiment of the present invention is a method of configuring a linear amplifier circuit by coupling a voltage feedback amplifier in a cascade arrangement to drive a totem-pole output stage. Preferably the method includes configuring the output stage as a Class AB amplifier. Preferably, the method includes configuring the output stage with a series arrangement of an npn output transistor and a pnp output transistor with their emitters coupled together and to an output node. Preferably, the method further includes coupling the bases of the output transistors to the bases of feedback compensating transistors arranged in a diode configuration. Preferably, the method includes driving the output stage by a voltage amplifier also configured with totem-pole elements and including a conductive path to reduce conduction of an output transistor in the output stage when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. Preferably, the method includes employing a current-feedback amplifier stage to drive the voltage feedback amplifier stage. Preferably, the method further includes coupling a capacitor between the collector and base of a transistor in the circuit path to drive an output transistor in the output stage so as to briefly reduce its conduction when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. The capacitor may be included to provide frequency compensation for the voltage-feedback amplifier.  
         [0017]     Embodiments of the present invention thereby achieve technical advantages as a linear amplifier with high gain, high linearity, wide bandwidth, high output drive capability, and high power efficiency.  
     
    
     BRIEF DESCRIPTION OF THE DRAWINGS  
       [0018]     For a more complete understanding of the present invention and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:  
         [0019]      FIG. 1  shows a linear amplifier of the prior art including two cascade-coupled current feedback amplifier stages configured as a line driver to drive an xDSL circuit;  
         [0020]      FIG. 2  shows a linear amplifier of the prior art including two cascade-coupled current-feedback amplifier stages configured as a line driver to drive an xDSL circuit;  
         [0021]      FIG. 3  shows a linear amplifier of the present invention including cascade-coupled current-feedback and voltage-feedback amplifier stages configured as a line driver to drive an xDSL circuit;  
         [0022]      FIG. 3   a  shows voltage feedback amplifier and output portions of the circuit illustrated in  FIG. 3  including a biasing arrangement configured with translinear loops; and  
         [0023]      FIG. 4  is a graph comparing the supply current requirement as a function of frequency of the input signal of the amplifier circuits illustrated in  FIGS. 1, 2 , and  3 .  
     
    
     DETAILED DESCRIPTION  
       [0024]     The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.  
         [0025]     Embodiments of the present invention will be described with respect to preferred embodiments in a specific context, namely an amplifier circuit configured with a voltage-feedback amplifier stage driving an output amplifier. A current-feedback amplifier stage can also be configured to drive the voltage-feedback amplifier stage. The invention may be applied to an amplifier arrangement to drive an xDSL line for which high gain, wide bandwidth, low distortion, high drive capability, and high efficiency are required; however, the application of the invention is not limited to these applications.  
         [0026]     Turning now to  FIG. 3 , illustrated generally as the amplifier  300  of the present invention configured with a current-feedback amplifier stage followed by a voltage feedback amplifier stage driving a power output stage, is described herein as version 3. The amplifier  300  includes current sources I 1  and I 2  and transistors Q 1 , Q 2  . . . Q 4  that are similar in connection and operation to corresponding circuit elements on  FIG. 1  with the same reference designations and will not be re-described in the interest of brevity. The differential input signals V IN + and V IN − produce reflected currents from current mirrors CM 1  and CM 2  that are coupled respectively to the bases of transistors Q 46  and Q 45 . Node A and node H form, respectively, the non-inverting and inverting inputs to a symmetrically arranged voltage-feedback differential amplifier configured with transistors Q 29 , Q 30  . . . Q 32  and transistors Q 41 , Q 42  . . . Q 48 . The current sources I 9  and I 10  respectively bias the emitters of transistors Q 46  and Q 45 , and current sources I 11  and I 12  respectively bias the emitters of transistors Q 47  and Q 48 . Transistors Q 29  and Q 30  and transistors Q 31  and Q 32  form a symmetric pair of current mirrors for this differential amplifier. The circuit is configured so that the voltage at node A′ accurately matches the voltage at node A with very wide bandwidth, such as bandwidths including frequencies higher than 10 MHz, and the voltage at node H′ accurately matches the voltage at node H, also with very wide bandwidth. Thus, a voltage difference applied between node A and node H is accurately reproduced across the resistor R 4  with very wide bandwidth.  
         [0027]     The output elements of the amplifier  300  including drive transistors Q 19  and Q 20 , current-feedforward transistors Q 23  and Q 25 , output transistors Q 24  and Q 26 , and Miller-enhancing capacitors C 5  and C 6  are similar to corresponding elements on  FIG. 2  with similar reference designations and will not be re-described. The bias sources BIAS A  and BIAS B  may be configured with translinear loops as illustrated and described below with reference to  FIG. 3   a  to provide a stable dc operating point for transistors Q 19  and Q 20 . Alternatively, other bias circuits could be used. In the amplifier  300 , the output voltage V OUT  is fed back directly to the inverting input node H of the voltage feedback amplifier, thereby providing unity voltage gain for this portion of the circuit.  
         [0028]     The circuit of  FIG. 3  exhibits substantially less current shoot-through for high frequency signals than the prior art circuits due to a new configuration of the voltage amplifier driving the output section. The circuit is configured using a cascade arrangement of a current feedback amplifier and a voltage feedback amplifier to provide a compensating drive signal to the totem-pole transistor that would ordinarily conduct a brief shoot-through current pulse due to collector-to-base junction capacitance when the voltage of the output node (node H) is rapidly changed. This compensation circuit and its operation can be described as follows: Assume that a high-frequency drive signal from the input current-feedback amplifier turns on transistor Q 43 , which then turns on transistor Q 19 , and which is coupled to the output portion of the circuit by added Miller capacitor C 5 . Transistor Q 19  turns on transistor Q 24 , thereby rapidly raising the output voltage V OUT . Transistor Q 23  is included to provide current and temperature compensation for the circuit. The signal also passes through feedback resistor R 4  and turns on transistor Q 42 . Diode-configured transistor Q 32  conducts, and the signal is quickly reflected through transistor Q 31 . It is then coupled through added Miller capacitor C 6  to raise the voltage of node G, thereby disabling conduction through transistor Q 26 . Thus, the high-frequency path enabling shoot-through that would otherwise occur through transistors Q 19  and Q 20  is interrupted, and transistor Q 20  is not turned on, relying on the very fast response times of these elements of the circuit. A similar result occurs for a signal from transistor Q 44  that does not turn on transistor Q 24 , avoiding current shoot-through for high-frequency input signals of opposite polarity. By this means current shoot-through is minimized through the output transistors Q 24  and Q 26 , preserving amplifier efficiency for high-frequency signals that is otherwise ordinarily achievable only for lower frequency signals.  
         [0029]     Turning now to  FIG. 3   a , illustrated are voltage feedback amplifier and output portions of the circuit shown on  FIG. 3  with an exemplary biasing arrangement  360  for transistors Q 19  and Q 20  configured with translinear loops. Circuit elements on  FIG. 3   a  that are similar to corresponding elements on  FIG. 3  are identified with similar reference designations and will not be redescribed. The input, node A, to the voltage feedback amplifier stage, Stage  2 , is driven by the current feedback amplifier stage, Stage  1 , as illustrated on  FIG. 3 . Transistors QA 1 , QA 2 , and QA 3 , and current sources IA and IC provide bias for transistor Q 19 . Transistors QB 1 , QB 2 , and QB 3 , and current sources IB and IC provide bias for transistor Q 20 . In a preferred embodiment, the current sources IA, IB, and IC provide equal currents. The implementation of current sources for class AB amplifiers is described in Joongsik Kih, et al., “Class AB Large-Swing CMOS Buffer Amplifier with Controlled Bias Current,” IEEE J. Solid-State Circuits, Vol. 28, No. 12, December 1993, which is referenced and incorporated herein.  
         [0030]     Turning now to  FIG. 4 , the current drawn by the amplifier from the bias supply for each of the three versions of the amplifier circuit described above is illustrated. Bias supply current is a measure of amplifier efficiency because the product of bias supply current times bias supply voltage is the total amplifier power consumed, assuming the current mirrors are powered by the same bias source. In each case, no load resistance was coupled to the amplifier, which would have added an increment to the bias supply current. Both the simulated and measured current drawn by version 3 of the circuit are shown on the figure. The measured data from a physical circuit of the present invention indicate even better high-frequency efficiency than the simulated data.  
         [0031]     For input signals with only low-frequency components, amplifiers can generally be designed to perform similarly with respect to efficiency, because the contribution of shoot-through current, being roughly proportional to the frequency or frequency squared of the signal, is insignificant. However, for input signals with frequency greater than 10 MHz, versions 1 and 2 of the amplifier of the prior art circuits show substantially greater dissipation than version 3, which is configured to provide the internal compensating signal to the output-driving transistors to counteract shoot-through.  
         [0032]     The circuit configured as version 3, the circuit of the present invention, can be configured to exhibit the same linearity as the circuit configured as version 2 by providing roughly the same bias current levels. The linearity performance of the version 3 circuit when tested for an input signal of 2 volts peak-to-peak and an overall voltage gain of 5 was entirely adequate for xDSL applications, and it demonstrated efficiency superior to the prior art circuits.  
         [0033]     Although embodiments of the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. For example, it will be readily understood by those skilled in the art that the circuits and circuit elements described herein may be implemented using various integrated circuit technologies or may be configured using discrete components or multiple integrated circuits while remaining within the broad scope of the present invention.  
         [0034]     Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
A linear amplifier is configured with a current-feedback amplifier followed by a voltage-feedback amplifier to drive a totem-pole output stage. The output stage includes a series arrangement of an npn transistor and a pnp transistor with their emitters coupled in series and to an output node. The voltage amplifier driving the output stage is also configured with totem-pole elements, wherein a conductive path between the voltage-feedback amplifier and an output transistor is included to reduce conduction of the output transistor when the opposing output transistor is driven to increase conduction as a result of a high-frequency input signal. A capacitor may be included between the collector and base of a transistor in the circuit path that drives an output transistor in the output stage to briefly reduce its conduction when the opposing output transistor is driven to increase conduction.