Finite difference time domain (FDTD) calculations were performed using a solver Ansys-Lumerical. The dielectric constants of the materials are all based on the Palik's reference database in Lumerical and CaF 2 was manually imported as n, k data table from handbook . Workstations for calculations were self-built systems with two CPUs each of EPYC7301 (16 cores, 2.4 GHz), 7302 (16 cores, 3.0 GHz) and 7453 (28 cores, 2.75 GHz). The EPYC series can run eight channels of DDR4 memory on a single CPU and 16 channels on 2 CPUs. The FDTD calculation is based on the rate-limiting calculation of the communication bandwidth between the CPU and the memory. The FDTD license also allows one engine to recognize up to 32 cores. When simultaneous multi-threading (SMT) system is working, one core is recognized as two threads by Windows, which means that cores's are used at double load. Therefore, SMT was turned off for simulations which makes the most efficient use of CPU cores for FDTD calculations.