Figure ) show SEM images of four Ag-GA nanostructures prepared using different experimental parameters as described in Table . The relationship between the deposition current (nA) and time (s) is shown in SI Figure . The deposition current shows a linear relationship with deposition time, and the maximum current for the four SERS substrates were 70 nA, 60 nA, 90 nA, 120 nA, respectively. The false colour map in Figure ) show different SERS substrate structures. False colour maps clearly indicated the nanocluster space distribution across the surfaces, as well as the 3-D nature of the deposited nanocluster structures. The colour bar indicates the distance of the nanocluster from SiO2/Si substrate, the deep blue colour (colour bar value at 0 nm) is SiO2/Si reference surface, the nanoclusters that present light green colour are around 50 nm in height, which is around the same height as the working electrode. The higher the number in the colour bar, the further the nanoclusters are away from SiO2/Si substrate. The nanoclusters that showed a yellow colour are ~ 100 nm away from SiO2/Si surface) while the nanoclusters that showed a red colour were more than 100 nm away from the SiO2/Si reference surface. Original SEM images are presented in SI Figures ), optical images are also available (see Figure ). Figures ) show high-resolution SEM images of nanoclusters for the four structures. Ag-GA nano dendrite structures formed in figure ) labelled structure S1, S2, S3, while round-shape Ag-GA nano particles growth was observed in Figure (H), labelled structure S4. The size of the Ag-GA nano particles in structure S4 were estimated to be in the range of 50 -70 nm, see SI Figure . For structures S1 and S3, Ag-GA nano dendrites growth on the surface of SiO2 was observed to be orthogonal to the chips surface. See also SEM image tilted at 35 ͦ in SI Figure that showed the isolated growth of the nanoclusters on SiO2. By comparison, for structure S2, the Ag-GA nano dendrites growth along the Au electrode and stacked together orthogonal to the chip surface.