Moore's Law , which states that the number of transistors in a typical integrated circuit doubles approximately every two years, has been a driver for semiconductor device miniaturisation. This has required aggressive decreases in dimensions to pack more and more transistors into a single device and ensure that Moore's Law continues. To keep these miniaturised devices connected, the size of the interconnect must correspondingly decrease. However, interconnect scaling is now reaching its limits with current materials and processing technology. The rate of increase in the number of transistors on a chip is slowing compared to Moore's Law and makes interconnect scaling a serious bottleneck and highly limiting factor in device miniaturisation. Even with a move away from Moore's Law, device interconnects will continue to provide stern challenges.