Bit contact forms a crucial part of the DRAM module, providing connections to the digit line of the DRAM access transistor. This contact has shrunk significantly since 1α DRAM, thereby creating significant burden for the BC resistance. The usual BC step consists of four parts 1) Deposition of polysilicon on Si structure and 2) Deposition of Ti on polysilicon 3) Anneal to form silicide (TiSix) at the interface 4) Metal deposition, which connects the contact to the digit line. Prior technology nodes used a thick Polysilicon as the silicon material for creating the silicide and forming the contact . This Polysilicon occupied majority of the contact structure and region. In metal bit contact (MBC), the majority of the contact structure is made of metal (step 4), instead of traditional polysilicon (step 1) structure, which helps lower the overall resistance of the contact. This change from majority-poly to majority-metal is highly disruptive but is necessary to enable low resistance contacts at very small dimensions. Therefore, in MBC, the amount of polysilicon deposition is thinner, mostly to enable a highly doped junction with silicide. Therefore, to create a more thermally stable Silicon source, DRAM 1γ requires the need for a single crystal epitaxial structure. This is achieved by growing an epitaxial Silicon structure, while using the Si substrate as an atomic template. Furthermore, DRAM 1γ requires very high doping to achieve the desired bit contact resistance (< 60 KΩ). This doping is achieved by Phosphorus in the epitaxial Silicon plug. Phosphorus makes the plug n-type and thereby providing the crucially needed electron carriers to the junction. The Phosphorus dopants are in substitutional lattice positions. This allows us to reach much higher active carriers compared to Polysilicon where the dopants can be in both substitutional and interstitial positions. Interstitial dopants are usually inactive and don't contribute effectively to charge carriers. amorphization implant (PAI) and then silicidation resulting in the formation of TiSix and PVD Ti + WN However, the inclusion of epitaxial plug requires several changes to the downstream processes for the formation of silicides. One key problem that arises is the inability of monocrystals to provide enough Silicon for the silicide formation. The Silicon being in substitutional lattice positions prevents us from extracting any Silicon for the silicidation process with Titanium. Therefore, we need to amorphize the top of the epitaxial SiP plug. The amorphization is done through an implant of Ge after the epi deposition. This Ge implant (Pre amorphization implant: PAI) makes the top of epi plug (2-3 nm) amorphous. This amorphous SiP region then acts as a very good source of Silicon for the silicidation process .