Having optimal memory access patterns is critical to the performance of any GPU-based program. To that end, we sort the coordinates and charges to allow coalesced memory access to the atoms that are assigned to a specific cell. To avoid performing multiple sorts, the atom coordinates, charges, and indices are packed into a structure, and are then sorted using cell indices as keys. The sorting is performed by the NVIDIA CUB library, where we use the SortPairs routine of DeviceRadixSort. After the atom data have been sorted by the cell index, they are unpacked and stored in separate arrays.