Source code necessary for these tasks was implemented. OEIs are parallelized based on the number of shells and atoms. To compute primitive integrals, it was necessary to implement device kernels performing the vertical recurrence relation (VRR) algorithm. To achieve this task, a Python based CUDA code generator and optimizer (QUICK-GenInt) was developed. The device kernels required to contract primitive integrals and update the KS matrix were written manually. The performance bottleneck of the existing ERI kernels is the higher register utilization of the associated VRR code. To address this problem, QUICK-GenInt was extended to generate four center integral code paths. The generated VRR device kernels were included in QUICK, compiled and profiled using the NVIDIA Nsight profiler on different NVIDIA GPUs. This allowed us to systematically study the impact of the number of intermediate variables on register usage and to select optimal code paths. Furthermore, larger horizontal recurrence relation (HRR) device kernels were split and organized where appropriate.