To validate our DRT inversion framework, we generated synthetic experimental voltages v exp (13) using four distinct families of input signals, including pulse (10) (Figure (a)), PRBS (Figure (a)), sawtooth, and chirps (Section S1 and Figure (b) for the logarithmic chirp) . Notably, the sawtooth and chirps cannot be processed using the step approach (11) as linear combinations of pulses cannot approximate either the sawtooth or the chirp . We sampled the time data between 0 and 100 s with a step of 200 µs using four test circuits: single ZARC, double ZARC, piecewise-constant (PWC), as well as the series combination of a ZARC and a Warburg element to simulate real battery data. The circuit parameters are given in Table , with analytical DRTs and impedances provided in Section S1. Moreover, we set σ ϵ /∆i = 2.50 × 10 -1 Ω for the signal-to-noise ratio. The 101 timescales, log τ , used to discretize were chosen to be logarithmically spaced between 10 -3 s and 10 3 s for the ZARCs and PWC models, and between 1.00 × 10 -4 s and 1.00 × 10 3 s for the ZARC+Warburg.