The wafers followed the DRAM 1γ baseline integration for MBC. Before the epi dep, we do a series of cleans to ensure the cleanliness of the incoming surface to epi. We start with an oxide vapor etch which is done by using the standard native oxide pre-clean process (NF3 + NH3) to etch away any SiO2 on the Si surface. Following, a Silicon recess is done. This Silicon recess ensures that the incoming surface to epi is highly pristine and thereby minimize any surface defects or contaminations. After that the wafers come to epi step. The epi deposition consists of two parts 1) Pre-clean 2) Epi dep. The pre-clean is kept to a bare minimum of only 18A on thermal oxide blanket wafers. The pre-clean removes any remaining native oxide on the Silicon surface and prepares the surface for nucleation of epitaxy.