def instruction_TFR(self, opcode, m):
        """
        source code forms: TFR R1, R2
        CC bits "HNZVC": ccccc
        """
        high, low = divmod(m, 16)
        dst_reg = self._get_register_obj(low)
        src_reg = self._get_register_obj(high)
        src_value = convert_differend_width(src_reg, dst_reg)
        dst_reg.set(src_value)
source code forms: TFR R1, R2
        CC bits "HNZVC": ccccc