def resolve_addresses(self, node):
        """
        Resolve addresses of children of Addrmap and Regfile components
        """

        # Get alignment based on 'alignment' property
        # This remains constant for all children
        prop_alignment = self.alignment_stack[-1]
        if prop_alignment is None:
            # was not specified. Does not contribute to alignment
            prop_alignment = 1

        prev_node = None
        for child_node in node.children(skip_not_present=False):
            if not isinstance(child_node, AddressableNode):
                continue

            if child_node.inst.addr_offset is not None:
                # Address is already known. Do not need to infer
                prev_node = child_node
                continue

            if node.env.chk_implicit_addr:
                node.env.msg.message(
                    node.env.chk_implicit_addr,
                    "Address offset of component '%s' is not explicitly set" % child_node.inst.inst_name,
                    child_node.inst.inst_src_ref
                )

            # Get alignment specified by '%=' allocator, if any
            alloc_alignment = child_node.inst.addr_align
            if alloc_alignment is None:
                # was not specified. Does not contribute to alignment
                alloc_alignment = 1

            # Calculate alignment based on current addressing mode
            if self.addressing_mode_stack[-1] == rdltypes.AddressingType.compact:
                if isinstance(child_node, RegNode):
                    # Regs are aligned based on their accesswidth
                    mode_alignment = child_node.get_property('accesswidth') // 8
                else:
                    # Spec does not specify for other components
                    # Assuming absolutely compact packing
                    mode_alignment = 1

            elif self.addressing_mode_stack[-1] == rdltypes.AddressingType.regalign:
                # Components are aligned to a multiple of their size
                # Spec vaguely suggests that alignment is also a power of 2
                mode_alignment = child_node.size
                mode_alignment = roundup_pow2(mode_alignment)

            elif self.addressing_mode_stack[-1] == rdltypes.AddressingType.fullalign:
                # Same as regalign except for arrays
                # Arrays are aligned to their total size
                # Both are rounded to power of 2
                mode_alignment = child_node.total_size
                mode_alignment = roundup_pow2(mode_alignment)

            else:
                raise RuntimeError

            # Calculate resulting address offset
            alignment = max(prop_alignment, alloc_alignment, mode_alignment)
            if prev_node is None:
                next_offset = 0
            else:
                next_offset = prev_node.inst.addr_offset + prev_node.total_size

            # round next_offset up to alignment
            child_node.inst.addr_offset = roundup_to(next_offset, alignment)

            prev_node = child_node

        # Sort children by address offset
        # Non-addressable child components are sorted to be first (signals)
        def get_child_sort_key(inst):
            if not isinstance(inst, comp.AddressableComponent):
                return -1
            else:
                return inst.addr_offset
        node.inst.children.sort(key=get_child_sort_key)
Resolve addresses of children of Addrmap and Regfile components