<stg><name>karastuba_mul_MUL_st.2</name>


<trans_list>

<trans id="193" from="1" to="2">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="239" from="2" to="5">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="240" from="2" to="3">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="237" from="3" to="4">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="238" from="4" to="2">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="199" from="5" to="6">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="244" from="6" to="9">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="245" from="6" to="7">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="242" from="7" to="8">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="243" from="8" to="6">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="205" from="9" to="10">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="249" from="10" to="13">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="250" from="10" to="11">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="247" from="11" to="12">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="248" from="12" to="10">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="211" from="13" to="14">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="254" from="14" to="17">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="255" from="14" to="15">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="252" from="15" to="16">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="253" from="16" to="14">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="217" from="17" to="18">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="218" from="18" to="19">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="259" from="19" to="22">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="260" from="19" to="20">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="257" from="20" to="21">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="258" from="21" to="19">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="224" from="22" to="23">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="264" from="23" to="26">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="265" from="23" to="24">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="262" from="24" to="25">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="263" from="25" to="23">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="230" from="26" to="27">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="269" from="27" to="30">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="1"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="270" from="27" to="28">
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>
</trans>

<trans id="267" from="28" to="29">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>

<trans id="268" from="29" to="27">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</trans>
</trans_list>



<state_list>

<state id="1" st_id="1">

<operation id="31" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="10" bw="2" op_0_bw="2" op_1_bw="2">
<![CDATA[
entry:0  %rhs_tmp_bits_read_3 = call i2 @_ssdm_op_Read.ap_auto.i2(i2 %rhs_tmp_bits_read)

]]></Node>
<StgValue><ssdm name="rhs_tmp_bits_read_3"/></StgValue>
</operation>

<operation id="32" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="11" bw="2" op_0_bw="2" op_1_bw="2">
<![CDATA[
entry:1  %lhs_tmp_bits_read_3 = call i2 @_ssdm_op_Read.ap_auto.i2(i2 %lhs_tmp_bits_read)

]]></Node>
<StgValue><ssdm name="lhs_tmp_bits_read_3"/></StgValue>
</operation>

<operation id="33" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="12" bw="64" op_0_bw="64">
<![CDATA[
entry:2  %lhs0_digits_data_V = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="lhs0_digits_data_V"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="34" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="13" bw="64" op_0_bw="64">
<![CDATA[
entry:3  %lhs1_digits_data_V = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="lhs1_digits_data_V"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="35" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="14" bw="64" op_0_bw="64">
<![CDATA[
entry:4  %rhs0_digits_data_V = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="rhs0_digits_data_V"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="36" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="15" bw="64" op_0_bw="64">
<![CDATA[
entry:5  %rhs1_digits_data_V = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="rhs1_digits_data_V"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="37" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="16" bw="64" op_0_bw="64">
<![CDATA[
entry:6  %lhs0_tmp_digits_data = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="lhs0_tmp_digits_data"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="38" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="17" bw="64" op_0_bw="64">
<![CDATA[
entry:7  %lhs1_tmp_digits_data = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="lhs1_tmp_digits_data"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="39" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="18" bw="64" op_0_bw="64">
<![CDATA[
entry:8  %rhs0_tmp_digits_data = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="rhs0_tmp_digits_data"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="40" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="19" bw="64" op_0_bw="64">
<![CDATA[
entry:9  %rhs1_tmp_digits_data = alloca [8 x i64], align 8

]]></Node>
<StgValue><ssdm name="rhs1_tmp_digits_data"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="41" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="20" bw="64" op_0_bw="64">
<![CDATA[
entry:10  %res_digits_data_V_as = alloca [16 x i64], align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="42" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="21" bw="64" op_0_bw="64">
<![CDATA[
entry:11  %res_digits_data_V_as_1 = alloca [16 x i64], align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_1"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="43" st_id="1" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="22" bw="64" op_0_bw="64">
<![CDATA[
entry:12  %p_cross_mul_digits_da = alloca [16 x i64], align 8

]]></Node>
<StgValue><ssdm name="p_cross_mul_digits_da"/><MemPortTyVec>2 3 </MemPortTyVec>
</StgValue>
</operation>

<operation id="44" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="23" bw="32" op_0_bw="2">
<![CDATA[
entry:13  %p_read1_cast_i = zext i2 %rhs_tmp_bits_read_3 to i32

]]></Node>
<StgValue><ssdm name="p_read1_cast_i"/></StgValue>
</operation>

<operation id="45" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="24" bw="32" op_0_bw="2">
<![CDATA[
entry:14  %p_read_cast_i = zext i2 %lhs_tmp_bits_read_3 to i32

]]></Node>
<StgValue><ssdm name="p_read_cast_i"/></StgValue>
</operation>

<operation id="46" st_id="1" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="25" bw="0" op_0_bw="0">
<![CDATA[
entry:15  br label %0

]]></Node>
<StgValue><ssdm name="br_ln262"/></StgValue>
</operation>
</state>

<state id="2" st_id="2">

<operation id="47" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="27" bw="4" op_0_bw="4" op_1_bw="0" op_2_bw="4" op_3_bw="0">
<![CDATA[
:0  %i_0_i = phi i4 [ 0, %entry ], [ %i, %hls_label_19 ]

]]></Node>
<StgValue><ssdm name="i_0_i"/></StgValue>
</operation>

<operation id="48" st_id="2" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="28" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
:1  %icmp_ln262 = icmp eq i4 %i_0_i, -8

]]></Node>
<StgValue><ssdm name="icmp_ln262"/></StgValue>
</operation>

<operation id="49" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="29" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
:2  %empty = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8)

]]></Node>
<StgValue><ssdm name="empty"/></StgValue>
</operation>

<operation id="50" st_id="2" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="30" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
:3  %i = add i4 %i_0_i, 1

]]></Node>
<StgValue><ssdm name="i"/></StgValue>
</operation>

<operation id="51" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="31" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
:4  br i1 %icmp_ln262, label %.preheader30.i.preheader, label %hls_label_19

]]></Node>
<StgValue><ssdm name="br_ln262"/></StgValue>
</operation>

<operation id="52" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="35" bw="64" op_0_bw="4">
<![CDATA[
hls_label_19:2  %zext_ln265 = zext i4 %i_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln265"/></StgValue>
</operation>

<operation id="53" st_id="2" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="36" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_19:3  %lhs_digits_data_V_ad = getelementptr [16 x i64]* %lhs_digits_data_V, i64 0, i64 %zext_ln265

]]></Node>
<StgValue><ssdm name="lhs_digits_data_V_ad"/></StgValue>
</operation>

<operation id="54" st_id="2" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="37" bw="64" op_0_bw="4">
<![CDATA[
hls_label_19:4  %lhs_digits_data_V_lo = load i64* %lhs_digits_data_V_ad, align 8

]]></Node>
<StgValue><ssdm name="lhs_digits_data_V_lo"/></StgValue>
</operation>
</state>

<state id="3" st_id="3">

<operation id="55" st_id="3" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="37" bw="64" op_0_bw="4">
<![CDATA[
hls_label_19:4  %lhs_digits_data_V_lo = load i64* %lhs_digits_data_V_ad, align 8

]]></Node>
<StgValue><ssdm name="lhs_digits_data_V_lo"/></StgValue>
</operation>

<operation id="56" st_id="3" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="40" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_19:7  %lhs0_tmp_digits_data_4 = getelementptr [8 x i64]* %lhs0_tmp_digits_data, i64 0, i64 %zext_ln265

]]></Node>
<StgValue><ssdm name="lhs0_tmp_digits_data_4"/></StgValue>
</operation>

<operation id="57" st_id="3" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="41" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_19:8  store i64 %lhs_digits_data_V_lo, i64* %lhs0_tmp_digits_data_4, align 8

]]></Node>
<StgValue><ssdm name="store_ln265"/></StgValue>
</operation>

<operation id="58" st_id="3" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="42" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_19:9  %lhs0_digits_data_V_a = getelementptr [8 x i64]* %lhs0_digits_data_V, i64 0, i64 %zext_ln265

]]></Node>
<StgValue><ssdm name="lhs0_digits_data_V_a"/></StgValue>
</operation>

<operation id="59" st_id="3" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="43" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_19:10  store i64 %lhs_digits_data_V_lo, i64* %lhs0_digits_data_V_a, align 8

]]></Node>
<StgValue><ssdm name="store_ln265"/></StgValue>
</operation>
</state>

<state id="4" st_id="4">

<operation id="60" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="33" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_19:0  %tmp_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str46)

]]></Node>
<StgValue><ssdm name="tmp_i"/></StgValue>
</operation>

<operation id="61" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="34" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_19:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln264"/></StgValue>
</operation>

<operation id="62" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="38" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_19:5  %inter_lhs_digits_dat_1 = getelementptr [16 x i64]* %inter_lhs_digits_dat, i64 0, i64 %zext_ln265

]]></Node>
<StgValue><ssdm name="inter_lhs_digits_dat_1"/></StgValue>
</operation>

<operation id="63" st_id="4" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="39" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_19:6  store i64 %lhs_digits_data_V_lo, i64* %inter_lhs_digits_dat_1, align 8

]]></Node>
<StgValue><ssdm name="store_ln265"/></StgValue>
</operation>

<operation id="64" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="44" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_19:11  %empty_25 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str46, i32 %tmp_i)

]]></Node>
<StgValue><ssdm name="empty_25"/></StgValue>
</operation>

<operation id="65" st_id="4" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="45" bw="0" op_0_bw="0">
<![CDATA[
hls_label_19:12  br label %0

]]></Node>
<StgValue><ssdm name="br_ln262"/></StgValue>
</operation>
</state>

<state id="5" st_id="5">

<operation id="66" st_id="5" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="47" bw="0" op_0_bw="0">
<![CDATA[
.preheader30.i.preheader:0  br label %.preheader30.i

]]></Node>
<StgValue><ssdm name="br_ln267"/></StgValue>
</operation>
</state>

<state id="6" st_id="6">

<operation id="67" st_id="6" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="49" bw="4" op_0_bw="4" op_1_bw="0" op_2_bw="4" op_3_bw="0">
<![CDATA[
.preheader30.i:0  %i1_0_i = phi i4 [ %i_5, %hls_label_20 ], [ 0, %.preheader30.i.preheader ]

]]></Node>
<StgValue><ssdm name="i1_0_i"/></StgValue>
</operation>

<operation id="68" st_id="6" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="50" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
.preheader30.i:1  %icmp_ln267 = icmp eq i4 %i1_0_i, -8

]]></Node>
<StgValue><ssdm name="icmp_ln267"/></StgValue>
</operation>

<operation id="69" st_id="6" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="51" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
.preheader30.i:2  %empty_26 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8)

]]></Node>
<StgValue><ssdm name="empty_26"/></StgValue>
</operation>

<operation id="70" st_id="6" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="52" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
.preheader30.i:3  %i_5 = add i4 %i1_0_i, 1

]]></Node>
<StgValue><ssdm name="i_5"/></StgValue>
</operation>

<operation id="71" st_id="6" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="53" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
.preheader30.i:4  br i1 %icmp_ln267, label %.preheader29.i.preheader, label %hls_label_20

]]></Node>
<StgValue><ssdm name="br_ln267"/></StgValue>
</operation>

<operation id="72" st_id="6" stage="1" lat="1">
<core>LogicGate</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="58" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
hls_label_20:3  %xor_ln270 = xor i4 %i1_0_i, -8

]]></Node>
<StgValue><ssdm name="xor_ln270"/></StgValue>
</operation>

<operation id="73" st_id="6" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="59" bw="64" op_0_bw="4">
<![CDATA[
hls_label_20:4  %zext_ln270_1 = zext i4 %xor_ln270 to i64

]]></Node>
<StgValue><ssdm name="zext_ln270_1"/></StgValue>
</operation>

<operation id="74" st_id="6" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="60" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_20:5  %lhs_digits_data_V_ad_1 = getelementptr [16 x i64]* %lhs_digits_data_V, i64 0, i64 %zext_ln270_1

]]></Node>
<StgValue><ssdm name="lhs_digits_data_V_ad_1"/></StgValue>
</operation>

<operation id="75" st_id="6" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="61" bw="64" op_0_bw="4">
<![CDATA[
hls_label_20:6  %lhs_digits_data_V_lo_1 = load i64* %lhs_digits_data_V_ad_1, align 8

]]></Node>
<StgValue><ssdm name="lhs_digits_data_V_lo_1"/></StgValue>
</operation>
</state>

<state id="7" st_id="7">

<operation id="76" st_id="7" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="57" bw="64" op_0_bw="4">
<![CDATA[
hls_label_20:2  %zext_ln270 = zext i4 %i1_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln270"/></StgValue>
</operation>

<operation id="77" st_id="7" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="61" bw="64" op_0_bw="4">
<![CDATA[
hls_label_20:6  %lhs_digits_data_V_lo_1 = load i64* %lhs_digits_data_V_ad_1, align 8

]]></Node>
<StgValue><ssdm name="lhs_digits_data_V_lo_1"/></StgValue>
</operation>

<operation id="78" st_id="7" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="64" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_20:9  %lhs1_tmp_digits_data_4 = getelementptr [8 x i64]* %lhs1_tmp_digits_data, i64 0, i64 %zext_ln270

]]></Node>
<StgValue><ssdm name="lhs1_tmp_digits_data_4"/></StgValue>
</operation>

<operation id="79" st_id="7" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="65" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_20:10  store i64 %lhs_digits_data_V_lo_1, i64* %lhs1_tmp_digits_data_4, align 8

]]></Node>
<StgValue><ssdm name="store_ln270"/></StgValue>
</operation>

<operation id="80" st_id="7" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="66" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_20:11  %lhs1_digits_data_V_a = getelementptr [8 x i64]* %lhs1_digits_data_V, i64 0, i64 %zext_ln270

]]></Node>
<StgValue><ssdm name="lhs1_digits_data_V_a"/></StgValue>
</operation>

<operation id="81" st_id="7" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="67" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_20:12  store i64 %lhs_digits_data_V_lo_1, i64* %lhs1_digits_data_V_a, align 8

]]></Node>
<StgValue><ssdm name="store_ln270"/></StgValue>
</operation>
</state>

<state id="8" st_id="8">

<operation id="82" st_id="8" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="55" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_20:0  %tmp_i_27 = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str47)

]]></Node>
<StgValue><ssdm name="tmp_i_27"/></StgValue>
</operation>

<operation id="83" st_id="8" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="56" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_20:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln269"/></StgValue>
</operation>

<operation id="84" st_id="8" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="62" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_20:7  %inter_lhs_digits_dat_2 = getelementptr [16 x i64]* %inter_lhs_digits_dat, i64 0, i64 %zext_ln270_1

]]></Node>
<StgValue><ssdm name="inter_lhs_digits_dat_2"/></StgValue>
</operation>

<operation id="85" st_id="8" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="63" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_20:8  store i64 %lhs_digits_data_V_lo_1, i64* %inter_lhs_digits_dat_2, align 8

]]></Node>
<StgValue><ssdm name="store_ln270"/></StgValue>
</operation>

<operation id="86" st_id="8" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="68" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_20:13  %empty_28 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str47, i32 %tmp_i_27)

]]></Node>
<StgValue><ssdm name="empty_28"/></StgValue>
</operation>

<operation id="87" st_id="8" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="69" bw="0" op_0_bw="0">
<![CDATA[
hls_label_20:14  br label %.preheader30.i

]]></Node>
<StgValue><ssdm name="br_ln267"/></StgValue>
</operation>
</state>

<state id="9" st_id="9">

<operation id="88" st_id="9" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="71" bw="0" op_0_bw="0">
<![CDATA[
.preheader29.i.preheader:0  br label %.preheader29.i

]]></Node>
<StgValue><ssdm name="br_ln272"/></StgValue>
</operation>
</state>

<state id="10" st_id="10">

<operation id="89" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="73" bw="4" op_0_bw="4" op_1_bw="0" op_2_bw="4" op_3_bw="0">
<![CDATA[
.preheader29.i:0  %i2_0_i = phi i4 [ %i_6, %hls_label_21 ], [ 0, %.preheader29.i.preheader ]

]]></Node>
<StgValue><ssdm name="i2_0_i"/></StgValue>
</operation>

<operation id="90" st_id="10" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="74" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
.preheader29.i:1  %icmp_ln272 = icmp eq i4 %i2_0_i, -8

]]></Node>
<StgValue><ssdm name="icmp_ln272"/></StgValue>
</operation>

<operation id="91" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="75" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
.preheader29.i:2  %empty_29 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8)

]]></Node>
<StgValue><ssdm name="empty_29"/></StgValue>
</operation>

<operation id="92" st_id="10" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="76" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
.preheader29.i:3  %i_6 = add i4 %i2_0_i, 1

]]></Node>
<StgValue><ssdm name="i_6"/></StgValue>
</operation>

<operation id="93" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="77" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
.preheader29.i:4  br i1 %icmp_ln272, label %.preheader.i.preheader, label %hls_label_21

]]></Node>
<StgValue><ssdm name="br_ln272"/></StgValue>
</operation>

<operation id="94" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="81" bw="64" op_0_bw="4">
<![CDATA[
hls_label_21:2  %zext_ln275 = zext i4 %i2_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln275"/></StgValue>
</operation>

<operation id="95" st_id="10" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="82" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_21:3  %rhs_digits_data_V_ad = getelementptr [16 x i64]* %rhs_digits_data_V, i64 0, i64 %zext_ln275

]]></Node>
<StgValue><ssdm name="rhs_digits_data_V_ad"/></StgValue>
</operation>

<operation id="96" st_id="10" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="83" bw="64" op_0_bw="4">
<![CDATA[
hls_label_21:4  %rhs_digits_data_V_lo = load i64* %rhs_digits_data_V_ad, align 8

]]></Node>
<StgValue><ssdm name="rhs_digits_data_V_lo"/></StgValue>
</operation>
</state>

<state id="11" st_id="11">

<operation id="97" st_id="11" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="83" bw="64" op_0_bw="4">
<![CDATA[
hls_label_21:4  %rhs_digits_data_V_lo = load i64* %rhs_digits_data_V_ad, align 8

]]></Node>
<StgValue><ssdm name="rhs_digits_data_V_lo"/></StgValue>
</operation>

<operation id="98" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="86" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_21:7  %rhs0_tmp_digits_data_4 = getelementptr [8 x i64]* %rhs0_tmp_digits_data, i64 0, i64 %zext_ln275

]]></Node>
<StgValue><ssdm name="rhs0_tmp_digits_data_4"/></StgValue>
</operation>

<operation id="99" st_id="11" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="87" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_21:8  store i64 %rhs_digits_data_V_lo, i64* %rhs0_tmp_digits_data_4, align 8

]]></Node>
<StgValue><ssdm name="store_ln275"/></StgValue>
</operation>

<operation id="100" st_id="11" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="88" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_21:9  %rhs0_digits_data_V_a = getelementptr [8 x i64]* %rhs0_digits_data_V, i64 0, i64 %zext_ln275

]]></Node>
<StgValue><ssdm name="rhs0_digits_data_V_a"/></StgValue>
</operation>

<operation id="101" st_id="11" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="89" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_21:10  store i64 %rhs_digits_data_V_lo, i64* %rhs0_digits_data_V_a, align 8

]]></Node>
<StgValue><ssdm name="store_ln275"/></StgValue>
</operation>
</state>

<state id="12" st_id="12">

<operation id="102" st_id="12" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="79" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_21:0  %tmp_5_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str48)

]]></Node>
<StgValue><ssdm name="tmp_5_i"/></StgValue>
</operation>

<operation id="103" st_id="12" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="80" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_21:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln274"/></StgValue>
</operation>

<operation id="104" st_id="12" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="84" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_21:5  %inter_rhs_digits_dat_1 = getelementptr [16 x i64]* %inter_rhs_digits_dat, i64 0, i64 %zext_ln275

]]></Node>
<StgValue><ssdm name="inter_rhs_digits_dat_1"/></StgValue>
</operation>

<operation id="105" st_id="12" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="85" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_21:6  store i64 %rhs_digits_data_V_lo, i64* %inter_rhs_digits_dat_1, align 8

]]></Node>
<StgValue><ssdm name="store_ln275"/></StgValue>
</operation>

<operation id="106" st_id="12" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="90" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_21:11  %empty_30 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str48, i32 %tmp_5_i)

]]></Node>
<StgValue><ssdm name="empty_30"/></StgValue>
</operation>

<operation id="107" st_id="12" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="91" bw="0" op_0_bw="0">
<![CDATA[
hls_label_21:12  br label %.preheader29.i

]]></Node>
<StgValue><ssdm name="br_ln272"/></StgValue>
</operation>
</state>

<state id="13" st_id="13">

<operation id="108" st_id="13" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="93" bw="0" op_0_bw="0">
<![CDATA[
.preheader.i.preheader:0  br label %.preheader.i

]]></Node>
<StgValue><ssdm name="br_ln277"/></StgValue>
</operation>
</state>

<state id="14" st_id="14">

<operation id="109" st_id="14" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="95" bw="4" op_0_bw="4" op_1_bw="0" op_2_bw="4" op_3_bw="0">
<![CDATA[
.preheader.i:0  %i3_0_i = phi i4 [ %i_7, %hls_label_22 ], [ 0, %.preheader.i.preheader ]

]]></Node>
<StgValue><ssdm name="i3_0_i"/></StgValue>
</operation>

<operation id="110" st_id="14" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="96" bw="1" op_0_bw="4" op_1_bw="4">
<![CDATA[
.preheader.i:1  %icmp_ln277 = icmp eq i4 %i3_0_i, -8

]]></Node>
<StgValue><ssdm name="icmp_ln277"/></StgValue>
</operation>

<operation id="111" st_id="14" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="97" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
.preheader.i:2  %empty_31 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 8, i64 8, i64 8)

]]></Node>
<StgValue><ssdm name="empty_31"/></StgValue>
</operation>

<operation id="112" st_id="14" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="98" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
.preheader.i:3  %i_7 = add i4 %i3_0_i, 1

]]></Node>
<StgValue><ssdm name="i_7"/></StgValue>
</operation>

<operation id="113" st_id="14" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="99" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
.preheader.i:4  br i1 %icmp_ln277, label %1, label %hls_label_22

]]></Node>
<StgValue><ssdm name="br_ln277"/></StgValue>
</operation>

<operation id="114" st_id="14" stage="1" lat="1">
<core>LogicGate</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="104" bw="4" op_0_bw="4" op_1_bw="4">
<![CDATA[
hls_label_22:3  %xor_ln280 = xor i4 %i3_0_i, -8

]]></Node>
<StgValue><ssdm name="xor_ln280"/></StgValue>
</operation>

<operation id="115" st_id="14" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="105" bw="64" op_0_bw="4">
<![CDATA[
hls_label_22:4  %zext_ln280_1 = zext i4 %xor_ln280 to i64

]]></Node>
<StgValue><ssdm name="zext_ln280_1"/></StgValue>
</operation>

<operation id="116" st_id="14" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="106" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_22:5  %rhs_digits_data_V_ad_1 = getelementptr [16 x i64]* %rhs_digits_data_V, i64 0, i64 %zext_ln280_1

]]></Node>
<StgValue><ssdm name="rhs_digits_data_V_ad_1"/></StgValue>
</operation>

<operation id="117" st_id="14" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="107" bw="64" op_0_bw="4">
<![CDATA[
hls_label_22:6  %rhs_digits_data_V_lo_1 = load i64* %rhs_digits_data_V_ad_1, align 8

]]></Node>
<StgValue><ssdm name="rhs_digits_data_V_lo_1"/></StgValue>
</operation>
</state>

<state id="15" st_id="15">

<operation id="118" st_id="15" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="103" bw="64" op_0_bw="4">
<![CDATA[
hls_label_22:2  %zext_ln280 = zext i4 %i3_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln280"/></StgValue>
</operation>

<operation id="119" st_id="15" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="107" bw="64" op_0_bw="4">
<![CDATA[
hls_label_22:6  %rhs_digits_data_V_lo_1 = load i64* %rhs_digits_data_V_ad_1, align 8

]]></Node>
<StgValue><ssdm name="rhs_digits_data_V_lo_1"/></StgValue>
</operation>

<operation id="120" st_id="15" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="110" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_22:9  %rhs1_tmp_digits_data_4 = getelementptr [8 x i64]* %rhs1_tmp_digits_data, i64 0, i64 %zext_ln280

]]></Node>
<StgValue><ssdm name="rhs1_tmp_digits_data_4"/></StgValue>
</operation>

<operation id="121" st_id="15" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="111" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_22:10  store i64 %rhs_digits_data_V_lo_1, i64* %rhs1_tmp_digits_data_4, align 8

]]></Node>
<StgValue><ssdm name="store_ln280"/></StgValue>
</operation>

<operation id="122" st_id="15" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="112" bw="3" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_22:11  %rhs1_digits_data_V_a = getelementptr [8 x i64]* %rhs1_digits_data_V, i64 0, i64 %zext_ln280

]]></Node>
<StgValue><ssdm name="rhs1_digits_data_V_a"/></StgValue>
</operation>

<operation id="123" st_id="15" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="113" bw="0" op_0_bw="64" op_1_bw="3">
<![CDATA[
hls_label_22:12  store i64 %rhs_digits_data_V_lo_1, i64* %rhs1_digits_data_V_a, align 8

]]></Node>
<StgValue><ssdm name="store_ln280"/></StgValue>
</operation>
</state>

<state id="16" st_id="16">

<operation id="124" st_id="16" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="101" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_22:0  %tmp_6_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str49)

]]></Node>
<StgValue><ssdm name="tmp_6_i"/></StgValue>
</operation>

<operation id="125" st_id="16" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="102" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_22:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln279"/></StgValue>
</operation>

<operation id="126" st_id="16" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="108" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_22:7  %inter_rhs_digits_dat_2 = getelementptr [16 x i64]* %inter_rhs_digits_dat, i64 0, i64 %zext_ln280_1

]]></Node>
<StgValue><ssdm name="inter_rhs_digits_dat_2"/></StgValue>
</operation>

<operation id="127" st_id="16" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="109" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_22:8  store i64 %rhs_digits_data_V_lo_1, i64* %inter_rhs_digits_dat_2, align 8

]]></Node>
<StgValue><ssdm name="store_ln280"/></StgValue>
</operation>

<operation id="128" st_id="16" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="114" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_22:13  %empty_32 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str49, i32 %tmp_6_i)

]]></Node>
<StgValue><ssdm name="empty_32"/></StgValue>
</operation>

<operation id="129" st_id="16" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="115" bw="0" op_0_bw="0">
<![CDATA[
hls_label_22:14  br label %.preheader.i

]]></Node>
<StgValue><ssdm name="br_ln277"/></StgValue>
</operation>
</state>

<state id="17" st_id="17">

<operation id="130" st_id="17" stage="2" lat="2">
<core></core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="117" bw="4" op_0_bw="4" op_1_bw="2" op_2_bw="64" op_3_bw="2" op_4_bw="64" op_5_bw="64">
<![CDATA[
:0  %z0_tmp_bits_i = call fastcc i4 @mul_I_O(i2 0, [8 x i64]* %lhs0_digits_data_V, i2 0, [8 x i64]* %rhs0_digits_data_V, [16 x i64]* %res_digits_data_V_as)

]]></Node>
<StgValue><ssdm name="z0_tmp_bits_i"/></StgValue>
</operation>

<operation id="131" st_id="17" stage="2" lat="2">
<core></core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="118" bw="4" op_0_bw="4" op_1_bw="2" op_2_bw="64" op_3_bw="2" op_4_bw="64" op_5_bw="64">
<![CDATA[
:1  %z2_tmp_bits_i = call fastcc i4 @mul_I_O(i2 0, [8 x i64]* %lhs1_digits_data_V, i2 0, [8 x i64]* %rhs1_digits_data_V, [16 x i64]* %res_digits_data_V_as_1)

]]></Node>
<StgValue><ssdm name="z2_tmp_bits_i"/></StgValue>
</operation>

<operation id="132" st_id="17" stage="2" lat="2">
<core></core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="119" bw="4" op_0_bw="4" op_1_bw="64" op_2_bw="64" op_3_bw="64" op_4_bw="64" op_5_bw="64">
<![CDATA[
:2  %cross_mul_tmp_bits_i = call fastcc i4 @karastuba_mul_templa.2([8 x i64]* %lhs0_tmp_digits_data, [8 x i64]* %lhs1_tmp_digits_data, [8 x i64]* %rhs0_tmp_digits_data, [8 x i64]* %rhs1_tmp_digits_data, [16 x i64]* %p_cross_mul_digits_da)

]]></Node>
<StgValue><ssdm name="cross_mul_tmp_bits_i"/></StgValue>
</operation>
</state>

<state id="18" st_id="18">

<operation id="133" st_id="18" stage="1" lat="2">
<core></core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="117" bw="4" op_0_bw="4" op_1_bw="2" op_2_bw="64" op_3_bw="2" op_4_bw="64" op_5_bw="64">
<![CDATA[
:0  %z0_tmp_bits_i = call fastcc i4 @mul_I_O(i2 0, [8 x i64]* %lhs0_digits_data_V, i2 0, [8 x i64]* %rhs0_digits_data_V, [16 x i64]* %res_digits_data_V_as)

]]></Node>
<StgValue><ssdm name="z0_tmp_bits_i"/></StgValue>
</operation>

<operation id="134" st_id="18" stage="1" lat="2">
<core></core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="118" bw="4" op_0_bw="4" op_1_bw="2" op_2_bw="64" op_3_bw="2" op_4_bw="64" op_5_bw="64">
<![CDATA[
:1  %z2_tmp_bits_i = call fastcc i4 @mul_I_O(i2 0, [8 x i64]* %lhs1_digits_data_V, i2 0, [8 x i64]* %rhs1_digits_data_V, [16 x i64]* %res_digits_data_V_as_1)

]]></Node>
<StgValue><ssdm name="z2_tmp_bits_i"/></StgValue>
</operation>

<operation id="135" st_id="18" stage="1" lat="2">
<core></core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="119" bw="4" op_0_bw="4" op_1_bw="64" op_2_bw="64" op_3_bw="64" op_4_bw="64" op_5_bw="64">
<![CDATA[
:2  %cross_mul_tmp_bits_i = call fastcc i4 @karastuba_mul_templa.2([8 x i64]* %lhs0_tmp_digits_data, [8 x i64]* %lhs1_tmp_digits_data, [8 x i64]* %rhs0_tmp_digits_data, [8 x i64]* %rhs1_tmp_digits_data, [16 x i64]* %p_cross_mul_digits_da)

]]></Node>
<StgValue><ssdm name="cross_mul_tmp_bits_i"/></StgValue>
</operation>

<operation id="136" st_id="18" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="120" bw="32" op_0_bw="4">
<![CDATA[
:3  %p_cross_mul_tmp_bits = zext i4 %cross_mul_tmp_bits_i to i32

]]></Node>
<StgValue><ssdm name="p_cross_mul_tmp_bits"/></StgValue>
</operation>

<operation id="137" st_id="18" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="121" bw="0" op_0_bw="0">
<![CDATA[
:4  br label %2

]]></Node>
<StgValue><ssdm name="br_ln294"/></StgValue>
</operation>
</state>

<state id="19" st_id="19">

<operation id="138" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="123" bw="5" op_0_bw="5" op_1_bw="0" op_2_bw="5" op_3_bw="0">
<![CDATA[
:0  %i4_0_i = phi i5 [ 0, %1 ], [ %i_8, %hls_label_23 ]

]]></Node>
<StgValue><ssdm name="i4_0_i"/></StgValue>
</operation>

<operation id="139" st_id="19" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="124" bw="1" op_0_bw="5" op_1_bw="5">
<![CDATA[
:1  %icmp_ln294 = icmp eq i5 %i4_0_i, -16

]]></Node>
<StgValue><ssdm name="icmp_ln294"/></StgValue>
</operation>

<operation id="140" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="125" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
:2  %empty_33 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 16, i64 16, i64 16)

]]></Node>
<StgValue><ssdm name="empty_33"/></StgValue>
</operation>

<operation id="141" st_id="19" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="126" bw="5" op_0_bw="5" op_1_bw="5">
<![CDATA[
:3  %i_8 = add i5 %i4_0_i, 1

]]></Node>
<StgValue><ssdm name="i_8"/></StgValue>
</operation>

<operation id="142" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="127" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
:4  br i1 %icmp_ln294, label %.preheader2.i.preheader, label %hls_label_23

]]></Node>
<StgValue><ssdm name="br_ln294"/></StgValue>
</operation>

<operation id="143" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="131" bw="64" op_0_bw="5">
<![CDATA[
hls_label_23:2  %zext_ln297 = zext i5 %i4_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln297"/></StgValue>
</operation>

<operation id="144" st_id="19" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="132" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_23:3  %res_digits_data_V_as_2 = getelementptr [16 x i64]* %res_digits_data_V_as, i64 0, i64 %zext_ln297

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_2"/></StgValue>
</operation>

<operation id="145" st_id="19" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="133" bw="64" op_0_bw="4">
<![CDATA[
hls_label_23:4  %res_digits_data_V_as_3 = load i64* %res_digits_data_V_as_2, align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_3"/></StgValue>
</operation>
</state>

<state id="20" st_id="20">

<operation id="146" st_id="20" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="133" bw="64" op_0_bw="4">
<![CDATA[
hls_label_23:4  %res_digits_data_V_as_3 = load i64* %res_digits_data_V_as_2, align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_3"/></StgValue>
</operation>
</state>

<state id="21" st_id="21">

<operation id="147" st_id="21" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="129" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_23:0  %tmp_7_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str50)

]]></Node>
<StgValue><ssdm name="tmp_7_i"/></StgValue>
</operation>

<operation id="148" st_id="21" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="130" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_23:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln296"/></StgValue>
</operation>

<operation id="149" st_id="21" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="134" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_23:5  %z0_digits_data_V_add = getelementptr [16 x i64]* %z0_digits_data_V, i64 0, i64 %zext_ln297

]]></Node>
<StgValue><ssdm name="z0_digits_data_V_add"/></StgValue>
</operation>

<operation id="150" st_id="21" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="135" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_23:6  store i64 %res_digits_data_V_as_3, i64* %z0_digits_data_V_add, align 8

]]></Node>
<StgValue><ssdm name="store_ln297"/></StgValue>
</operation>

<operation id="151" st_id="21" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="136" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_23:7  %empty_34 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str50, i32 %tmp_7_i)

]]></Node>
<StgValue><ssdm name="empty_34"/></StgValue>
</operation>

<operation id="152" st_id="21" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="137" bw="0" op_0_bw="0">
<![CDATA[
hls_label_23:8  br label %2

]]></Node>
<StgValue><ssdm name="br_ln294"/></StgValue>
</operation>
</state>

<state id="22" st_id="22">

<operation id="153" st_id="22" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="139" bw="0" op_0_bw="0">
<![CDATA[
.preheader2.i.preheader:0  br label %.preheader2.i

]]></Node>
<StgValue><ssdm name="br_ln300"/></StgValue>
</operation>
</state>

<state id="23" st_id="23">

<operation id="154" st_id="23" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="141" bw="5" op_0_bw="5" op_1_bw="0" op_2_bw="5" op_3_bw="0">
<![CDATA[
.preheader2.i:0  %i5_0_i = phi i5 [ %i_9, %hls_label_24 ], [ 0, %.preheader2.i.preheader ]

]]></Node>
<StgValue><ssdm name="i5_0_i"/></StgValue>
</operation>

<operation id="155" st_id="23" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="142" bw="1" op_0_bw="5" op_1_bw="5">
<![CDATA[
.preheader2.i:1  %icmp_ln300 = icmp eq i5 %i5_0_i, -16

]]></Node>
<StgValue><ssdm name="icmp_ln300"/></StgValue>
</operation>

<operation id="156" st_id="23" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="143" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
.preheader2.i:2  %empty_35 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 16, i64 16, i64 16)

]]></Node>
<StgValue><ssdm name="empty_35"/></StgValue>
</operation>

<operation id="157" st_id="23" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="144" bw="5" op_0_bw="5" op_1_bw="5">
<![CDATA[
.preheader2.i:3  %i_9 = add i5 %i5_0_i, 1

]]></Node>
<StgValue><ssdm name="i_9"/></StgValue>
</operation>

<operation id="158" st_id="23" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="145" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
.preheader2.i:4  br i1 %icmp_ln300, label %.preheader1.i.preheader, label %hls_label_24

]]></Node>
<StgValue><ssdm name="br_ln300"/></StgValue>
</operation>

<operation id="159" st_id="23" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="149" bw="64" op_0_bw="5">
<![CDATA[
hls_label_24:2  %zext_ln303 = zext i5 %i5_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln303"/></StgValue>
</operation>

<operation id="160" st_id="23" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="150" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_24:3  %res_digits_data_V_as_4 = getelementptr [16 x i64]* %res_digits_data_V_as_1, i64 0, i64 %zext_ln303

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_4"/></StgValue>
</operation>

<operation id="161" st_id="23" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="151" bw="64" op_0_bw="4">
<![CDATA[
hls_label_24:4  %res_digits_data_V_as_5 = load i64* %res_digits_data_V_as_4, align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_5"/></StgValue>
</operation>
</state>

<state id="24" st_id="24">

<operation id="162" st_id="24" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="151" bw="64" op_0_bw="4">
<![CDATA[
hls_label_24:4  %res_digits_data_V_as_5 = load i64* %res_digits_data_V_as_4, align 8

]]></Node>
<StgValue><ssdm name="res_digits_data_V_as_5"/></StgValue>
</operation>
</state>

<state id="25" st_id="25">

<operation id="163" st_id="25" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="147" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_24:0  %tmp_8_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str51)

]]></Node>
<StgValue><ssdm name="tmp_8_i"/></StgValue>
</operation>

<operation id="164" st_id="25" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="148" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_24:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln302"/></StgValue>
</operation>

<operation id="165" st_id="25" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="152" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_24:5  %z2_digits_data_V_add = getelementptr [16 x i64]* %z2_digits_data_V, i64 0, i64 %zext_ln303

]]></Node>
<StgValue><ssdm name="z2_digits_data_V_add"/></StgValue>
</operation>

<operation id="166" st_id="25" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="153" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_24:6  store i64 %res_digits_data_V_as_5, i64* %z2_digits_data_V_add, align 8

]]></Node>
<StgValue><ssdm name="store_ln303"/></StgValue>
</operation>

<operation id="167" st_id="25" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="154" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_24:7  %empty_36 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str51, i32 %tmp_8_i)

]]></Node>
<StgValue><ssdm name="empty_36"/></StgValue>
</operation>

<operation id="168" st_id="25" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="155" bw="0" op_0_bw="0">
<![CDATA[
hls_label_24:8  br label %.preheader2.i

]]></Node>
<StgValue><ssdm name="br_ln300"/></StgValue>
</operation>
</state>

<state id="26" st_id="26">

<operation id="169" st_id="26" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="157" bw="0" op_0_bw="0">
<![CDATA[
.preheader1.i.preheader:0  br label %.preheader1.i

]]></Node>
<StgValue><ssdm name="br_ln306"/></StgValue>
</operation>
</state>

<state id="27" st_id="27">

<operation id="170" st_id="27" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="159" bw="5" op_0_bw="5" op_1_bw="0" op_2_bw="5" op_3_bw="0">
<![CDATA[
.preheader1.i:0  %i6_0_i = phi i5 [ %i_10, %hls_label_25 ], [ 0, %.preheader1.i.preheader ]

]]></Node>
<StgValue><ssdm name="i6_0_i"/></StgValue>
</operation>

<operation id="171" st_id="27" stage="1" lat="1">
<core>Cmp</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="160" bw="1" op_0_bw="5" op_1_bw="5">
<![CDATA[
.preheader1.i:1  %icmp_ln306 = icmp eq i5 %i6_0_i, -16

]]></Node>
<StgValue><ssdm name="icmp_ln306"/></StgValue>
</operation>

<operation id="172" st_id="27" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="161" bw="32" op_0_bw="32" op_1_bw="64" op_2_bw="64" op_3_bw="64">
<![CDATA[
.preheader1.i:2  %empty_37 = call i32 (...)* @_ssdm_op_SpecLoopTripCount(i64 16, i64 16, i64 16)

]]></Node>
<StgValue><ssdm name="empty_37"/></StgValue>
</operation>

<operation id="173" st_id="27" stage="1" lat="1">
<core>AddSub</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="162" bw="5" op_0_bw="5" op_1_bw="5">
<![CDATA[
.preheader1.i:3  %i_10 = add i5 %i6_0_i, 1

]]></Node>
<StgValue><ssdm name="i_10"/></StgValue>
</operation>

<operation id="174" st_id="27" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="163" bw="0" op_0_bw="1" op_1_bw="0" op_2_bw="0">
<![CDATA[
.preheader1.i:4  br i1 %icmp_ln306, label %karastuba_mul_MUL_st.2.exit, label %hls_label_25

]]></Node>
<StgValue><ssdm name="br_ln306"/></StgValue>
</operation>

<operation id="175" st_id="27" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="167" bw="64" op_0_bw="5">
<![CDATA[
hls_label_25:2  %zext_ln309 = zext i5 %i6_0_i to i64

]]></Node>
<StgValue><ssdm name="zext_ln309"/></StgValue>
</operation>

<operation id="176" st_id="27" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="168" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_25:3  %p_cross_mul_digits_da_1 = getelementptr [16 x i64]* %p_cross_mul_digits_da, i64 0, i64 %zext_ln309

]]></Node>
<StgValue><ssdm name="p_cross_mul_digits_da_1"/></StgValue>
</operation>

<operation id="177" st_id="27" stage="2" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="169" bw="64" op_0_bw="4">
<![CDATA[
hls_label_25:4  %p_cross_mul_digits_da_2 = load i64* %p_cross_mul_digits_da_1, align 8

]]></Node>
<StgValue><ssdm name="p_cross_mul_digits_da_2"/></StgValue>
</operation>
</state>

<state id="28" st_id="28">

<operation id="178" st_id="28" stage="1" lat="2">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="169" bw="64" op_0_bw="4">
<![CDATA[
hls_label_25:4  %p_cross_mul_digits_da_2 = load i64* %p_cross_mul_digits_da_1, align 8

]]></Node>
<StgValue><ssdm name="p_cross_mul_digits_da_2"/></StgValue>
</operation>
</state>

<state id="29" st_id="29">

<operation id="179" st_id="29" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="165" bw="32" op_0_bw="32" op_1_bw="0">
<![CDATA[
hls_label_25:0  %tmp_9_i = call i32 (...)* @_ssdm_op_SpecRegionBegin([13 x i8]* @p_str52)

]]></Node>
<StgValue><ssdm name="tmp_9_i"/></StgValue>
</operation>

<operation id="180" st_id="29" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="166" bw="0" op_0_bw="0" op_1_bw="32" op_2_bw="32" op_3_bw="32" op_4_bw="32" op_5_bw="0">
<![CDATA[
hls_label_25:1  call void (...)* @_ssdm_op_SpecPipeline(i32 -1, i32 1, i32 1, i32 0, [1 x i8]* @p_str1) nounwind

]]></Node>
<StgValue><ssdm name="specpipeline_ln308"/></StgValue>
</operation>

<operation id="181" st_id="29" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="170" bw="4" op_0_bw="64" op_1_bw="64" op_2_bw="64">
<![CDATA[
hls_label_25:5  %cross_mul_digits_dat_1 = getelementptr [16 x i64]* %cross_mul_digits_dat, i64 0, i64 %zext_ln309

]]></Node>
<StgValue><ssdm name="cross_mul_digits_dat_1"/></StgValue>
</operation>

<operation id="182" st_id="29" stage="1" lat="1">
<core>RAM</core>
<MemPortIdVec>0 </MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="171" bw="0" op_0_bw="64" op_1_bw="4">
<![CDATA[
hls_label_25:6  store i64 %p_cross_mul_digits_da_2, i64* %cross_mul_digits_dat_1, align 8

]]></Node>
<StgValue><ssdm name="store_ln309"/></StgValue>
</operation>

<operation id="183" st_id="29" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="172" bw="32" op_0_bw="32" op_1_bw="0" op_2_bw="32">
<![CDATA[
hls_label_25:7  %empty_38 = call i32 (...)* @_ssdm_op_SpecRegionEnd([13 x i8]* @p_str52, i32 %tmp_9_i)

]]></Node>
<StgValue><ssdm name="empty_38"/></StgValue>
</operation>

<operation id="184" st_id="29" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>

<Node id="173" bw="0" op_0_bw="0">
<![CDATA[
hls_label_25:8  br label %.preheader1.i

]]></Node>
<StgValue><ssdm name="br_ln306"/></StgValue>
</operation>
</state>

<state id="30" st_id="30">

<operation id="185" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="175" bw="32" op_0_bw="4">
<![CDATA[
karastuba_mul_MUL_st.2.exit:0  %zext_ln312 = zext i4 %z0_tmp_bits_i to i32

]]></Node>
<StgValue><ssdm name="zext_ln312"/></StgValue>
</operation>

<operation id="186" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="176" bw="160" op_0_bw="160" op_1_bw="32">
<![CDATA[
karastuba_mul_MUL_st.2.exit:1  %mrv_i = insertvalue { i32, i32, i32, i32, i32 } undef, i32 %zext_ln312, 0

]]></Node>
<StgValue><ssdm name="mrv_i"/></StgValue>
</operation>

<operation id="187" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="177" bw="32" op_0_bw="4">
<![CDATA[
karastuba_mul_MUL_st.2.exit:2  %zext_ln312_1 = zext i4 %z2_tmp_bits_i to i32

]]></Node>
<StgValue><ssdm name="zext_ln312_1"/></StgValue>
</operation>

<operation id="188" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="178" bw="160" op_0_bw="160" op_1_bw="32">
<![CDATA[
karastuba_mul_MUL_st.2.exit:3  %mrv_1_i = insertvalue { i32, i32, i32, i32, i32 } %mrv_i, i32 %zext_ln312_1, 1

]]></Node>
<StgValue><ssdm name="mrv_1_i"/></StgValue>
</operation>

<operation id="189" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="179" bw="160" op_0_bw="160" op_1_bw="32">
<![CDATA[
karastuba_mul_MUL_st.2.exit:4  %mrv_2_i = insertvalue { i32, i32, i32, i32, i32 } %mrv_1_i, i32 %p_cross_mul_tmp_bits, 2

]]></Node>
<StgValue><ssdm name="mrv_2_i"/></StgValue>
</operation>

<operation id="190" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="180" bw="160" op_0_bw="160" op_1_bw="32">
<![CDATA[
karastuba_mul_MUL_st.2.exit:5  %mrv_3_i = insertvalue { i32, i32, i32, i32, i32 } %mrv_2_i, i32 %p_read_cast_i, 3

]]></Node>
<StgValue><ssdm name="mrv_3_i"/></StgValue>
</operation>

<operation id="191" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="181" bw="160" op_0_bw="160" op_1_bw="32">
<![CDATA[
karastuba_mul_MUL_st.2.exit:6  %mrv_4_i = insertvalue { i32, i32, i32, i32, i32 } %mrv_3_i, i32 %p_read1_cast_i, 4

]]></Node>
<StgValue><ssdm name="mrv_4_i"/></StgValue>
</operation>

<operation id="192" st_id="30" stage="1" lat="1">
<core>NULL</core>
<MemPortIdVec></MemPortIdVec>
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>

<Node id="182" bw="0" op_0_bw="160">
<![CDATA[
karastuba_mul_MUL_st.2.exit:7  ret { i32, i32, i32, i32, i32 } %mrv_4_i

]]></Node>
<StgValue><ssdm name="ret_ln390"/></StgValue>
</operation>
</state>
</state_list>


<ports>
<port id="271" name="lhs_tmp_bits_read" dir="0" iftype="0">
<core>NULL</core><StgValue><ssdm name="lhs_tmp_bits_read"/></StgValue>
</port>
<port id="272" name="lhs_digits_data_V" dir="0" iftype="1">
<core>RAM</core><StgValue><ssdm name="lhs_digits_data_V"/><MemPortTyVec>1 3 </MemPortTyVec>
</StgValue>
</port>
<port id="273" name="rhs_tmp_bits_read" dir="0" iftype="0">
<core>NULL</core><StgValue><ssdm name="rhs_tmp_bits_read"/></StgValue>
</port>
<port id="274" name="rhs_digits_data_V" dir="0" iftype="1">
<core>RAM</core><StgValue><ssdm name="rhs_digits_data_V"/><MemPortTyVec>1 3 </MemPortTyVec>
</StgValue>
</port>
<port id="275" name="z0_digits_data_V" dir="1" iftype="1">
<core>RAM</core><StgValue><ssdm name="z0_digits_data_V"/><MemPortTyVec>0 3 </MemPortTyVec>
</StgValue>
</port>
<port id="276" name="z2_digits_data_V" dir="1" iftype="1">
<core>RAM</core><StgValue><ssdm name="z2_digits_data_V"/><MemPortTyVec>0 3 </MemPortTyVec>
</StgValue>
</port>
<port id="277" name="cross_mul_digits_dat" dir="1" iftype="1">
<core>RAM</core><StgValue><ssdm name="cross_mul_digits_dat"/><MemPortTyVec>0 3 </MemPortTyVec>
</StgValue>
</port>
<port id="278" name="inter_lhs_digits_dat" dir="1" iftype="1">
<core>RAM</core><StgValue><ssdm name="inter_lhs_digits_dat"/><MemPortTyVec>0 3 </MemPortTyVec>
</StgValue>
</port>
<port id="279" name="inter_rhs_digits_dat" dir="1" iftype="1">
<core>RAM</core><StgValue><ssdm name="inter_rhs_digits_dat"/><MemPortTyVec>0 3 </MemPortTyVec>
</StgValue>
</port>
</ports>


<dataflows>
<dataflow id="281" from="_ssdm_op_Read.ap_auto.i2" to="rhs_tmp_bits_read_3" fromId="280" toId="31">
</dataflow>
<dataflow id="282" from="rhs_tmp_bits_read" to="rhs_tmp_bits_read_3" fromId="273" toId="31">
</dataflow>
<dataflow id="283" from="_ssdm_op_Read.ap_auto.i2" to="lhs_tmp_bits_read_3" fromId="280" toId="32">
</dataflow>
<dataflow id="284" from="lhs_tmp_bits_read" to="lhs_tmp_bits_read_3" fromId="271" toId="32">
</dataflow>
<dataflow id="286" from="StgValue_285" to="lhs0_digits_data_V" fromId="285" toId="33">
</dataflow>
<dataflow id="287" from="StgValue_285" to="lhs1_digits_data_V" fromId="285" toId="34">
</dataflow>
<dataflow id="288" from="StgValue_285" to="rhs0_digits_data_V" fromId="285" toId="35">
</dataflow>
<dataflow id="289" from="StgValue_285" to="rhs1_digits_data_V" fromId="285" toId="36">
</dataflow>
<dataflow id="290" from="StgValue_285" to="lhs0_tmp_digits_data" fromId="285" toId="37">
</dataflow>
<dataflow id="291" from="StgValue_285" to="lhs1_tmp_digits_data" fromId="285" toId="38">
</dataflow>
<dataflow id="292" from="StgValue_285" to="rhs0_tmp_digits_data" fromId="285" toId="39">
</dataflow>
<dataflow id="293" from="StgValue_285" to="rhs1_tmp_digits_data" fromId="285" toId="40">
</dataflow>
<dataflow id="294" from="StgValue_285" to="res_digits_data_V_as" fromId="285" toId="41">
</dataflow>
<dataflow id="295" from="StgValue_285" to="res_digits_data_V_as_1" fromId="285" toId="42">
</dataflow>
<dataflow id="296" from="StgValue_285" to="p_cross_mul_digits_da" fromId="285" toId="43">
</dataflow>
<dataflow id="297" from="rhs_tmp_bits_read_3" to="p_read1_cast_i" fromId="31" toId="44">
</dataflow>
<dataflow id="298" from="lhs_tmp_bits_read_3" to="p_read_cast_i" fromId="32" toId="45">
</dataflow>
<dataflow id="300" from="StgValue_299" to="i_0_i" fromId="299" toId="47">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="301" from="br_ln262" to="i_0_i" fromId="46" toId="47">
</dataflow>
<dataflow id="302" from="i" to="i_0_i" fromId="50" toId="47">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln262" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="303" from="br_ln262" to="i_0_i" fromId="65" toId="47">
<BackEdge/>
</dataflow>
<dataflow id="304" from="i_0_i" to="icmp_ln262" fromId="47" toId="48">
</dataflow>
<dataflow id="306" from="StgValue_305" to="icmp_ln262" fromId="305" toId="48">
</dataflow>
<dataflow id="308" from="_ssdm_op_SpecLoopTripCount" to="empty" fromId="307" toId="49">
</dataflow>
<dataflow id="310" from="StgValue_309" to="empty" fromId="309" toId="49">
</dataflow>
<dataflow id="311" from="StgValue_309" to="empty" fromId="309" toId="49">
</dataflow>
<dataflow id="312" from="StgValue_309" to="empty" fromId="309" toId="49">
</dataflow>
<dataflow id="313" from="i_0_i" to="i" fromId="47" toId="50">
</dataflow>
<dataflow id="315" from="StgValue_314" to="i" fromId="314" toId="50">
</dataflow>
<dataflow id="316" from="icmp_ln262" to="br_ln262" fromId="48" toId="51">
</dataflow>
<dataflow id="317" from="i_0_i" to="zext_ln265" fromId="47" toId="52">
</dataflow>
<dataflow id="318" from="lhs_digits_data_V" to="lhs_digits_data_V_ad" fromId="272" toId="53">
</dataflow>
<dataflow id="320" from="StgValue_319" to="lhs_digits_data_V_ad" fromId="319" toId="53">
</dataflow>
<dataflow id="321" from="zext_ln265" to="lhs_digits_data_V_ad" fromId="52" toId="53">
</dataflow>
<dataflow id="322" from="lhs_digits_data_V_ad" to="lhs_digits_data_V_lo" fromId="53" toId="54">
</dataflow>
<dataflow id="323" from="lhs_digits_data_V_ad" to="lhs_digits_data_V_lo" fromId="53" toId="55">
</dataflow>
<dataflow id="324" from="lhs0_tmp_digits_data" to="lhs0_tmp_digits_data_4" fromId="37" toId="56">
</dataflow>
<dataflow id="325" from="StgValue_319" to="lhs0_tmp_digits_data_4" fromId="319" toId="56">
</dataflow>
<dataflow id="326" from="zext_ln265" to="lhs0_tmp_digits_data_4" fromId="52" toId="56">
</dataflow>
<dataflow id="327" from="lhs_digits_data_V_lo" to="store_ln265" fromId="55" toId="57">
</dataflow>
<dataflow id="328" from="lhs0_tmp_digits_data_4" to="store_ln265" fromId="56" toId="57">
</dataflow>
<dataflow id="329" from="lhs0_digits_data_V" to="lhs0_digits_data_V_a" fromId="33" toId="58">
</dataflow>
<dataflow id="330" from="StgValue_319" to="lhs0_digits_data_V_a" fromId="319" toId="58">
</dataflow>
<dataflow id="331" from="zext_ln265" to="lhs0_digits_data_V_a" fromId="52" toId="58">
</dataflow>
<dataflow id="332" from="lhs_digits_data_V_lo" to="store_ln265" fromId="55" toId="59">
</dataflow>
<dataflow id="333" from="lhs0_digits_data_V_a" to="store_ln265" fromId="58" toId="59">
</dataflow>
<dataflow id="335" from="_ssdm_op_SpecRegionBegin" to="tmp_i" fromId="334" toId="60">
</dataflow>
<dataflow id="337" from="p_str46" to="tmp_i" fromId="336" toId="60">
</dataflow>
<dataflow id="339" from="_ssdm_op_SpecPipeline" to="specpipeline_ln264" fromId="338" toId="61">
</dataflow>
<dataflow id="341" from="StgValue_340" to="specpipeline_ln264" fromId="340" toId="61">
</dataflow>
<dataflow id="343" from="StgValue_342" to="specpipeline_ln264" fromId="342" toId="61">
</dataflow>
<dataflow id="344" from="StgValue_342" to="specpipeline_ln264" fromId="342" toId="61">
</dataflow>
<dataflow id="346" from="StgValue_345" to="specpipeline_ln264" fromId="345" toId="61">
</dataflow>
<dataflow id="348" from="p_str1" to="specpipeline_ln264" fromId="347" toId="61">
</dataflow>
<dataflow id="349" from="inter_lhs_digits_dat" to="inter_lhs_digits_dat_1" fromId="278" toId="62">
</dataflow>
<dataflow id="350" from="StgValue_319" to="inter_lhs_digits_dat_1" fromId="319" toId="62">
</dataflow>
<dataflow id="351" from="zext_ln265" to="inter_lhs_digits_dat_1" fromId="52" toId="62">
</dataflow>
<dataflow id="352" from="lhs_digits_data_V_lo" to="store_ln265" fromId="55" toId="63">
</dataflow>
<dataflow id="353" from="inter_lhs_digits_dat_1" to="store_ln265" fromId="62" toId="63">
</dataflow>
<dataflow id="355" from="_ssdm_op_SpecRegionEnd" to="empty_25" fromId="354" toId="64">
</dataflow>
<dataflow id="356" from="p_str46" to="empty_25" fromId="336" toId="64">
</dataflow>
<dataflow id="357" from="tmp_i" to="empty_25" fromId="60" toId="64">
</dataflow>
<dataflow id="358" from="i_5" to="i1_0_i" fromId="70" toId="67">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln267" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="359" from="br_ln267" to="i1_0_i" fromId="87" toId="67">
<BackEdge/>
</dataflow>
<dataflow id="360" from="StgValue_299" to="i1_0_i" fromId="299" toId="67">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="361" from="br_ln267" to="i1_0_i" fromId="66" toId="67">
</dataflow>
<dataflow id="362" from="i1_0_i" to="icmp_ln267" fromId="67" toId="68">
</dataflow>
<dataflow id="363" from="StgValue_305" to="icmp_ln267" fromId="305" toId="68">
</dataflow>
<dataflow id="364" from="_ssdm_op_SpecLoopTripCount" to="empty_26" fromId="307" toId="69">
</dataflow>
<dataflow id="365" from="StgValue_309" to="empty_26" fromId="309" toId="69">
</dataflow>
<dataflow id="366" from="StgValue_309" to="empty_26" fromId="309" toId="69">
</dataflow>
<dataflow id="367" from="StgValue_309" to="empty_26" fromId="309" toId="69">
</dataflow>
<dataflow id="368" from="i1_0_i" to="i_5" fromId="67" toId="70">
</dataflow>
<dataflow id="369" from="StgValue_314" to="i_5" fromId="314" toId="70">
</dataflow>
<dataflow id="370" from="icmp_ln267" to="br_ln267" fromId="68" toId="71">
</dataflow>
<dataflow id="371" from="i1_0_i" to="xor_ln270" fromId="67" toId="72">
</dataflow>
<dataflow id="372" from="StgValue_305" to="xor_ln270" fromId="305" toId="72">
</dataflow>
<dataflow id="373" from="xor_ln270" to="zext_ln270_1" fromId="72" toId="73">
</dataflow>
<dataflow id="374" from="lhs_digits_data_V" to="lhs_digits_data_V_ad_1" fromId="272" toId="74">
</dataflow>
<dataflow id="375" from="StgValue_319" to="lhs_digits_data_V_ad_1" fromId="319" toId="74">
</dataflow>
<dataflow id="376" from="zext_ln270_1" to="lhs_digits_data_V_ad_1" fromId="73" toId="74">
</dataflow>
<dataflow id="377" from="lhs_digits_data_V_ad_1" to="lhs_digits_data_V_lo_1" fromId="74" toId="75">
</dataflow>
<dataflow id="378" from="i1_0_i" to="zext_ln270" fromId="67" toId="76">
</dataflow>
<dataflow id="379" from="lhs_digits_data_V_ad_1" to="lhs_digits_data_V_lo_1" fromId="74" toId="77">
</dataflow>
<dataflow id="380" from="lhs1_tmp_digits_data" to="lhs1_tmp_digits_data_4" fromId="38" toId="78">
</dataflow>
<dataflow id="381" from="StgValue_319" to="lhs1_tmp_digits_data_4" fromId="319" toId="78">
</dataflow>
<dataflow id="382" from="zext_ln270" to="lhs1_tmp_digits_data_4" fromId="76" toId="78">
</dataflow>
<dataflow id="383" from="lhs_digits_data_V_lo_1" to="store_ln270" fromId="77" toId="79">
</dataflow>
<dataflow id="384" from="lhs1_tmp_digits_data_4" to="store_ln270" fromId="78" toId="79">
</dataflow>
<dataflow id="385" from="lhs1_digits_data_V" to="lhs1_digits_data_V_a" fromId="34" toId="80">
</dataflow>
<dataflow id="386" from="StgValue_319" to="lhs1_digits_data_V_a" fromId="319" toId="80">
</dataflow>
<dataflow id="387" from="zext_ln270" to="lhs1_digits_data_V_a" fromId="76" toId="80">
</dataflow>
<dataflow id="388" from="lhs_digits_data_V_lo_1" to="store_ln270" fromId="77" toId="81">
</dataflow>
<dataflow id="389" from="lhs1_digits_data_V_a" to="store_ln270" fromId="80" toId="81">
</dataflow>
<dataflow id="390" from="_ssdm_op_SpecRegionBegin" to="tmp_i_27" fromId="334" toId="82">
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<dataflow id="392" from="p_str47" to="tmp_i_27" fromId="391" toId="82">
</dataflow>
<dataflow id="393" from="_ssdm_op_SpecPipeline" to="specpipeline_ln269" fromId="338" toId="83">
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<dataflow id="394" from="StgValue_340" to="specpipeline_ln269" fromId="340" toId="83">
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<dataflow id="395" from="StgValue_342" to="specpipeline_ln269" fromId="342" toId="83">
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<dataflow id="396" from="StgValue_342" to="specpipeline_ln269" fromId="342" toId="83">
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<dataflow id="397" from="StgValue_345" to="specpipeline_ln269" fromId="345" toId="83">
</dataflow>
<dataflow id="398" from="p_str1" to="specpipeline_ln269" fromId="347" toId="83">
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<dataflow id="399" from="inter_lhs_digits_dat" to="inter_lhs_digits_dat_2" fromId="278" toId="84">
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<dataflow id="400" from="StgValue_319" to="inter_lhs_digits_dat_2" fromId="319" toId="84">
</dataflow>
<dataflow id="401" from="zext_ln270_1" to="inter_lhs_digits_dat_2" fromId="73" toId="84">
</dataflow>
<dataflow id="402" from="lhs_digits_data_V_lo_1" to="store_ln270" fromId="77" toId="85">
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<dataflow id="403" from="inter_lhs_digits_dat_2" to="store_ln270" fromId="84" toId="85">
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<dataflow id="404" from="_ssdm_op_SpecRegionEnd" to="empty_28" fromId="354" toId="86">
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<dataflow id="405" from="p_str47" to="empty_28" fromId="391" toId="86">
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<dataflow id="406" from="tmp_i_27" to="empty_28" fromId="82" toId="86">
</dataflow>
<dataflow id="407" from="i_6" to="i2_0_i" fromId="92" toId="89">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln272" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="408" from="br_ln272" to="i2_0_i" fromId="107" toId="89">
<BackEdge/>
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<dataflow id="409" from="StgValue_299" to="i2_0_i" fromId="299" toId="89">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
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<dataflow id="410" from="br_ln272" to="i2_0_i" fromId="88" toId="89">
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<dataflow id="411" from="i2_0_i" to="icmp_ln272" fromId="89" toId="90">
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<dataflow id="412" from="StgValue_305" to="icmp_ln272" fromId="305" toId="90">
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<dataflow id="413" from="_ssdm_op_SpecLoopTripCount" to="empty_29" fromId="307" toId="91">
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<dataflow id="414" from="StgValue_309" to="empty_29" fromId="309" toId="91">
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<dataflow id="415" from="StgValue_309" to="empty_29" fromId="309" toId="91">
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<dataflow id="416" from="StgValue_309" to="empty_29" fromId="309" toId="91">
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<dataflow id="417" from="i2_0_i" to="i_6" fromId="89" toId="92">
</dataflow>
<dataflow id="418" from="StgValue_314" to="i_6" fromId="314" toId="92">
</dataflow>
<dataflow id="419" from="icmp_ln272" to="br_ln272" fromId="90" toId="93">
</dataflow>
<dataflow id="420" from="i2_0_i" to="zext_ln275" fromId="89" toId="94">
</dataflow>
<dataflow id="421" from="rhs_digits_data_V" to="rhs_digits_data_V_ad" fromId="274" toId="95">
</dataflow>
<dataflow id="422" from="StgValue_319" to="rhs_digits_data_V_ad" fromId="319" toId="95">
</dataflow>
<dataflow id="423" from="zext_ln275" to="rhs_digits_data_V_ad" fromId="94" toId="95">
</dataflow>
<dataflow id="424" from="rhs_digits_data_V_ad" to="rhs_digits_data_V_lo" fromId="95" toId="96">
</dataflow>
<dataflow id="425" from="rhs_digits_data_V_ad" to="rhs_digits_data_V_lo" fromId="95" toId="97">
</dataflow>
<dataflow id="426" from="rhs0_tmp_digits_data" to="rhs0_tmp_digits_data_4" fromId="39" toId="98">
</dataflow>
<dataflow id="427" from="StgValue_319" to="rhs0_tmp_digits_data_4" fromId="319" toId="98">
</dataflow>
<dataflow id="428" from="zext_ln275" to="rhs0_tmp_digits_data_4" fromId="94" toId="98">
</dataflow>
<dataflow id="429" from="rhs_digits_data_V_lo" to="store_ln275" fromId="97" toId="99">
</dataflow>
<dataflow id="430" from="rhs0_tmp_digits_data_4" to="store_ln275" fromId="98" toId="99">
</dataflow>
<dataflow id="431" from="rhs0_digits_data_V" to="rhs0_digits_data_V_a" fromId="35" toId="100">
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<dataflow id="432" from="StgValue_319" to="rhs0_digits_data_V_a" fromId="319" toId="100">
</dataflow>
<dataflow id="433" from="zext_ln275" to="rhs0_digits_data_V_a" fromId="94" toId="100">
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<dataflow id="434" from="rhs_digits_data_V_lo" to="store_ln275" fromId="97" toId="101">
</dataflow>
<dataflow id="435" from="rhs0_digits_data_V_a" to="store_ln275" fromId="100" toId="101">
</dataflow>
<dataflow id="436" from="_ssdm_op_SpecRegionBegin" to="tmp_5_i" fromId="334" toId="102">
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<dataflow id="438" from="p_str48" to="tmp_5_i" fromId="437" toId="102">
</dataflow>
<dataflow id="439" from="_ssdm_op_SpecPipeline" to="specpipeline_ln274" fromId="338" toId="103">
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<dataflow id="440" from="StgValue_340" to="specpipeline_ln274" fromId="340" toId="103">
</dataflow>
<dataflow id="441" from="StgValue_342" to="specpipeline_ln274" fromId="342" toId="103">
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<dataflow id="442" from="StgValue_342" to="specpipeline_ln274" fromId="342" toId="103">
</dataflow>
<dataflow id="443" from="StgValue_345" to="specpipeline_ln274" fromId="345" toId="103">
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<dataflow id="444" from="p_str1" to="specpipeline_ln274" fromId="347" toId="103">
</dataflow>
<dataflow id="445" from="inter_rhs_digits_dat" to="inter_rhs_digits_dat_1" fromId="279" toId="104">
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<dataflow id="446" from="StgValue_319" to="inter_rhs_digits_dat_1" fromId="319" toId="104">
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<dataflow id="447" from="zext_ln275" to="inter_rhs_digits_dat_1" fromId="94" toId="104">
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<dataflow id="448" from="rhs_digits_data_V_lo" to="store_ln275" fromId="97" toId="105">
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<dataflow id="449" from="inter_rhs_digits_dat_1" to="store_ln275" fromId="104" toId="105">
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<dataflow id="450" from="_ssdm_op_SpecRegionEnd" to="empty_30" fromId="354" toId="106">
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<dataflow id="451" from="p_str48" to="empty_30" fromId="437" toId="106">
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<dataflow id="452" from="tmp_5_i" to="empty_30" fromId="102" toId="106">
</dataflow>
<dataflow id="453" from="i_7" to="i3_0_i" fromId="112" toId="109">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln277" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="454" from="br_ln277" to="i3_0_i" fromId="129" toId="109">
<BackEdge/>
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<dataflow id="455" from="StgValue_299" to="i3_0_i" fromId="299" toId="109">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="456" from="br_ln277" to="i3_0_i" fromId="108" toId="109">
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<dataflow id="457" from="i3_0_i" to="icmp_ln277" fromId="109" toId="110">
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<dataflow id="458" from="StgValue_305" to="icmp_ln277" fromId="305" toId="110">
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<dataflow id="459" from="_ssdm_op_SpecLoopTripCount" to="empty_31" fromId="307" toId="111">
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<dataflow id="460" from="StgValue_309" to="empty_31" fromId="309" toId="111">
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<dataflow id="461" from="StgValue_309" to="empty_31" fromId="309" toId="111">
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<dataflow id="462" from="StgValue_309" to="empty_31" fromId="309" toId="111">
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<dataflow id="463" from="i3_0_i" to="i_7" fromId="109" toId="112">
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<dataflow id="464" from="StgValue_314" to="i_7" fromId="314" toId="112">
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<dataflow id="465" from="icmp_ln277" to="br_ln277" fromId="110" toId="113">
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<dataflow id="466" from="i3_0_i" to="xor_ln280" fromId="109" toId="114">
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<dataflow id="467" from="StgValue_305" to="xor_ln280" fromId="305" toId="114">
</dataflow>
<dataflow id="468" from="xor_ln280" to="zext_ln280_1" fromId="114" toId="115">
</dataflow>
<dataflow id="469" from="rhs_digits_data_V" to="rhs_digits_data_V_ad_1" fromId="274" toId="116">
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<dataflow id="470" from="StgValue_319" to="rhs_digits_data_V_ad_1" fromId="319" toId="116">
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<dataflow id="471" from="zext_ln280_1" to="rhs_digits_data_V_ad_1" fromId="115" toId="116">
</dataflow>
<dataflow id="472" from="rhs_digits_data_V_ad_1" to="rhs_digits_data_V_lo_1" fromId="116" toId="117">
</dataflow>
<dataflow id="473" from="i3_0_i" to="zext_ln280" fromId="109" toId="118">
</dataflow>
<dataflow id="474" from="rhs_digits_data_V_ad_1" to="rhs_digits_data_V_lo_1" fromId="116" toId="119">
</dataflow>
<dataflow id="475" from="rhs1_tmp_digits_data" to="rhs1_tmp_digits_data_4" fromId="40" toId="120">
</dataflow>
<dataflow id="476" from="StgValue_319" to="rhs1_tmp_digits_data_4" fromId="319" toId="120">
</dataflow>
<dataflow id="477" from="zext_ln280" to="rhs1_tmp_digits_data_4" fromId="118" toId="120">
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<dataflow id="478" from="rhs_digits_data_V_lo_1" to="store_ln280" fromId="119" toId="121">
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<dataflow id="479" from="rhs1_tmp_digits_data_4" to="store_ln280" fromId="120" toId="121">
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<dataflow id="480" from="rhs1_digits_data_V" to="rhs1_digits_data_V_a" fromId="36" toId="122">
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<dataflow id="481" from="StgValue_319" to="rhs1_digits_data_V_a" fromId="319" toId="122">
</dataflow>
<dataflow id="482" from="zext_ln280" to="rhs1_digits_data_V_a" fromId="118" toId="122">
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<dataflow id="483" from="rhs_digits_data_V_lo_1" to="store_ln280" fromId="119" toId="123">
</dataflow>
<dataflow id="484" from="rhs1_digits_data_V_a" to="store_ln280" fromId="122" toId="123">
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<dataflow id="485" from="_ssdm_op_SpecRegionBegin" to="tmp_6_i" fromId="334" toId="124">
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<dataflow id="487" from="p_str49" to="tmp_6_i" fromId="486" toId="124">
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<dataflow id="488" from="_ssdm_op_SpecPipeline" to="specpipeline_ln279" fromId="338" toId="125">
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<dataflow id="489" from="StgValue_340" to="specpipeline_ln279" fromId="340" toId="125">
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<dataflow id="490" from="StgValue_342" to="specpipeline_ln279" fromId="342" toId="125">
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<dataflow id="491" from="StgValue_342" to="specpipeline_ln279" fromId="342" toId="125">
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<dataflow id="492" from="StgValue_345" to="specpipeline_ln279" fromId="345" toId="125">
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<dataflow id="493" from="p_str1" to="specpipeline_ln279" fromId="347" toId="125">
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<dataflow id="494" from="inter_rhs_digits_dat" to="inter_rhs_digits_dat_2" fromId="279" toId="126">
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<dataflow id="495" from="StgValue_319" to="inter_rhs_digits_dat_2" fromId="319" toId="126">
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<dataflow id="496" from="zext_ln280_1" to="inter_rhs_digits_dat_2" fromId="115" toId="126">
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<dataflow id="497" from="rhs_digits_data_V_lo_1" to="store_ln280" fromId="119" toId="127">
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<dataflow id="498" from="inter_rhs_digits_dat_2" to="store_ln280" fromId="126" toId="127">
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<dataflow id="499" from="_ssdm_op_SpecRegionEnd" to="empty_32" fromId="354" toId="128">
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<dataflow id="500" from="p_str49" to="empty_32" fromId="486" toId="128">
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<dataflow id="501" from="tmp_6_i" to="empty_32" fromId="124" toId="128">
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<dataflow id="503" from="mul_I_O" to="z0_tmp_bits_i" fromId="502" toId="130">
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<dataflow id="505" from="StgValue_504" to="z0_tmp_bits_i" fromId="504" toId="130">
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<dataflow id="506" from="lhs0_digits_data_V" to="z0_tmp_bits_i" fromId="33" toId="130">
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<dataflow id="507" from="StgValue_504" to="z0_tmp_bits_i" fromId="504" toId="130">
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<dataflow id="508" from="rhs0_digits_data_V" to="z0_tmp_bits_i" fromId="35" toId="130">
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<dataflow id="509" from="res_digits_data_V_as" to="z0_tmp_bits_i" fromId="41" toId="130">
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<dataflow id="510" from="mul_I_O" to="z2_tmp_bits_i" fromId="502" toId="131">
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<dataflow id="511" from="StgValue_504" to="z2_tmp_bits_i" fromId="504" toId="131">
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<dataflow id="512" from="lhs1_digits_data_V" to="z2_tmp_bits_i" fromId="34" toId="131">
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<dataflow id="513" from="StgValue_504" to="z2_tmp_bits_i" fromId="504" toId="131">
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<dataflow id="514" from="rhs1_digits_data_V" to="z2_tmp_bits_i" fromId="36" toId="131">
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<dataflow id="515" from="res_digits_data_V_as_1" to="z2_tmp_bits_i" fromId="42" toId="131">
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<dataflow id="517" from="karastuba_mul_templa.2" to="cross_mul_tmp_bits_i" fromId="516" toId="132">
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<dataflow id="518" from="lhs0_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="37" toId="132">
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<dataflow id="519" from="lhs1_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="38" toId="132">
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<dataflow id="520" from="rhs0_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="39" toId="132">
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<dataflow id="521" from="rhs1_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="40" toId="132">
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<dataflow id="522" from="p_cross_mul_digits_da" to="cross_mul_tmp_bits_i" fromId="43" toId="132">
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<dataflow id="523" from="mul_I_O" to="z0_tmp_bits_i" fromId="502" toId="133">
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<dataflow id="524" from="StgValue_504" to="z0_tmp_bits_i" fromId="504" toId="133">
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<dataflow id="525" from="lhs0_digits_data_V" to="z0_tmp_bits_i" fromId="33" toId="133">
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<dataflow id="526" from="StgValue_504" to="z0_tmp_bits_i" fromId="504" toId="133">
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<dataflow id="527" from="rhs0_digits_data_V" to="z0_tmp_bits_i" fromId="35" toId="133">
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<dataflow id="528" from="res_digits_data_V_as" to="z0_tmp_bits_i" fromId="41" toId="133">
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<dataflow id="529" from="mul_I_O" to="z2_tmp_bits_i" fromId="502" toId="134">
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<dataflow id="530" from="StgValue_504" to="z2_tmp_bits_i" fromId="504" toId="134">
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<dataflow id="531" from="lhs1_digits_data_V" to="z2_tmp_bits_i" fromId="34" toId="134">
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<dataflow id="532" from="StgValue_504" to="z2_tmp_bits_i" fromId="504" toId="134">
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<dataflow id="533" from="rhs1_digits_data_V" to="z2_tmp_bits_i" fromId="36" toId="134">
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<dataflow id="534" from="res_digits_data_V_as_1" to="z2_tmp_bits_i" fromId="42" toId="134">
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<dataflow id="535" from="karastuba_mul_templa.2" to="cross_mul_tmp_bits_i" fromId="516" toId="135">
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<dataflow id="536" from="lhs0_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="37" toId="135">
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<dataflow id="537" from="lhs1_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="38" toId="135">
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<dataflow id="538" from="rhs0_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="39" toId="135">
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<dataflow id="539" from="rhs1_tmp_digits_data" to="cross_mul_tmp_bits_i" fromId="40" toId="135">
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<dataflow id="540" from="p_cross_mul_digits_da" to="cross_mul_tmp_bits_i" fromId="43" toId="135">
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<dataflow id="541" from="cross_mul_tmp_bits_i" to="p_cross_mul_tmp_bits" fromId="135" toId="136">
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<dataflow id="543" from="StgValue_542" to="i4_0_i" fromId="542" toId="138">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
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<dataflow id="544" from="br_ln294" to="i4_0_i" fromId="137" toId="138">
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<dataflow id="545" from="i_8" to="i4_0_i" fromId="141" toId="138">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln294" val="0"/>
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<dataflow id="546" from="br_ln294" to="i4_0_i" fromId="152" toId="138">
<BackEdge/>
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<dataflow id="547" from="i4_0_i" to="icmp_ln294" fromId="138" toId="139">
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<dataflow id="549" from="StgValue_548" to="icmp_ln294" fromId="548" toId="139">
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<dataflow id="550" from="_ssdm_op_SpecLoopTripCount" to="empty_33" fromId="307" toId="140">
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<dataflow id="552" from="StgValue_551" to="empty_33" fromId="551" toId="140">
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<dataflow id="553" from="StgValue_551" to="empty_33" fromId="551" toId="140">
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<dataflow id="554" from="StgValue_551" to="empty_33" fromId="551" toId="140">
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<dataflow id="555" from="i4_0_i" to="i_8" fromId="138" toId="141">
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<dataflow id="557" from="StgValue_556" to="i_8" fromId="556" toId="141">
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<dataflow id="558" from="icmp_ln294" to="br_ln294" fromId="139" toId="142">
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<dataflow id="559" from="i4_0_i" to="zext_ln297" fromId="138" toId="143">
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<dataflow id="560" from="res_digits_data_V_as" to="res_digits_data_V_as_2" fromId="41" toId="144">
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<dataflow id="561" from="StgValue_319" to="res_digits_data_V_as_2" fromId="319" toId="144">
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<dataflow id="562" from="zext_ln297" to="res_digits_data_V_as_2" fromId="143" toId="144">
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<dataflow id="563" from="res_digits_data_V_as_2" to="res_digits_data_V_as_3" fromId="144" toId="145">
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<dataflow id="564" from="res_digits_data_V_as_2" to="res_digits_data_V_as_3" fromId="144" toId="146">
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<dataflow id="565" from="_ssdm_op_SpecRegionBegin" to="tmp_7_i" fromId="334" toId="147">
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<dataflow id="567" from="p_str50" to="tmp_7_i" fromId="566" toId="147">
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<dataflow id="568" from="_ssdm_op_SpecPipeline" to="specpipeline_ln296" fromId="338" toId="148">
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<dataflow id="569" from="StgValue_340" to="specpipeline_ln296" fromId="340" toId="148">
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<dataflow id="570" from="StgValue_342" to="specpipeline_ln296" fromId="342" toId="148">
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<dataflow id="571" from="StgValue_342" to="specpipeline_ln296" fromId="342" toId="148">
</dataflow>
<dataflow id="572" from="StgValue_345" to="specpipeline_ln296" fromId="345" toId="148">
</dataflow>
<dataflow id="573" from="p_str1" to="specpipeline_ln296" fromId="347" toId="148">
</dataflow>
<dataflow id="574" from="z0_digits_data_V" to="z0_digits_data_V_add" fromId="275" toId="149">
</dataflow>
<dataflow id="575" from="StgValue_319" to="z0_digits_data_V_add" fromId="319" toId="149">
</dataflow>
<dataflow id="576" from="zext_ln297" to="z0_digits_data_V_add" fromId="143" toId="149">
</dataflow>
<dataflow id="577" from="res_digits_data_V_as_3" to="store_ln297" fromId="146" toId="150">
</dataflow>
<dataflow id="578" from="z0_digits_data_V_add" to="store_ln297" fromId="149" toId="150">
</dataflow>
<dataflow id="579" from="_ssdm_op_SpecRegionEnd" to="empty_34" fromId="354" toId="151">
</dataflow>
<dataflow id="580" from="p_str50" to="empty_34" fromId="566" toId="151">
</dataflow>
<dataflow id="581" from="tmp_7_i" to="empty_34" fromId="147" toId="151">
</dataflow>
<dataflow id="582" from="i_9" to="i5_0_i" fromId="157" toId="154">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln300" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="583" from="br_ln300" to="i5_0_i" fromId="168" toId="154">
<BackEdge/>
</dataflow>
<dataflow id="584" from="StgValue_542" to="i5_0_i" fromId="542" toId="154">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="585" from="br_ln300" to="i5_0_i" fromId="153" toId="154">
</dataflow>
<dataflow id="586" from="i5_0_i" to="icmp_ln300" fromId="154" toId="155">
</dataflow>
<dataflow id="587" from="StgValue_548" to="icmp_ln300" fromId="548" toId="155">
</dataflow>
<dataflow id="588" from="_ssdm_op_SpecLoopTripCount" to="empty_35" fromId="307" toId="156">
</dataflow>
<dataflow id="589" from="StgValue_551" to="empty_35" fromId="551" toId="156">
</dataflow>
<dataflow id="590" from="StgValue_551" to="empty_35" fromId="551" toId="156">
</dataflow>
<dataflow id="591" from="StgValue_551" to="empty_35" fromId="551" toId="156">
</dataflow>
<dataflow id="592" from="i5_0_i" to="i_9" fromId="154" toId="157">
</dataflow>
<dataflow id="593" from="StgValue_556" to="i_9" fromId="556" toId="157">
</dataflow>
<dataflow id="594" from="icmp_ln300" to="br_ln300" fromId="155" toId="158">
</dataflow>
<dataflow id="595" from="i5_0_i" to="zext_ln303" fromId="154" toId="159">
</dataflow>
<dataflow id="596" from="res_digits_data_V_as_1" to="res_digits_data_V_as_4" fromId="42" toId="160">
</dataflow>
<dataflow id="597" from="StgValue_319" to="res_digits_data_V_as_4" fromId="319" toId="160">
</dataflow>
<dataflow id="598" from="zext_ln303" to="res_digits_data_V_as_4" fromId="159" toId="160">
</dataflow>
<dataflow id="599" from="res_digits_data_V_as_4" to="res_digits_data_V_as_5" fromId="160" toId="161">
</dataflow>
<dataflow id="600" from="res_digits_data_V_as_4" to="res_digits_data_V_as_5" fromId="160" toId="162">
</dataflow>
<dataflow id="601" from="_ssdm_op_SpecRegionBegin" to="tmp_8_i" fromId="334" toId="163">
</dataflow>
<dataflow id="603" from="p_str51" to="tmp_8_i" fromId="602" toId="163">
</dataflow>
<dataflow id="604" from="_ssdm_op_SpecPipeline" to="specpipeline_ln302" fromId="338" toId="164">
</dataflow>
<dataflow id="605" from="StgValue_340" to="specpipeline_ln302" fromId="340" toId="164">
</dataflow>
<dataflow id="606" from="StgValue_342" to="specpipeline_ln302" fromId="342" toId="164">
</dataflow>
<dataflow id="607" from="StgValue_342" to="specpipeline_ln302" fromId="342" toId="164">
</dataflow>
<dataflow id="608" from="StgValue_345" to="specpipeline_ln302" fromId="345" toId="164">
</dataflow>
<dataflow id="609" from="p_str1" to="specpipeline_ln302" fromId="347" toId="164">
</dataflow>
<dataflow id="610" from="z2_digits_data_V" to="z2_digits_data_V_add" fromId="276" toId="165">
</dataflow>
<dataflow id="611" from="StgValue_319" to="z2_digits_data_V_add" fromId="319" toId="165">
</dataflow>
<dataflow id="612" from="zext_ln303" to="z2_digits_data_V_add" fromId="159" toId="165">
</dataflow>
<dataflow id="613" from="res_digits_data_V_as_5" to="store_ln303" fromId="162" toId="166">
</dataflow>
<dataflow id="614" from="z2_digits_data_V_add" to="store_ln303" fromId="165" toId="166">
</dataflow>
<dataflow id="615" from="_ssdm_op_SpecRegionEnd" to="empty_36" fromId="354" toId="167">
</dataflow>
<dataflow id="616" from="p_str51" to="empty_36" fromId="602" toId="167">
</dataflow>
<dataflow id="617" from="tmp_8_i" to="empty_36" fromId="163" toId="167">
</dataflow>
<dataflow id="618" from="i_10" to="i6_0_i" fromId="173" toId="170">
<BackEdge/>
<condition id="-1">
<or_exp><and_exp><literal name="icmp_ln306" val="0"/>
</and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="619" from="br_ln306" to="i6_0_i" fromId="184" toId="170">
<BackEdge/>
</dataflow>
<dataflow id="620" from="StgValue_542" to="i6_0_i" fromId="542" toId="170">
<condition id="-1">
<or_exp><and_exp></and_exp></or_exp>
</condition>
</dataflow>
<dataflow id="621" from="br_ln306" to="i6_0_i" fromId="169" toId="170">
</dataflow>
<dataflow id="622" from="i6_0_i" to="icmp_ln306" fromId="170" toId="171">
</dataflow>
<dataflow id="623" from="StgValue_548" to="icmp_ln306" fromId="548" toId="171">
</dataflow>
<dataflow id="624" from="_ssdm_op_SpecLoopTripCount" to="empty_37" fromId="307" toId="172">
</dataflow>
<dataflow id="625" from="StgValue_551" to="empty_37" fromId="551" toId="172">
</dataflow>
<dataflow id="626" from="StgValue_551" to="empty_37" fromId="551" toId="172">
</dataflow>
<dataflow id="627" from="StgValue_551" to="empty_37" fromId="551" toId="172">
</dataflow>
<dataflow id="628" from="i6_0_i" to="i_10" fromId="170" toId="173">
</dataflow>
<dataflow id="629" from="StgValue_556" to="i_10" fromId="556" toId="173">
</dataflow>
<dataflow id="630" from="icmp_ln306" to="br_ln306" fromId="171" toId="174">
</dataflow>
<dataflow id="631" from="i6_0_i" to="zext_ln309" fromId="170" toId="175">
</dataflow>
<dataflow id="632" from="p_cross_mul_digits_da" to="p_cross_mul_digits_da_1" fromId="43" toId="176">
</dataflow>
<dataflow id="633" from="StgValue_319" to="p_cross_mul_digits_da_1" fromId="319" toId="176">
</dataflow>
<dataflow id="634" from="zext_ln309" to="p_cross_mul_digits_da_1" fromId="175" toId="176">
</dataflow>
<dataflow id="635" from="p_cross_mul_digits_da_1" to="p_cross_mul_digits_da_2" fromId="176" toId="177">
</dataflow>
<dataflow id="636" from="p_cross_mul_digits_da_1" to="p_cross_mul_digits_da_2" fromId="176" toId="178">
</dataflow>
<dataflow id="637" from="_ssdm_op_SpecRegionBegin" to="tmp_9_i" fromId="334" toId="179">
</dataflow>
<dataflow id="639" from="p_str52" to="tmp_9_i" fromId="638" toId="179">
</dataflow>
<dataflow id="640" from="_ssdm_op_SpecPipeline" to="specpipeline_ln308" fromId="338" toId="180">
</dataflow>
<dataflow id="641" from="StgValue_340" to="specpipeline_ln308" fromId="340" toId="180">
</dataflow>
<dataflow id="642" from="StgValue_342" to="specpipeline_ln308" fromId="342" toId="180">
</dataflow>
<dataflow id="643" from="StgValue_342" to="specpipeline_ln308" fromId="342" toId="180">
</dataflow>
<dataflow id="644" from="StgValue_345" to="specpipeline_ln308" fromId="345" toId="180">
</dataflow>
<dataflow id="645" from="p_str1" to="specpipeline_ln308" fromId="347" toId="180">
</dataflow>
<dataflow id="646" from="cross_mul_digits_dat" to="cross_mul_digits_dat_1" fromId="277" toId="181">
</dataflow>
<dataflow id="647" from="StgValue_319" to="cross_mul_digits_dat_1" fromId="319" toId="181">
</dataflow>
<dataflow id="648" from="zext_ln309" to="cross_mul_digits_dat_1" fromId="175" toId="181">
</dataflow>
<dataflow id="649" from="p_cross_mul_digits_da_2" to="store_ln309" fromId="178" toId="182">
</dataflow>
<dataflow id="650" from="cross_mul_digits_dat_1" to="store_ln309" fromId="181" toId="182">
</dataflow>
<dataflow id="651" from="_ssdm_op_SpecRegionEnd" to="empty_38" fromId="354" toId="183">
</dataflow>
<dataflow id="652" from="p_str52" to="empty_38" fromId="638" toId="183">
</dataflow>
<dataflow id="653" from="tmp_9_i" to="empty_38" fromId="179" toId="183">
</dataflow>
<dataflow id="654" from="z0_tmp_bits_i" to="zext_ln312" fromId="133" toId="185">
</dataflow>
<dataflow id="656" from="StgValue_655" to="mrv_i" fromId="655" toId="186">
</dataflow>
<dataflow id="657" from="zext_ln312" to="mrv_i" fromId="185" toId="186">
</dataflow>
<dataflow id="658" from="z2_tmp_bits_i" to="zext_ln312_1" fromId="134" toId="187">
</dataflow>
<dataflow id="659" from="mrv_i" to="mrv_1_i" fromId="186" toId="188">
</dataflow>
<dataflow id="660" from="zext_ln312_1" to="mrv_1_i" fromId="187" toId="188">
</dataflow>
<dataflow id="661" from="mrv_1_i" to="mrv_2_i" fromId="188" toId="189">
</dataflow>
<dataflow id="662" from="p_cross_mul_tmp_bits" to="mrv_2_i" fromId="136" toId="189">
</dataflow>
<dataflow id="663" from="mrv_2_i" to="mrv_3_i" fromId="189" toId="190">
</dataflow>
<dataflow id="664" from="p_read_cast_i" to="mrv_3_i" fromId="45" toId="190">
</dataflow>
<dataflow id="665" from="mrv_3_i" to="mrv_4_i" fromId="190" toId="191">
</dataflow>
<dataflow id="666" from="p_read1_cast_i" to="mrv_4_i" fromId="44" toId="191">
</dataflow>
<dataflow id="667" from="mrv_4_i" to="ret_ln390" fromId="191" toId="192">
</dataflow>
<dataflow id="668" from="icmp_ln262" to="StgValue_2" fromId="48" toId="2">
</dataflow>
<dataflow id="669" from="icmp_ln262" to="StgValue_3" fromId="48" toId="3">
</dataflow>
<dataflow id="670" from="icmp_ln262" to="StgValue_4" fromId="48" toId="4">
</dataflow>
<dataflow id="671" from="icmp_ln267" to="StgValue_6" fromId="68" toId="6">
</dataflow>
<dataflow id="672" from="icmp_ln267" to="StgValue_7" fromId="68" toId="7">
</dataflow>
<dataflow id="673" from="icmp_ln267" to="StgValue_8" fromId="68" toId="8">
</dataflow>
<dataflow id="674" from="icmp_ln272" to="StgValue_10" fromId="90" toId="10">
</dataflow>
<dataflow id="675" from="icmp_ln272" to="StgValue_11" fromId="90" toId="11">
</dataflow>
<dataflow id="676" from="icmp_ln272" to="StgValue_12" fromId="90" toId="12">
</dataflow>
<dataflow id="677" from="icmp_ln277" to="StgValue_14" fromId="110" toId="14">
</dataflow>
<dataflow id="678" from="icmp_ln277" to="StgValue_15" fromId="110" toId="15">
</dataflow>
<dataflow id="679" from="icmp_ln277" to="StgValue_16" fromId="110" toId="16">
</dataflow>
<dataflow id="680" from="icmp_ln294" to="StgValue_19" fromId="139" toId="19">
</dataflow>
<dataflow id="681" from="icmp_ln294" to="StgValue_20" fromId="139" toId="20">
</dataflow>
<dataflow id="682" from="icmp_ln294" to="StgValue_21" fromId="139" toId="21">
</dataflow>
<dataflow id="683" from="icmp_ln300" to="StgValue_23" fromId="155" toId="23">
</dataflow>
<dataflow id="684" from="icmp_ln300" to="StgValue_24" fromId="155" toId="24">
</dataflow>
<dataflow id="685" from="icmp_ln300" to="StgValue_25" fromId="155" toId="25">
</dataflow>
<dataflow id="686" from="icmp_ln306" to="StgValue_27" fromId="171" toId="27">
</dataflow>
<dataflow id="687" from="icmp_ln306" to="StgValue_28" fromId="171" toId="28">
</dataflow>
<dataflow id="688" from="icmp_ln306" to="StgValue_29" fromId="171" toId="29">
</dataflow>
</dataflows>


</stg>
