| #blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 8], order = [0, 1], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}> | |
| #blocked1 = #triton_gpu.blocked<{sizePerThread = [1, 4], threadsPerWarp = [1, 32], warpsPerCTA = [1, 8], order = [1, 0], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}> | |
| #blocked2 = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 8], order = [1, 0], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}> | |
| module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} { | |
| tt.func public @triton__0d1d2d3d4d5d6e7de(%arg0: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg6: i64 {tt.max_divisibility = 8 : i32}, %arg7: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} { | |
| %cst = arith.constant dense<7680> : tensor<1x2048xi64, #blocked> | |
| %cst_0 = arith.constant dense<7680> : tensor<1x2048xi64, #blocked1> | |
| %cst_1 = arith.constant dense<50257> : tensor<1x2048xi64, #blocked1> | |
| %c385973760_i64 = arith.constant 385973760 : i64 | |
| %c7680_i64 = arith.constant 7680 : i64 | |
| %c8_i64 = arith.constant 8 : i64 | |
| %cst_2 = arith.constant dense<-1> : tensor<1x2048xi64, #blocked1> | |
| %cst_3 = arith.constant dense<0.000000e+00> : tensor<1x2048xf32, #blocked> | |
| %cst_4 = arith.constant dense<0> : tensor<1x2048xi64, #blocked1> | |
| %cst_5 = arith.constant dense<0.000000e+00> : tensor<1x2048xf32, #blocked1> | |
| %cst_6 = arith.constant dense<0.000000e+00> : tensor<1x2048xbf16, #blocked> | |
| %c0_i32 = arith.constant 0 : i32 | |
| %c7680_i32 = arith.constant 7680 : i32 | |
| %c2048_i32 = arith.constant 2048 : i32 | |
| %0 = tt.get_program_id x : i32 | |
| %1 = arith.extsi %0 : i32 to i64 | |
| %2 = arith.cmpi slt, %1, %c8_i64 : i64 | |
| %3 = tt.make_range {end = 2048 : i32, start = 0 : i32} : tensor<2048xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>> | |
| %4 = tt.make_range {end = 2048 : i32, start = 0 : i32} : tensor<2048xi32, #triton_gpu.slice<{dim = 0, parent = #blocked1}>> | |
| %5 = tt.expand_dims %3 {axis = 0 : i32} : (tensor<2048xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>) -> tensor<1x2048xi32, #blocked> | |
| %6 = tt.expand_dims %4 {axis = 0 : i32} : (tensor<2048xi32, #triton_gpu.slice<{dim = 0, parent = #blocked1}>>) -> tensor<1x2048xi32, #blocked1> | |
| %7 = arith.extsi %5 : tensor<1x2048xi32, #blocked> to tensor<1x2048xi64, #blocked> | |
| %8 = arith.extsi %6 : tensor<1x2048xi32, #blocked1> to tensor<1x2048xi64, #blocked1> | |
| %9 = arith.muli %1, %c7680_i64 : i64 | |
| %10 = tt.splat %9 : (i64) -> tensor<1x2048xi64, #blocked1> | |
| %11 = tt.splat %arg0 : (!tt.ptr<i64, 1>) -> tensor<1x2048x!tt.ptr<i64, 1>, #blocked1> | |
| %12 = tt.splat %2 : (i1) -> tensor<1x2048xi1, #blocked> | |
| %13 = tt.splat %2 : (i1) -> tensor<1x2048xi1, #blocked1> | |
| %14 = tt.splat %arg2 : (!tt.ptr<f32, 1>) -> tensor<1x2048x!tt.ptr<f32, 1>, #blocked1> | |
| %15 = tt.splat %arg3 : (!tt.ptr<f32, 1>) -> tensor<1x2048x!tt.ptr<f32, 1>, #blocked1> | |
| %16 = arith.muli %1, %c385973760_i64 : i64 | |
| %17 = tt.splat %16 : (i64) -> tensor<1x2048xi64, #blocked1> | |
| %18 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>, #blocked1> | |
| %19:2 = scf.for %arg8 = %c0_i32 to %c7680_i32 step %c2048_i32 iter_args(%arg9 = %cst_4, %arg10 = %cst_3) -> (tensor<1x2048xi64, #blocked1>, tensor<1x2048xf32, #blocked>) : i32 { | |
| %30 = arith.extsi %arg8 : i32 to i64 | |
| %31 = tt.splat %30 : (i64) -> tensor<1x2048xi64, #blocked> | |
| %32 = tt.splat %30 : (i64) -> tensor<1x2048xi64, #blocked1> | |
| %33 = arith.addi %31, %7 : tensor<1x2048xi64, #blocked> | |
| %34 = arith.addi %32, %8 : tensor<1x2048xi64, #blocked1> | |
| %35 = arith.cmpi slt, %33, %cst : tensor<1x2048xi64, #blocked> | |
| %36 = arith.cmpi slt, %34, %cst_0 : tensor<1x2048xi64, #blocked1> | |
| %37 = arith.addi %34, %10 : tensor<1x2048xi64, #blocked1> | |
| %38 = tt.addptr %11, %37 : tensor<1x2048x!tt.ptr<i64, 1>, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %39 = arith.andi %35, %12 : tensor<1x2048xi1, #blocked> | |
| %40 = arith.andi %36, %13 : tensor<1x2048xi1, #blocked1> | |
| %41 = tt.load %38, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xi64, #blocked1> | |
| %42 = tt.addptr %14, %37 : tensor<1x2048x!tt.ptr<f32, 1>, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %43 = tt.load %42, %40, %cst_5 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xf32, #blocked1> | |
| %44 = triton_gpu.convert_layout %43 : (tensor<1x2048xf32, #blocked1>) -> tensor<1x2048xf32, #blocked> | |
| %45 = tt.addptr %15, %37 : tensor<1x2048x!tt.ptr<f32, 1>, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %46 = tt.load %45, %40, %cst_5 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xf32, #blocked1> | |
| %47 = arith.cmpi ne, %41, %cst_2 : tensor<1x2048xi64, #blocked1> | |
| %48 = triton_gpu.convert_layout %47 : (tensor<1x2048xi1, #blocked1>) -> tensor<1x2048xi1, #blocked> | |
| %49 = arith.extui %47 : tensor<1x2048xi1, #blocked1> to tensor<1x2048xi64, #blocked1> | |
| %50 = arith.addi %arg9, %49 : tensor<1x2048xi64, #blocked1> | |
| %51 = arith.select %40, %50, %arg9 : tensor<1x2048xi1, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %52 = arith.select %47, %41, %cst_4 : tensor<1x2048xi1, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %53 = arith.addi %52, %cst_1 : tensor<1x2048xi64, #blocked1> | |
| %54 = arith.cmpi slt, %52, %cst_4 : tensor<1x2048xi64, #blocked1> | |
| %55 = arith.select %54, %53, %52 : tensor<1x2048xi1, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %56 = arith.cmpi sge, %55, %cst_4 : tensor<1x2048xi64, #blocked1> | |
| %57 = arith.cmpi slt, %55, %cst_1 : tensor<1x2048xi64, #blocked1> | |
| %58 = arith.andi %56, %57 : tensor<1x2048xi1, #blocked1> | |
| %59 = triton_gpu.convert_layout %58 : (tensor<1x2048xi1, #blocked1>) -> tensor<1x2048xi1, #blocked2> | |
| tt.assert %59, "index out of bounds: 0 <= tmp11 < 50257", "<frozen importlib._bootstrap_external>", "_call_with_frames_removed", 883 : tensor<1x2048xi1, #blocked2> | |
| %60 = arith.muli %34, %cst_1 : tensor<1x2048xi64, #blocked1> | |
| %61 = arith.addi %55, %60 : tensor<1x2048xi64, #blocked1> | |
| %62 = arith.addi %61, %17 : tensor<1x2048xi64, #blocked1> | |
| %63 = tt.addptr %18, %62 : tensor<1x2048x!tt.ptr<bf16, 1>, #blocked1>, tensor<1x2048xi64, #blocked1> | |
| %64 = triton_gpu.convert_layout %63 : (tensor<1x2048x!tt.ptr<bf16, 1>, #blocked1>) -> tensor<1x2048x!tt.ptr<bf16, 1>, #blocked> | |
| %65 = tt.load %64, %39, %cst_6 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<1x2048xbf16, #blocked> | |
| %66 = arith.extf %65 : tensor<1x2048xbf16, #blocked> to tensor<1x2048xf32, #blocked> | |
| %67 = arith.subf %66, %44 : tensor<1x2048xf32, #blocked> | |
| %68 = math.log %46 : tensor<1x2048xf32, #blocked1> | |
| %69 = triton_gpu.convert_layout %68 : (tensor<1x2048xf32, #blocked1>) -> tensor<1x2048xf32, #blocked> | |
| %70 = arith.subf %67, %69 : tensor<1x2048xf32, #blocked> | |
| %71 = arith.subf %cst_3, %70 : tensor<1x2048xf32, #blocked> | |
| %72 = arith.select %48, %71, %cst_3 : tensor<1x2048xi1, #blocked>, tensor<1x2048xf32, #blocked> | |
| %73 = arith.addf %arg10, %72 : tensor<1x2048xf32, #blocked> | |
| %74 = arith.select %39, %73, %arg10 : tensor<1x2048xi1, #blocked>, tensor<1x2048xf32, #blocked> | |
| scf.yield %51, %74 : tensor<1x2048xi64, #blocked1>, tensor<1x2048xf32, #blocked> | |
| } | |
| %20 = "tt.reduce"(%19#0) <{axis = 1 : i32}> ({ | |
| ^bb0(%arg8: i64, %arg9: i64): | |
| %30 = arith.addi %arg8, %arg9 : i64 | |
| tt.reduce.return %30 : i64 | |
| }) : (tensor<1x2048xi64, #blocked1>) -> tensor<1xi64, #triton_gpu.slice<{dim = 1, parent = #blocked1}>> | |
| %21 = triton_gpu.convert_layout %20 : (tensor<1xi64, #triton_gpu.slice<{dim = 1, parent = #blocked1}>>) -> tensor<1xi64, #triton_gpu.slice<{dim = 1, parent = #blocked}>> | |
| %22 = tt.expand_dims %21 {axis = 1 : i32} : (tensor<1xi64, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1x1xi64, #blocked> | |
| %23 = tt.addptr %arg4, %1 : !tt.ptr<i64, 1>, i64 | |
| %24 = tt.splat %23 : (!tt.ptr<i64, 1>) -> tensor<1x1x!tt.ptr<i64, 1>, #blocked> | |
| %25 = tt.splat %2 : (i1) -> tensor<1x1xi1, #blocked> | |
| tt.store %24, %22, %25 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xi64, #blocked> | |
| %26 = "tt.reduce"(%19#1) <{axis = 1 : i32}> ({ | |
| ^bb0(%arg8: f32, %arg9: f32): | |
| %30 = arith.addf %arg8, %arg9 : f32 | |
| tt.reduce.return %30 : f32 | |
| }) : (tensor<1x2048xf32, #blocked>) -> tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>> | |
| %27 = tt.expand_dims %26 {axis = 1 : i32} : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1x1xf32, #blocked> | |
| %28 = tt.addptr %arg5, %1 : !tt.ptr<f32, 1>, i64 | |
| %29 = tt.splat %28 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>, #blocked> | |
| tt.store %29, %27, %25 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32, #blocked> | |
| tt.return | |
| } | |
| } | |