diff --git a/.cache/pip/http-v2/f/b/c/e/7/fbce770ef113d7303a71734c8a71c6ac1b2cbc4e832a8e70832c37ca.body b/.cache/pip/http-v2/f/b/c/e/7/fbce770ef113d7303a71734c8a71c6ac1b2cbc4e832a8e70832c37ca.body
new file mode 100644
index 0000000000000000000000000000000000000000..188d36268ad581b0959c9d634af7481087ff52cf
Binary files /dev/null and b/.cache/pip/http-v2/f/b/c/e/7/fbce770ef113d7303a71734c8a71c6ac1b2cbc4e832a8e70832c37ca.body differ
diff --git a/.cache/wandb/logs/core-debug-20240926_124123.log b/.cache/wandb/logs/core-debug-20240926_124123.log
new file mode 100644
index 0000000000000000000000000000000000000000..3bb2d33020377a6ea02d93959ba84df5fc5e225d
--- /dev/null
+++ b/.cache/wandb/logs/core-debug-20240926_124123.log
@@ -0,0 +1,14 @@
+{"time":"2024-09-26T12:41:23.048835354Z","level":"INFO","msg":"started logging, with flags","port-filename":"/tmp/tmpvaxwxqk7/port-6230.txt","pid":6230,"debug":false,"disable-analytics":false}
+{"time":"2024-09-26T12:41:23.048873271Z","level":"INFO","msg":"FeatureState","shutdownOnParentExitEnabled":false}
+{"time":"2024-09-26T12:41:23.049626557Z","level":"INFO","msg":"Will exit if parent process dies.","ppid":6230}
+{"time":"2024-09-26T12:41:23.049598776Z","level":"INFO","msg":"server is running","addr":{"IP":"127.0.0.1","Port":41101,"Zone":""}}
+{"time":"2024-09-26T12:41:23.244733652Z","level":"INFO","msg":"created new connection","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T12:41:23.685497123Z","level":"INFO","msg":"connection init received","streamId":"zc6s8e8w","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T12:41:23.68571591Z","level":"ERROR","msg":"error creating symlink","error":"symlink /root/.cache/wandb/logs/core-debug-20240926_124123.log /root/wandb/run-20240926_124123-zc6s8e8w/logs/debug-core.log: file exists"}
+{"time":"2024-09-26T12:41:23.687506497Z","level":"INFO","msg":"connection init completed","streamId":"zc6s8e8w","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T19:27:20.668791042Z","level":"INFO","msg":"handle finish received","streamId":"zc6s8e8w","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T19:27:22.057519583Z","level":"INFO","msg":"connection: teardown","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T19:27:22.057561736Z","level":"INFO","msg":"server is shutting down"}
+{"time":"2024-09-26T19:27:22.057679612Z","level":"INFO","msg":"closed connection","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T19:27:22.057729867Z","level":"INFO","msg":"connection closed","id":"127.0.0.1:48216"}
+{"time":"2024-09-26T19:27:22.057743237Z","level":"INFO","msg":"server is closed"}
diff --git a/.local/share/jupyter/nbextensions/addbefore/icon.png b/.local/share/jupyter/nbextensions/addbefore/icon.png
new file mode 100644
index 0000000000000000000000000000000000000000..0d77505d5b51986892cec5af2b7d1d7a0c23762d
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diff --git a/.local/share/jupyter/nbextensions/addbefore/readme.md b/.local/share/jupyter/nbextensions/addbefore/readme.md
new file mode 100644
index 0000000000000000000000000000000000000000..811adb6ee58ef1b275e0ea3429b0621b588f749b
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/addbefore/readme.md
@@ -0,0 +1,12 @@
+Addbefore
+=========
+
+This extension adds a button to add a empty cell before the currently active cell.
+As was present in IPython 1.0.
+It is with a circled up arrow.
+The plus signed "Add Cell After button" is moved to be next to Add Cell Before,
+and given matching circled down arrow icon.
+
+The functionality of the buttons are as per in the Insert Menu,
+for Insert Cell Above, and Insert Cell Below.
+A empty cell is added, and it takes the cursor focus.
diff --git a/.local/share/jupyter/nbextensions/autosavetime/main.js b/.local/share/jupyter/nbextensions/autosavetime/main.js
new file mode 100644
index 0000000000000000000000000000000000000000..0e5ee3552371b3610df12a64ed9d65b452bbc0f9
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/autosavetime/main.js
@@ -0,0 +1,81 @@
+define([
+    'jquery',
+    'base/js/namespace',
+    'base/js/events'
+], function(
+    $,
+    IPython,
+    events
+) {
+    "use strict";
+
+    // define default values for config parameters
+    var params = {
+        autosavetime_set_starting_interval : false,
+        autosavetime_starting_interval : 2,
+        autosavetime_show_selector : true
+    };
+
+    // update params with any specified in the server's config file
+    var update_params = function() {
+        var config = IPython.notebook.config;
+        for (var key in params) {
+            if (config.data.hasOwnProperty(key))
+                params[key] = config.data[key];
+        }
+    };
+
+    var initialize = function () {
+        update_params();
+
+        var si = params.autosavetime_starting_interval;
+        var set_si = params.autosavetime_set_starting_interval;
+
+        if (params.autosavetime_show_selector) {
+            var select = $('<select class="ui-widget-content"/>');
+            select.change(function() {
+                 var interval = parseInt($(this).val(), 10) * 60 * 1000;
+                 IPython.notebook.set_autosave_interval(interval);
+            });
+
+            var thresholds = [0,2,5,10,15,20,30,60];
+
+            if (set_si && thresholds.indexOf(si) < 0) thresholds.push(si);
+
+            thresholds.sort(function(a, b) { return a-b; });
+
+            for (var i in thresholds) {
+                var thr = thresholds[i];
+                select.append($('<option/>').attr('value', thr).text(thr));
+            }
+
+            select.find('option[value="2"]').text('2 (default)');
+            select.find('option[value="0"]').text('off');
+
+            if (set_si) select.val(si);
+
+            IPython.toolbar.element.append(
+                $('<label class="navbar-text"/>').text('Autosave interval (min):')
+            ).append(select);
+        }
+
+        events.on("autosave_enabled.Notebook", function(event, value) {
+            if (set_si) {
+                IPython.notebook.set_autosave_interval(si * 60 * 1000);
+            }
+            else {
+                if (params.autosavetime_show_selector) {
+                    select.val(parseInt(value, 10) / 60 / 1000);
+                }
+            }
+        });
+    };
+
+    var load_ipython_extension = function() {
+        return IPython.notebook.config.loaded.then(initialize);
+    };
+
+    return {
+        load_ipython_extension : load_ipython_extension
+    };
+});
diff --git a/.local/share/jupyter/nbextensions/autoscroll/README.md b/.local/share/jupyter/nbextensions/autoscroll/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..18dcab5a28fcb097d56e6d501ea507283c6a7d35
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/autoscroll/README.md
@@ -0,0 +1,22 @@
+autoscroll
+==========
+
+
+Description
+-----------
+
+Optionally set the output autoscroll threshold, and/or add a selector to the
+toolbar to set it, and/or add a toolbar button to enable/disable it.
+
+
+Parameters
+----------
+
+* `autoscroll_set_on_load` -
+  Set an autoscroll threshold on notebook load. If false, the default is unchanged.
+* `autoscroll_starting_threshold` -
+  Autoscroll threshold which would be set on notebook load. `-1` disables autoscrolling.
+* `autoscroll_show_selector` -
+  Add a selector to the toolbar to change the autoscroll threshold
+* `autoscroll_show_button` -
+  Add a button to the toolbar to disable/enable autoscrolling
diff --git a/.local/share/jupyter/nbextensions/autoscroll/icon.png b/.local/share/jupyter/nbextensions/autoscroll/icon.png
new file mode 100644
index 0000000000000000000000000000000000000000..5a6f49e506248eae816aa993e06f543c8c47164e
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diff --git a/.local/share/jupyter/nbextensions/cell_filter/README.md b/.local/share/jupyter/nbextensions/cell_filter/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..3969c04a4891dd26441bf9cd9a96e45eff22cae5
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/cell_filter/README.md
@@ -0,0 +1,4 @@
+Cell filter
+===========
+
+An extension that allows you to filter cells by tags. Keywords entered into the search bar separated by spaces joins them with logical AND.
diff --git a/.local/share/jupyter/nbextensions/cell_filter/cell_filter.yml b/.local/share/jupyter/nbextensions/cell_filter/cell_filter.yml
new file mode 100644
index 0000000000000000000000000000000000000000..182771389a1b0293446d28e4de86847fa8ac41a1
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/cell_filter/cell_filter.yml
@@ -0,0 +1,7 @@
+Type: Jupyter Notebook Extension
+Compatibility: 4.x, 5.x
+Name: Cell Filter
+Main: cell_filter.js
+Link: README.md
+Description: |
+  An extension that allows you to filter cells by tags. Keywords entered into the search bar separated by spaces joins them with logical AND.
diff --git a/.local/share/jupyter/nbextensions/code_prettify/2to3.js b/.local/share/jupyter/nbextensions/code_prettify/2to3.js
new file mode 100644
index 0000000000000000000000000000000000000000..46219b5eb89ab32db7803b494d80943a96864726
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/code_prettify/2to3.js
@@ -0,0 +1,49 @@
+// Copyright (c) Jupyter-Contrib Team.
+// Distributed under the terms of the Modified BSD License.
+// Authors: @EWouters, @jfbercher and @jcb91
+// Based on: https://github.com/jfbercher/code_prettify and
+//           https://gist.github.com/takluyver/c8839593c615bb2f6e80
+
+define(['./kernel_exec_on_cell'], function(kernel_exec_on_cell) {
+    'use strict';
+
+    var mod_name = '2to3';
+
+    // gives default settings
+    var cfg = {
+        add_toolbar_button: true,
+        hotkeys: {
+            process_selected: 'Ctrl-M',
+            process_all: 'Ctrl-Shift-M',
+        },
+        register_hotkey: true,
+        show_alerts_for_errors: true,
+        button_icon: 'fa-space-shuttle',
+        button_label: 'Convert Python 2 to 3',
+        kbd_shortcut_text: 'Convert Python 2 to 3 in' // ' current cell(s)'
+    };
+
+    cfg.kernel_config_map = { // map of parameters for supported kernels
+        "python": {
+            "library": [
+                "import lib2to3.refactor, json",
+                "_2to3_refactoring_tool = lib2to3.refactor.RefactoringTool(",
+                "    set(lib2to3.refactor.get_fixers_from_package('lib2to3.fixes')))",
+                "def _2to3_refactor_cell(src):",
+                "    try:",
+                "        tree = _2to3_refactoring_tool.refactor_string(src+'\\n', '<dummy_name>')",
+                "    except (lib2to3.pgen2.parse.ParseError, lib2to3.pgen2.tokenize.TokenError):",
+                "        return src ",
+                "    else:",
+                "        return str(tree)[:-1]",
+            ].join('\n'),
+            "prefix": "print(json.dumps(_2to3_refactor_cell(u",
+            "postfix": ")))"
+        }
+    };
+
+    var converter = new kernel_exec_on_cell.define_plugin(mod_name, cfg);
+    converter.load_ipython_extension = converter.initialize_plugin;
+    return converter;
+
+    });
diff --git a/.local/share/jupyter/nbextensions/contrib_nbextensions_help_item/main.js b/.local/share/jupyter/nbextensions/contrib_nbextensions_help_item/main.js
new file mode 100644
index 0000000000000000000000000000000000000000..991c907dc84fa11291ec6f04ff8ef66e8fea115e
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/contrib_nbextensions_help_item/main.js
@@ -0,0 +1,35 @@
+// Small extension to add an help menu pointing 
+// to jupyter_contrib_nbextensions at readthedocs.
+
+define(['jquery', 'base/js/namespace'], function($, Jupyter) {
+    "use strict";
+
+    function add_help_menu_item() {
+
+        if ($('#jupyter_contrib_nbextensions_help').length > 0) {
+            return;
+        }
+        var menu_item = $('<li/>')
+            .append(
+                $('<a/>')
+                .html('Jupyter-contrib <br> nbextensions')
+                .attr('title', 'Jupyter_contrib_nbextensions documentation')
+                .attr('id', "jupyter_contrib_nbextensions_help")
+                .attr('href', 'http://jupyter-contrib-nbextensions.readthedocs.io/en/latest/')
+                .attr('target', "_blank")
+                .append(
+                    $('<i/>')
+                    .addClass('fa fa-external-link menu-icon pull-right')
+                ))
+        menu_item.insertBefore($($("#help_menu > .divider")[1]))
+    }
+
+
+    var load_ipython_extension = function() {
+        add_help_menu_item();
+    };
+
+    return {
+        load_ipython_extension: load_ipython_extension
+    };
+});
diff --git a/.local/share/jupyter/nbextensions/datestamper/main.js b/.local/share/jupyter/nbextensions/datestamper/main.js
new file mode 100644
index 0000000000000000000000000000000000000000..8060ca136592edbec85a9d4cbac553f39a6e8669
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/datestamper/main.js
@@ -0,0 +1,42 @@
+define([
+    "base/js/namespace",
+    "jquery"
+], function (IPython, $) {
+    "use strict";
+
+    var padZero = function(val){
+        return ("0" + val).slice(-2);
+    };
+
+    var datestring = function(){
+        var d = new Date();
+        return (
+            d.getFullYear() + "-" + padZero(d.getMonth() + 1) + "-" + padZero(d.getDate()) +
+            " " + padZero(d.getHours()) + ":" + padZero(d.getMinutes()) + ":" + padZero(d.getSeconds())
+        );
+    };
+
+    var datestamp = function(){
+        var cell = IPython.notebook.get_selected_cell();
+        var do_render = !((cell.cell_type === "raw") || (cell.cell_type === "code"));
+        if(do_render) cell.unrender();
+        cell.code_mirror.focus();
+        cell.code_mirror.doc.replaceSelection(datestring() + " ", "end");
+        if(do_render) cell.edit_mode();
+    };
+
+    var load_ipython_extension = function () {
+        IPython.toolbar.add_buttons_group([
+            IPython.keyboard_manager.actions.register ({
+                help   : 'insert datestamp',
+                icon   : 'fa-calendar',
+                handler: datestamp
+            }, 'insert-datestamp', 'datestamp')
+        ]);
+    };
+
+    var extension = {
+        load_ipython_extension : load_ipython_extension,
+    };
+    return extension;
+});
diff --git a/.local/share/jupyter/nbextensions/equation-numbering/icon.png b/.local/share/jupyter/nbextensions/equation-numbering/icon.png
new file mode 100644
index 0000000000000000000000000000000000000000..23d0cbeb5589707e1d8a44dbf135e935f121fcec
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diff --git a/.local/share/jupyter/nbextensions/execute_time/ExecuteTime.yaml b/.local/share/jupyter/nbextensions/execute_time/ExecuteTime.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..583a1e478a5b809f21b4d5381367130e39992193
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/execute_time/ExecuteTime.yaml
@@ -0,0 +1,88 @@
+Type: IPython Notebook Extension
+Name: ExecuteTime
+Description: Display when each cell has been executed and how long it took
+Link: readme.md
+Icon: icon.png
+Main: ExecuteTime.js
+Compatibility: 4.x, 5.x
+Parameters:
+
+- name: ExecuteTime.clear_timings_on_clear_output
+  description: |
+    When cells' outputs are cleared, also clear their timing data, e.g. when
+    using the "Kernel > Restart & Clear Output" menu item
+  input_type: checkbox
+  default: false
+
+- name: ExecuteTime.clear_timings_on_kernel_restart
+  description: |
+    Clear all cells' execution timing data on any kernel restart event
+  input_type: checkbox
+  default: false
+
+- name: ExecuteTime.display_absolute_timings
+  description: |
+    Display absolute timings for the start time of execution.
+    Setting false will display a relative timestamp like 'a few seconds ago'
+  default: true
+  input_type: checkbox
+
+- name: ExecuteTime.display_absolute_format
+  description: |
+    The format to use when displaying absolute timings (see above)
+  default: 'YYYY-MM-DD HH:mm:ss'
+  input_type: text
+
+- name: ExecuteTime.relative_timing_update_period
+  description: |
+    Seconds to wait between updating the relative timestamps, if using them
+    (see above)
+  default: 10
+  input_type: number
+  step: 1
+  min: 1
+  max: 600
+
+- name: ExecuteTime.display_in_utc
+  description: |
+    Display times in UTC, rather than in the local timezone set by the browser
+  default: false
+  input_type: checkbox
+
+- name: ExecuteTime.default_kernel_to_utc
+  description: |
+    For kernel timestamps which do not specify a timezone, assume UTC
+  default: true
+  input_type: checkbox
+
+- name: ExecuteTime.display_right_aligned
+  description: |
+    Right-align the text in the timing area under each cell
+  default: false
+  input_type: checkbox
+
+- name: ExecuteTime.highlight.use
+  description: |
+    Highlight the displayed execution time on completion of execution
+  default: true
+  input_type: checkbox
+
+- name: ExecuteTime.highlight.color
+  description: |
+    Color to use for highlighting the displayed execution time
+  default: '#00BB00'
+  input_type: color
+
+- name: ExecuteTime.template.executed
+  description: |
+    Template for the timing message for executed cells. See readme for
+    replacement tokens.
+  default: 'executed in ${duration}, finished ${end_time}'
+  input_type: text
+
+- name: ExecuteTime.template.queued
+  description: |
+    Template for the timing message for queued cells. See readme for
+    replacement tokens.
+  default: 'execution queued ${start_time}'
+  input_type: text
diff --git a/.local/share/jupyter/nbextensions/execution_dependencies/README.md b/.local/share/jupyter/nbextensions/execution_dependencies/README.md
new file mode 100644
index 0000000000000000000000000000000000000000..528ea8466bae6140429073a156ac3220029d94d3
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/execution_dependencies/README.md
@@ -0,0 +1,43 @@
+execution_dependencies
+======================
+
+Writing extensive notebooks can become very complicated since many cells act as stepping stones to produce intermediate results for later cells. Thus, it becomes tedious to
+keep track of the cells that have to be run in order to run a certain cell. This extension simplifies handling the execution dependencies by introducing tag annotations to
+identify each cell and indicate a dependency on others. This improves on the current state which requires remembering all dependencies by heart or annotating the cells in the comments.
+
+If a cell with dependencies is run, the extension checks recursively for all dependencies of the cell, then executes them before executing the cell after all the dependencies have finished.
+Dependencies are definitely executed and not only once per kernel session.
+
+The two annotations are added to the tags of a cell and are as follows:
+
+ * add a hashmark (#) and an identification tag to the tags to identify a cell (e.g. #initializer-cell). The #identifiers must be unique among all cells.
+ * add an arrow (=>) and an identification tag to the tags to add a dependency on a certain cell (e.g. =>initializer-cell).
+
+Based on these dependencies, the kernel will now execute the dependencies before the cell that depends on them. If the cell's dependencies have further dependencies, these will in turn
+be executed before them. In conclusion, the kernel looks through the tree of dependencies of the cell executed by the user and executes its dependencies in their appropriate order, 
+then executes the cell.
+
+A more extensive example is described below:
+
+A cell A has the identifier #A.
+
+| Cell A [tags: #A]  |
+| ------------- | 
+| Content Cell  |
+| Content Cell  |
+
+
+A cell B has the identifier #B and depends on A (=>A).
+
+
+| Cell B [tags: #B, =>A]  |
+| ------------- | 
+| Content Cell  |
+| Content Cell  |
+
+If the user runs A, only A is executed, since it has no dependencies. On the other hand, if the user runs B, the kernel finds the dependency on A, and thus first runs A and then runs B.
+
+Running a cell C that is dependent on B and on A as well, the kernel then first runs A and then runs B before running C, avoiding to run cell A twice.
+
+
+If you are missing anything, open up an issue at the repository prepending [execute_dependencies] to the title.
diff --git a/.local/share/jupyter/nbextensions/execution_dependencies/execution_dependencies.js b/.local/share/jupyter/nbextensions/execution_dependencies/execution_dependencies.js
new file mode 100644
index 0000000000000000000000000000000000000000..d6bebe5628fb22b544f3f9227274b3fe82065ee5
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/execution_dependencies/execution_dependencies.js
@@ -0,0 +1,139 @@
+/**
+ * execution_dependencies.js
+ * Introduce tag annotations to identify each cell and indicate a dependency on others.
+ * Upon running a cell, its dependencies are run first to prepare all dependencies. 
+ * Then the cell triggered by the user is run as soon as all its dependencies are met.
+ *
+ *
+ * @version 0.1.0
+ * @author  Benjamin Ellenberger, https://github.com/benelot
+ * @updated 2018-01-31
+ *
+ *
+ */
+define([
+    'jquery',
+    'base/js/dialog',
+    'base/js/namespace',
+    'notebook/js/codecell'
+], function (
+    $,
+    dialog,
+    Jupyter,
+    codecell
+) {
+    "use strict";
+
+    var CodeCell = codecell.CodeCell;
+
+    return {
+        load_ipython_extension: function () {
+            console.log('[execution_dependencies] patching CodeCell.execute');
+            var orig_execute = codecell.CodeCell.prototype.execute;                                            // keep original cell execute function
+            CodeCell.prototype.execute = function (stop_on_error) {
+                var root_tags = this.metadata.tags || [];                                                      // get tags of the cell executed by the user (root cell)
+                if(root_tags.some(tag => /=>.*/.test(tag))) {                                                  // if the root cell contains any dependencies, resolve dependency tree
+                    var root_cell = this;
+                    var root_cell_id = root_cell.cell_id;
+                    var cells_with_id = Jupyter.notebook.get_cells().filter(function (cell, idx, cells) {      // ...get all cells which have at least one id (these are the only ones we could have in deps)
+                        var tags = cell.metadata.tags || [];                        
+                        return (cell === root_cell || tags.some(tag => /#.*/.test(tag)));
+                    });
+
+                    console.log('[execution_dependencies] collecting ids and dependencies...');
+                    var cell_map = {}  
+                    var dep_graph = {}
+                    cells_with_id.forEach(function (cell) {                                                    // ...get all identified cells (the ones that have at least one #tag)
+                        var tags = cell.metadata.tags || [];
+                        var cell_ids = tags.filter(tag => /#.*/.test(tag)).map(tag => tag.substring(1));       // ...get all identifiers of the current cell and drop the #
+                        if(cell === root_cell){                        
+                            if(cell_ids.length < 1) {
+                                cell_ids.push(root_cell.cell_id);                                              // ...use internal root cell id for internal usage
+                            }
+                            else {
+                                root_cell_id = cell_ids[0];                                                    // get any of the root cell ids
+                            }
+                        }
+
+                        var dep_ids = tags.filter(tag => /=>.*/.test(tag)).map(tag => tag.substring(2));       // ...get all dependencies and drop the =>
+                        
+                        cell_ids.forEach(function (id) {
+                          //console.log('ID:', id, 'deps: ', dep_ids.toString())
+                            cell_map[id] = cell;
+                            dep_graph[id] = dep_ids;
+
+                        });
+                    });
+
+                    if(dep_graph[root_cell_id].length > 0) {
+                        console.log('[execution_dependencies] collecting depdendency graph in-degrees...');
+                        var processing_queue = [root_cell_id];
+                        var processed_nodes = 0;
+                        var in_degree = {};                                                                    // ...collect in-degrees of nodes
+                        while(processing_queue.length > 0 && processed_nodes < Object.keys(dep_graph).length) {// ...stay processing deps while the queue contains nodes and the processed nodes are below total node quantity
+                            var id = processing_queue.shift();                                                 // .....pop front of queue and front-push it to the processing order
+                          //console.log("ID: ", id);
+                            for(var i=0, dep_qty=dep_graph[id].length; i < dep_qty; i++) {
+                                var dep = dep_graph[id][i];
+                          //    console.log('      dep: ', dep);
+                                in_degree[id] = in_degree[id] || 0;
+                                in_degree[dep] = in_degree[dep] === undefined ? 1 : ++in_degree[dep];
+                                processing_queue.unshift(dep);
+                            }
+                            processed_nodes++;
+                        }
+
+                        console.log('[execution_dependencies] starting topological sort...');
+                        processing_queue = [root_cell_id];                                                     // ...add root node with in-degree 0 to queue (this excludes all disconnected subgraphs)
+                        processed_nodes = 0;                                                                   // ...number of processed nodes (to detect circular dependencies)
+                        var processing_order = [];
+                        while(processing_queue.length > 0 && processed_nodes < Object.keys(dep_graph).length) {// ...stay processing deps while the queue contains nodes and the processed nodes are below total node quantity
+                            var id = processing_queue.shift();                                                 // .....pop front of queue and front-push it to the processing order
+                            processing_order.unshift(id);
+                          //console.log("ID: ", id);
+                            for(var i=0, dep_qty=dep_graph[id].length; i < dep_qty; i++) {                     // ......iterate over dependent nodes of current id and decrease their in-degree by 1
+                                var dep = dep_graph[id][i];
+                          //    console.log('      dep: ', dep);
+                                in_degree[dep]--;
+                                if(in_degree[dep] == 0) {                                                      // ......queue dependency if in-degree is 0
+                                    processing_queue.unshift(dep);
+                                }
+                            }
+                            processed_nodes++;
+                        }
+                        
+                        console.log('[execution_dependencies] checking for circular dependencies...');
+                        if(processed_nodes > Object.keys(dep_graph).length) {                                  // ...if more nodes where processed than the number of graph nodes, there is a circular dependency
+                            dialog.modal({ 
+                                 title : 'Circular dependencies in the execute dependencies of this cell', 
+                                 body : 'There is a circular dependency in this cell\'s execute dependencies. The cell will be run without dependencies. If this does not work, fix the dependencies and rerun the cell.', 
+                                 buttons: {'OK': {'class' : 'btn-primary'}}, 
+                                 notebook: Jupyter.notebook, 
+                                 keyboard_manager: Jupyter.keyboard_manager, 
+                             }); 
+                        }
+                        else if(!Jupyter.notebook.trusted) {                                                   // ...if the notebook is not trusted, we do not execute dependencies, but only print them out to the user
+                            dialog.modal({ 
+                                 title : 'Execute dependencies in untrusted notebook', 
+                                 body : 'This notebook is not trusted, so execute dependencies will not be automatically run. You can still run them manually, though. Run in order (the last one is the cell you wanted to execute): ' + processing_order, 
+                                 buttons: {'OK': {'class' : 'btn-primary'}}, 
+                                 notebook: Jupyter.notebook, 
+                                 keyboard_manager: Jupyter.keyboard_manager, 
+                            });
+                        }
+                        else{
+                            processing_order.pop()
+                            console.log('[execution_dependencies] executing dependency cells in order ', processing_order ,'...');
+                            var dependency_cells = processing_order.map(id =>cell_map[id]);                    // ...get dependent cells by their id
+                          //console.log("Execute cells..", dependency_cells)
+                            dependency_cells.forEach(cell => orig_execute.call(cell, stop_on_error));          // ...execute all dependent cells in sequence using the original execute method
+                        }
+                    }
+                }
+                console.log('[execution_dependencies] executing requested cell...');
+                orig_execute.call(this, stop_on_error);                                                    // execute original cell execute function
+            };
+            console.log('[execution_dependencies] loaded');
+        }
+    };
+});
diff --git a/.local/share/jupyter/nbextensions/execution_dependencies/execution_dependencies.yml b/.local/share/jupyter/nbextensions/execution_dependencies/execution_dependencies.yml
new file mode 100644
index 0000000000000000000000000000000000000000..02ebd940308a971176257f32d650f4fd88da4e60
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/execution_dependencies/execution_dependencies.yml
@@ -0,0 +1,9 @@
+Type: Jupyter Notebook Extension
+Compatibility: 4.x, 5.x
+Name: Execution Dependencies
+Main: execution_dependencies.js
+Link: README.md
+Description: |
+  Introduce tag annotations to identify each cell and indicate a dependency on others.
+  Upon running a cell, its dependencies are run first to prepare all dependencies. 
+  Then the cell triggered by the user is run as soon as all its dependencies are met.
diff --git a/.local/share/jupyter/nbextensions/exercise/exercise.yaml b/.local/share/jupyter/nbextensions/exercise/exercise.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..d84ba770da849dbf8bc514f0a55e65bf3cc3f901
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/exercise/exercise.yaml
@@ -0,0 +1,28 @@
+Type: Jupyter Notebook Extension
+Name: Exercise
+Description: |
+  Define a group of cells as an "exercise".
+  The first cell is the question,
+  while the rest of the group from the answer or solution.
+  The solution can be hidden/shown by clicking on a widget added to the
+  question cell.
+Link: readme.md
+Icon: icon.png
+Main: main.js
+Compatibility: 4.x, 5.x
+Parameters:
+
+- name: add_button
+  description: Add a toolbar button to create/remove an exercise
+  input_type: checkbox
+  default: true
+
+- name: use_hotkey
+  description: Add a keyboard shortcut to create/remove an exercise
+  input_type: checkbox
+  default: true
+
+- name: hotkey
+  description: Keyboard shortcut optionally used to create/remove an exercise
+  input_type: hotkey
+  default: 'Alt-D'
diff --git a/.local/share/jupyter/nbextensions/exercise/icon.png b/.local/share/jupyter/nbextensions/exercise/icon.png
new file mode 100644
index 0000000000000000000000000000000000000000..4acc18f48f55724ae32e78294c68b784a9e3ecd3
Binary files /dev/null and b/.local/share/jupyter/nbextensions/exercise/icon.png differ
diff --git a/.local/share/jupyter/nbextensions/exercise/main.css b/.local/share/jupyter/nbextensions/exercise/main.css
new file mode 100644
index 0000000000000000000000000000000000000000..43a6d8f5f7fbb6e680f7888f3bafd6f85c87b663
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/exercise/main.css
@@ -0,0 +1,13 @@
+.highlight-mask
+{
+    background: transparent url('../images/theme/transBlack75.png') repeat 0 0;
+    display: none;
+    position: absolute;
+}
+.highlight-drag
+{
+    background-color: transparent;
+    border: dashed #ff3333 3px;
+    position: absolute;
+    display: none;
+}
diff --git a/.local/share/jupyter/nbextensions/exercise2/icon.png b/.local/share/jupyter/nbextensions/exercise2/icon.png
new file mode 100644
index 0000000000000000000000000000000000000000..c06473a6c84fb51c49711580ab5e5fbb26999492
Binary files /dev/null and b/.local/share/jupyter/nbextensions/exercise2/icon.png differ
diff --git a/.local/share/jupyter/nbextensions/exercise2/image.gif b/.local/share/jupyter/nbextensions/exercise2/image.gif
new file mode 100644
index 0000000000000000000000000000000000000000..0fe22308b600e50d9f51ebe6a7164475ddb81c4e
Binary files /dev/null and b/.local/share/jupyter/nbextensions/exercise2/image.gif differ
diff --git a/.local/share/jupyter/nbextensions/exercise2/main.css b/.local/share/jupyter/nbextensions/exercise2/main.css
new file mode 100644
index 0000000000000000000000000000000000000000..f7ea2c299c7f9f18ea29ea2b5323261a6c450d8e
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/exercise2/main.css
@@ -0,0 +1,60 @@
+.exercise2 {
+    display: flex;
+    width: 100%;
+    flex-direction: row;
+    align-content: flex-end;
+}
+
+.onoffswitch {
+    display: inline;
+    position: relative; width: 167px;
+    margin-top:8px;
+    -webkit-user-select:none; -moz-user-select:none; -ms-user-select: none;
+}
+.onoffswitch-checkbox {
+    display: none;
+}
+.onoffswitch-label {
+    display: block; overflow: hidden; cursor: pointer;
+    border: 2px solid #999999; border-radius: 20px;
+    margin:0;
+}
+.onoffswitch-inner {
+    display: block; width: 200%; margin-left: -100%;
+    transition: margin 0.3s ease-in 0s;
+}
+.onoffswitch-inner:before, .onoffswitch-inner:after {
+    display: block; float: left; width: 50%; height: 30px; padding: 0; line-height: 30px;
+    font-size: 15px; color: white; font-family: Trebuchet, Arial, sans-serif; font-weight: bold;
+    box-sizing: border-box;
+}
+.onoffswitch-inner:before {
+    content: "Hide Solution";
+    padding-left: 10px;
+    background-color: #34A7C1; color: #FFFFFF;
+   }
+
+.onoffswitch-inner:after {
+    content: "Show Solution";
+    padding-right: 10px;
+    background-color: #73FA7E; color: #999999;
+    text-align: right;
+}
+.onoffswitch-switch {
+    display: block; width: 14px; margin: 6px;
+    padding-top: 0px;
+    background: #FFFFFF;
+    position: absolute; top: 0; bottom: 0;
+    text-align: center;
+    vertical-align: middle;
+    right: 133px;
+    border: 2px solid #999999; border-radius: 20px;
+    transition: all 0.25s ease-in 0s; 
+}
+.onoffswitch-checkbox:checked + .onoffswitch-label .onoffswitch-inner {
+    margin-left: 0;
+}
+.onoffswitch-checkbox:checked + .onoffswitch-label .onoffswitch-switch {
+    right: 0px; 
+}
+
diff --git a/.local/share/jupyter/nbextensions/exercise2/readme.md b/.local/share/jupyter/nbextensions/exercise2/readme.md
new file mode 100644
index 0000000000000000000000000000000000000000..0fd7a7dfcb757a5113ef6ea5d003e09ac70a5c6e
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/exercise2/readme.md
@@ -0,0 +1,52 @@
+Exercise2
+=========
+
+These are two extensions for Jupyter, for hiding/showing solutions cells.
+They use the same approach and codebase and differ only by the type of
+`cell widget` used the show/hide the solutions. The two extensions can be used
+simultaneously. They require the `rubberband` extension to be installed and
+enabled.
+
+The example below demonstrates some of the features of the exercise extensions.
+
+- First, an solution or "details" cell is created by (a) selecting two cells with the rubberband and (b) clicking on the menu-button [exercise extension]
+- Second, the two next cells are selected using a keyboard shortcut, and a solution is created using the shortcut Alt-D [exercise2 extension]
+- Third, the two solutions are expanded by clicking on the corresponding widgets
+- Fourth, the solutions are removed by selecting them and clicking on the buttons in the toolbar.
+
+![](image.gif)
+
+
+The extensions provide
+----------------------
+
+- a menubar button
+- a cell widget -- A plus/minus button in `exercise` and a sliding checkbox in `exercise2`.
+
+The menubar button is devoted to the creation or removing of the solution. The solution consists in several consecutive cells that can be selected by the usual notebook multicell selection methods (e.g. *Shift-down* (select next) or *Shift-up* (select previous) keyboard shortcuts, or using the rubberband extension.
+
+
+### Creating a solution
+
+Several cells being selected, pressing the menubar button adds a `cell widget` and hides the cells excepted the first one which serves as a heading cell. *Do not forget to keep the Shift key pressed down while clicking on the menu button
+(otherwise selected cells will be lost)*. It is also possible to use a keyboard shortcut for creating the solution from selected cells: Alt-S for exercise extension and Alt-D for exercise2.
+
+
+### Removing a solution
+
+If a solution heading (first) cell is selected, then clicking the menu bar button removes this solution and its solutions cells are shown. Using the keyboard shortcut has the same effect.
+
+
+### Showing/hiding solution
+
+At creation of the solution, the solution cells are hidden. Clicking the `cell widget` toggles the hidden/shown state of the solution.
+
+
+### Persistence
+
+The state of solutions, hidden or shown, is preserved and automatically restored at startup and on reload.
+
+
+### Internals
+
+exercise and exercise2 add respectively a solution and solution2 metadata to solution cells, with for value the current state hidden/shown of the solution. For exercise, a div with the plus/minus character is prepended to the solution heading cell. For exercise2, a flex-wrap style is added to the solution heading cell and a checkbox widget, with some css styling, is appended to the cell. A solution[.2]_first metadada is also added to enable an easy detection of the first cell in an "exercise" and then allow several consecutive exercises.
diff --git a/.local/share/jupyter/nbextensions/export_embedded/export_embedded.yaml b/.local/share/jupyter/nbextensions/export_embedded/export_embedded.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..d27c1c0d26d01958b581dcb5e863600c072970b4
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/export_embedded/export_embedded.yaml
@@ -0,0 +1,7 @@
+Type: Jupyter Notebook Extension
+Compatibility: 5.x
+Main: main.js
+Name: Export Embedded HTML
+Description: Export to HTML with images embedded
+Icon: icon.png
+Link: readme.md
diff --git a/.local/share/jupyter/nbextensions/export_embedded/icon.png b/.local/share/jupyter/nbextensions/export_embedded/icon.png
new file mode 100644
index 0000000000000000000000000000000000000000..ec44ba50e06efd9f253a25bc8aa866955c5fac76
Binary files /dev/null and b/.local/share/jupyter/nbextensions/export_embedded/icon.png differ
diff --git a/.local/share/jupyter/nbextensions/export_embedded/main.js b/.local/share/jupyter/nbextensions/export_embedded/main.js
new file mode 100644
index 0000000000000000000000000000000000000000..12211b36f94b1069ae049b11d24a54dad237adf6
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/export_embedded/main.js
@@ -0,0 +1,56 @@
+// toggle display of all code cells' inputs
+
+define([
+    'jquery',
+    'base/js/namespace',
+    'base/js/events'
+], function(
+    $,
+    Jupyter,
+    events
+) {
+    "use strict";
+
+    function initialize () {
+    }
+
+    var load_ipython_extension = function() {
+        
+        var v = Jupyter.version.split(".")
+        if(Number(v[0])*10+ Number(v[1]) < 51)
+        {
+          console.log('Notebook version 5.1.0 or higher required for this extension')
+          return
+        }
+        
+        /* Add an entry in the download menu */
+        var dwm = $("#download_menu")
+        var downloadEntry = $('<li id="download_html_embed"><a href="#">HTML Embedded (.html)</a></li>')
+        dwm.append(downloadEntry)
+        downloadEntry.click(function () {
+            Jupyter.menubar._nbconvert('html_embed', true);
+        });
+        
+        /* Add also a Button, currently disabled */
+        /*
+        Jupyter.toolbar.add_buttons_group([
+        Jupyter.keyboard_manager.actions.register ({
+            help   : 'Embedded HTML Export',
+            icon   : 'fa-save',
+            handler: function() {
+                Jupyter.menubar._nbconvert('html_embed', true);
+            }
+        }, 'export-embedded-html', 'export_embedded')
+        ]);
+        */
+        if (Jupyter.notebook !== undefined && Jupyter.notebook._fully_loaded) {
+            // notebook_loaded.Notebook event has already happened
+            initialize();
+        }
+        events.on('notebook_loaded.Notebook', initialize);
+    };
+
+    return {
+        load_ipython_extension : load_ipython_extension
+    };
+});
diff --git a/.local/share/jupyter/nbextensions/export_embedded/readme.md b/.local/share/jupyter/nbextensions/export_embedded/readme.md
new file mode 100644
index 0000000000000000000000000000000000000000..3922d9e9beaa8e42b153eb4c8b30f411b8ecb9cc
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/export_embedded/readme.md
@@ -0,0 +1,7 @@
+Export HTML With Embedded Images
+================================
+This extension allows exporting an embedded HTML by an additional download option in File -> Download -> HTML Embedded, (works like: jupyter nbconvert --to html_embed notebook.ipynb)
+
+**Note**: This extension can so far only successfully read relative images paths in the markdown cells (e.g. `![](graphics/pic.png)`)  when jupyter is started in the same folder (working directory) where the relative paths can be resolved!
+ 
+
diff --git a/.local/share/jupyter/nbextensions/freeze/readme.md b/.local/share/jupyter/nbextensions/freeze/readme.md
new file mode 100644
index 0000000000000000000000000000000000000000..f7d6bb5335d2e01439959712f58c5f3c95644a03
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/freeze/readme.md
@@ -0,0 +1,24 @@
+# Freeze
+
+This extension allows to make cells read-only or frozen. It provides three buttons:
+* unlock
+* read-only
+* frozen
+
+
+For **code-cells**:<br>
+_read-only_:  it can be executed, but its input cannot be changed.<br>
+_frozen_: It cannot be either altered or executed.
+
+For **markdown-cells**:<br>
+_read-only_: It's input can be viewed by double-clicking on it, but cannot be changed.<br>
+_frozen_:  Input cannot be viewed by double-clicking.
+
+To change the state of a selected cell, press the corresponding button.
+
+The individual cell's state is stored in its metadata and is applied to the cell if the extension is loaded.
+
+## Internals
+
+The _read-only_ state is stored in the `cell.metadata.editable` attribute. Cells are editable by default.
+The _frozen_ state is stored in the `cell.metadata.run_control.frozen`attribute.
diff --git a/.local/share/jupyter/nbextensions/help_panel/help_panel.css b/.local/share/jupyter/nbextensions/help_panel/help_panel.css
new file mode 100644
index 0000000000000000000000000000000000000000..dee834215fe68fb66b5b103f389e4a540737f1fe
--- /dev/null
+++ b/.local/share/jupyter/nbextensions/help_panel/help_panel.css
@@ -0,0 +1,56 @@
+#side_panel {
+	position: relative;
+	top: 0;
+	right: 0;
+	height: 100%;
+	font-size: 0.9em;
+	overflow: auto;
+	background-color: #FFFFFF;
+}
+
+@media print {
+	/* print-previews can't handle 100%-height element as main part of page */
+	#side_panel {
+		height: auto;
+	}
+	
+	/*
+		see
+		stackoverflow.com/questions/19948474
+		stackoverflow.com/questions/20243767
+	*/
+	.col-md-6 {
+		float: left;
+		width: 50%;
+	}
+
+	.quickhelp {
+		page-break-inside: avoid;
+	}
+}
+
+.side_panel_splitbar {
+	position: absolute;
+	left: 0;
+	top: 0;
+	cursor: col-resize;
+	height: 100%;
+	width: 8px;
+	background: url(./img/handle-v.png) 2px 50% no-repeat;
+	background-color: #F6F6F6;
+}
+
+.side_panel_inner {
+	overflow: auto;
+	height: inherit;
+	margin-left: 8px;
+}
+
+.side_panel_inner > div:not(.alert) {
+	padding: 0.5em;
+}
+
+.help_panel_hide .modal-backdrop,
+.help_panel_hide .modal {
+	display: none !important;
+}
diff --git a/.triton/dump/0359b089f02b5ddabaef8985c60f3daf/triton_.ttgir b/.triton/dump/0359b089f02b5ddabaef8985c60f3daf/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..2ad2dd6cbc2a348d892bcf7e66ddb7e50fe6f6e1
--- /dev/null
+++ b/.triton/dump/0359b089f02b5ddabaef8985c60f3daf/triton_.ttgir
@@ -0,0 +1,21 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [8], threadsPerWarp = [32], warpsPerCTA = [4], order = [0], CTAsPerCGA = [1], CTASplitNum = [1], CTAOrder = [0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: i32 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %cst = arith.constant dense<12865792> : tensor<1024xi32, #blocked>
+    %c1024_i32 = arith.constant 1024 : i32
+    %0 = tt.get_program_id x : i32
+    %1 = arith.muli %0, %c1024_i32 : i32
+    %2 = tt.make_range {end = 1024 : i32, start = 0 : i32} : tensor<1024xi32, #blocked>
+    %3 = tt.splat %1 : (i32) -> tensor<1024xi32, #blocked>
+    %4 = arith.addi %3, %2 : tensor<1024xi32, #blocked>
+    %5 = arith.cmpi slt, %4, %cst : tensor<1024xi32, #blocked>
+    %6 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<1024x!tt.ptr<f32, 1>, #blocked>
+    %7 = tt.addptr %6, %4 : tensor<1024x!tt.ptr<f32, 1>, #blocked>, tensor<1024xi32, #blocked>
+    %8 = tt.load %7, %5 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<1024xf32, #blocked>
+    %9 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<1024x!tt.ptr<bf16, 1>, #blocked>
+    %10 = tt.addptr %9, %4 : tensor<1024x!tt.ptr<bf16, 1>, #blocked>, tensor<1024xi32, #blocked>
+    %11 = arith.truncf %8 : tensor<1024xf32, #blocked> to tensor<1024xbf16, #blocked>
+    tt.store %10, %11, %5 {cache = 1 : i32, evict = 1 : i32} : tensor<1024xbf16, #blocked>
+    tt.return
+  }
+}
diff --git a/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.llir b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..d8883619888d13dc64e74ee1aeb1baf9d25cb715
--- /dev/null
+++ b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.llir
@@ -0,0 +1,300 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+define void @triton__0d1d2d3d4d5d6d7de8(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, ptr addrspace(1) %5, ptr addrspace(1) %6, i64 %7, i64 %8) local_unnamed_addr !dbg !5 {
+  %10 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !8
+  %11 = lshr i32 %10, 3, !dbg !8
+  %12 = and i32 %11, 15, !dbg !8
+  %13 = or i32 %12, 16, !dbg !8
+  %14 = or i32 %12, 32, !dbg !8
+  %15 = or i32 %12, 48, !dbg !8
+  %16 = and i32 %10, 7, !dbg !9
+  %17 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #2, !dbg !10
+  %18 = sext i32 %17 to i64, !dbg !11
+  %19 = shl nsw i64 %18, 6, !dbg !12
+  %20 = zext nneg i32 %12 to i64
+  %21 = zext nneg i32 %13 to i64
+  %22 = zext nneg i32 %14 to i64
+  %23 = zext nneg i32 %15 to i64
+  %24 = or i64 %19, %20, !dbg !13
+  %25 = or i64 %19, %21, !dbg !13
+  %26 = or i64 %19, %22, !dbg !13
+  %27 = or i64 %19, %23, !dbg !13
+  %28 = getelementptr i64, ptr addrspace(1) %1, i64 %24, !dbg !14
+  %29 = getelementptr i64, ptr addrspace(1) %1, i64 %25, !dbg !14
+  %30 = getelementptr i64, ptr addrspace(1) %1, i64 %26, !dbg !14
+  %31 = getelementptr i64, ptr addrspace(1) %1, i64 %27, !dbg !14
+  %32 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %28, i1 true) #2, !dbg !15
+  %33 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %29, i1 true) #2, !dbg !15
+  %34 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %30, i1 true) #2, !dbg !15
+  %35 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %31, i1 true) #2, !dbg !15
+  %36 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %2, i1 true) #2, !dbg !16
+  %37 = bitcast i32 %36 to float, !dbg !16
+  %38 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %3, i1 true) #2, !dbg !17
+  %39 = bitcast i32 %38 to float, !dbg !17
+  %40 = mul nsw i64 %24, 50257, !dbg !18
+  %41 = mul nsw i64 %25, 50257, !dbg !18
+  %42 = mul nsw i64 %26, 50257, !dbg !18
+  %43 = mul nsw i64 %27, 50257, !dbg !18
+  %44 = insertelement <4 x i64> poison, i64 %32, i64 0, !dbg !19
+  %45 = insertelement <4 x i64> %44, i64 %33, i64 1, !dbg !19
+  %46 = insertelement <4 x i64> %45, i64 %34, i64 2, !dbg !19
+  %47 = insertelement <4 x i64> %46, i64 %35, i64 3, !dbg !19
+  %48 = icmp eq <4 x i64> %47, <i64 -1, i64 -1, i64 -1, i64 -1>, !dbg !19
+  %49 = tail call float asm "div.full.f32 $0, $1, $2;", "=r,r,r"(float %37, float %39) #2, !dbg !20
+  %50 = insertelement <4 x float> poison, float %49, i64 0, !dbg !21
+  %51 = shufflevector <4 x float> %50, <4 x float> poison, <4 x i32> zeroinitializer, !dbg !21
+  %52 = select <4 x i1> %48, <4 x float> zeroinitializer, <4 x float> %51, !dbg !21
+  %53 = getelementptr float, ptr addrspace(1) %0, i64 %40
+  %54 = getelementptr float, ptr addrspace(1) %0, i64 %41
+  %55 = getelementptr float, ptr addrspace(1) %0, i64 %42
+  %56 = getelementptr float, ptr addrspace(1) %0, i64 %43
+  br label %57, !dbg !22
+
+57:                                               ; preds = %9, %57
+  %58 = phi i32 [ 0, %9 ], [ %81, %57 ]
+  %59 = phi <4 x float> [ zeroinitializer, %9 ], [ %80, %57 ]
+  %60 = or i32 %58, %16, !dbg !23
+  %61 = zext nneg i32 %60 to i64, !dbg !23
+  %62 = icmp ult i32 %60, 50257, !dbg !24
+  %63 = getelementptr float, ptr addrspace(1) %53, i64 %61, !dbg !25
+  %64 = getelementptr float, ptr addrspace(1) %54, i64 %61, !dbg !25
+  %65 = getelementptr float, ptr addrspace(1) %55, i64 %61, !dbg !25
+  %66 = getelementptr float, ptr addrspace(1) %56, i64 %61, !dbg !25
+  %67 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %63, i1 %62, i32 0, i1 %62) #2, !dbg !26
+  %68 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %64, i1 %62, i32 0, i1 %62) #2, !dbg !26
+  %69 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %65, i1 %62, i32 0, i1 %62) #2, !dbg !26
+  %70 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %66, i1 %62, i32 0, i1 %62) #2, !dbg !26
+  %71 = insertelement <4 x i32> poison, i32 %67, i64 0, !dbg !26
+  %72 = insertelement <4 x i32> %71, i32 %68, i64 1, !dbg !26
+  %73 = insertelement <4 x i32> %72, i32 %69, i64 2, !dbg !26
+  %74 = insertelement <4 x i32> %73, i32 %70, i64 3, !dbg !26
+  %75 = bitcast <4 x i32> %74 to <4 x float>, !dbg !26
+  %76 = fmul <4 x float> %52, %75, !dbg !27
+  %77 = insertelement <4 x i1> poison, i1 %62, i64 0, !dbg !28
+  %78 = shufflevector <4 x i1> %77, <4 x i1> poison, <4 x i32> zeroinitializer, !dbg !28
+  %79 = select <4 x i1> %78, <4 x float> %76, <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, !dbg !28
+  %80 = fadd <4 x float> %59, %79, !dbg !28
+  %81 = add nuw nsw i32 %58, 8, !dbg !22
+  %82 = icmp ult i32 %58, 50249, !dbg !22
+  br i1 %82, label %57, label %83, !dbg !22
+
+83:                                               ; preds = %57
+  %84 = extractelement <4 x float> %80, i64 0, !dbg !29
+  %85 = bitcast float %84 to i32, !dbg !29
+  %86 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %85, i32 4, i32 31), !dbg !29
+  %87 = bitcast i32 %86 to float, !dbg !29
+  %88 = fadd float %84, %87, !dbg !33
+  %89 = bitcast float %88 to i32, !dbg !29
+  %90 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %89, i32 2, i32 31), !dbg !29
+  %91 = bitcast i32 %90 to float, !dbg !29
+  %92 = fadd float %88, %91, !dbg !33
+  %93 = bitcast float %92 to i32, !dbg !29
+  %94 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %93, i32 1, i32 31), !dbg !29
+  %95 = bitcast i32 %94 to float, !dbg !29
+  %96 = fadd float %92, %95, !dbg !33
+  %97 = extractelement <4 x float> %80, i64 1, !dbg !29
+  %98 = bitcast float %97 to i32, !dbg !29
+  %99 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %98, i32 4, i32 31), !dbg !29
+  %100 = bitcast i32 %99 to float, !dbg !29
+  %101 = fadd float %97, %100, !dbg !33
+  %102 = bitcast float %101 to i32, !dbg !29
+  %103 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %102, i32 2, i32 31), !dbg !29
+  %104 = bitcast i32 %103 to float, !dbg !29
+  %105 = fadd float %101, %104, !dbg !33
+  %106 = bitcast float %105 to i32, !dbg !29
+  %107 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %106, i32 1, i32 31), !dbg !29
+  %108 = bitcast i32 %107 to float, !dbg !29
+  %109 = fadd float %105, %108, !dbg !33
+  %110 = extractelement <4 x float> %80, i64 2, !dbg !29
+  %111 = bitcast float %110 to i32, !dbg !29
+  %112 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %111, i32 4, i32 31), !dbg !29
+  %113 = bitcast i32 %112 to float, !dbg !29
+  %114 = fadd float %110, %113, !dbg !33
+  %115 = bitcast float %114 to i32, !dbg !29
+  %116 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %115, i32 2, i32 31), !dbg !29
+  %117 = bitcast i32 %116 to float, !dbg !29
+  %118 = fadd float %114, %117, !dbg !33
+  %119 = bitcast float %118 to i32, !dbg !29
+  %120 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %119, i32 1, i32 31), !dbg !29
+  %121 = bitcast i32 %120 to float, !dbg !29
+  %122 = fadd float %118, %121, !dbg !33
+  %123 = extractelement <4 x float> %80, i64 3, !dbg !29
+  %124 = bitcast float %123 to i32, !dbg !29
+  %125 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %124, i32 4, i32 31), !dbg !29
+  %126 = bitcast i32 %125 to float, !dbg !29
+  %127 = fadd float %123, %126, !dbg !33
+  %128 = bitcast float %127 to i32, !dbg !29
+  %129 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %128, i32 2, i32 31), !dbg !29
+  %130 = bitcast i32 %129 to float, !dbg !29
+  %131 = fadd float %127, %130, !dbg !33
+  %132 = bitcast float %131 to i32, !dbg !29
+  %133 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %132, i32 1, i32 31), !dbg !29
+  %134 = bitcast i32 %133 to float, !dbg !29
+  %135 = fadd float %131, %134, !dbg !33
+  %136 = extractelement <4 x float> %52, i64 0, !dbg !37
+  %137 = extractelement <4 x float> %52, i64 1, !dbg !37
+  %138 = extractelement <4 x float> %52, i64 2, !dbg !37
+  %139 = extractelement <4 x float> %52, i64 3, !dbg !37
+  br label %140, !dbg !38
+
+140:                                              ; preds = %83, %140
+  %141 = phi i32 [ 0, %83 ], [ %217, %140 ]
+  %142 = or i32 %141, %16, !dbg !39
+  %143 = zext nneg i32 %142 to i64, !dbg !39
+  %144 = icmp ult i32 %142, 50257, !dbg !40
+  %145 = add nsw i64 %40, %143, !dbg !41
+  %146 = add nsw i64 %41, %143, !dbg !41
+  %147 = add nsw i64 %42, %143, !dbg !41
+  %148 = add nsw i64 %43, %143, !dbg !41
+  %149 = getelementptr i16, ptr addrspace(1) %4, i64 %145, !dbg !42
+  %150 = getelementptr i16, ptr addrspace(1) %4, i64 %146, !dbg !42
+  %151 = getelementptr i16, ptr addrspace(1) %4, i64 %147, !dbg !42
+  %152 = getelementptr i16, ptr addrspace(1) %4, i64 %148, !dbg !42
+  %153 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %149, i1 %144, i16 0, i1 %144) #2, !dbg !43
+  %154 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %150, i1 %144, i16 0, i1 %144) #2, !dbg !43
+  %155 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %151, i1 %144, i16 0, i1 %144) #2, !dbg !43
+  %156 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %152, i1 %144, i16 0, i1 %144) #2, !dbg !43
+  %157 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %153) #2, !dbg !44
+  %158 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %154) #2, !dbg !44
+  %159 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %155) #2, !dbg !44
+  %160 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %156) #2, !dbg !44
+  %161 = getelementptr float, ptr addrspace(1) %0, i64 %145, !dbg !45
+  %162 = getelementptr float, ptr addrspace(1) %0, i64 %146, !dbg !45
+  %163 = getelementptr float, ptr addrspace(1) %0, i64 %147, !dbg !45
+  %164 = getelementptr float, ptr addrspace(1) %0, i64 %148, !dbg !45
+  %165 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %161, i1 %144, i32 0, i1 %144) #2, !dbg !46
+  %166 = bitcast i32 %165 to float, !dbg !46
+  %167 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %162, i1 %144, i32 0, i1 %144) #2, !dbg !46
+  %168 = bitcast i32 %167 to float, !dbg !46
+  %169 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %163, i1 %144, i32 0, i1 %144) #2, !dbg !46
+  %170 = bitcast i32 %169 to float, !dbg !46
+  %171 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %164, i1 %144, i32 0, i1 %144) #2, !dbg !46
+  %172 = bitcast i32 %171 to float, !dbg !46
+  %173 = getelementptr i16, ptr addrspace(1) %5, i64 %145, !dbg !47
+  %174 = getelementptr i16, ptr addrspace(1) %5, i64 %146, !dbg !47
+  %175 = getelementptr i16, ptr addrspace(1) %5, i64 %147, !dbg !47
+  %176 = getelementptr i16, ptr addrspace(1) %5, i64 %148, !dbg !47
+  %177 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %173, i1 %144, i16 0, i1 %144) #2, !dbg !48
+  %178 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %174, i1 %144, i16 0, i1 %144) #2, !dbg !48
+  %179 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %175, i1 %144, i16 0, i1 %144) #2, !dbg !48
+  %180 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %176, i1 %144, i16 0, i1 %144) #2, !dbg !48
+  %181 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %177) #2, !dbg !49
+  %182 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %178) #2, !dbg !49
+  %183 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %179) #2, !dbg !49
+  %184 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %180) #2, !dbg !49
+  %185 = fmul float %136, %166, !dbg !37
+  %186 = fmul float %137, %168, !dbg !37
+  %187 = fmul float %138, %170, !dbg !37
+  %188 = fmul float %139, %172, !dbg !37
+  %189 = fmul float %181, 0x3FF7154760000000, !dbg !50
+  %190 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %189) #2, !dbg !50
+  %191 = fmul float %182, 0x3FF7154760000000, !dbg !50
+  %192 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %191) #2, !dbg !50
+  %193 = fmul float %183, 0x3FF7154760000000, !dbg !50
+  %194 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %193) #2, !dbg !50
+  %195 = fmul float %184, 0x3FF7154760000000, !dbg !50
+  %196 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %195) #2, !dbg !50
+  %197 = fmul float %96, %190, !dbg !51
+  %198 = fmul float %109, %192, !dbg !51
+  %199 = fmul float %122, %194, !dbg !51
+  %200 = fmul float %135, %196, !dbg !51
+  %201 = fsub float %185, %197, !dbg !52
+  %202 = fsub float %186, %198, !dbg !52
+  %203 = fsub float %187, %199, !dbg !52
+  %204 = fsub float %188, %200, !dbg !52
+  %205 = fadd float %157, %201, !dbg !53
+  %206 = fadd float %158, %202, !dbg !53
+  %207 = fadd float %159, %203, !dbg !53
+  %208 = fadd float %160, %204, !dbg !53
+  %209 = getelementptr i16, ptr addrspace(1) %6, i64 %145, !dbg !54
+  %210 = getelementptr i16, ptr addrspace(1) %6, i64 %146, !dbg !54
+  %211 = getelementptr i16, ptr addrspace(1) %6, i64 %147, !dbg !54
+  %212 = getelementptr i16, ptr addrspace(1) %6, i64 %148, !dbg !54
+  %213 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %205) #2, !dbg !55
+  %214 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %206) #2, !dbg !55
+  %215 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %207) #2, !dbg !55
+  %216 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %208) #2, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %213, ptr addrspace(1) %209, i1 %144) #2, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %214, ptr addrspace(1) %210, i1 %144) #2, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %215, ptr addrspace(1) %211, i1 %144) #2, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %216, ptr addrspace(1) %212, i1 %144) #2, !dbg !55
+  %217 = add nuw nsw i32 %141, 8, !dbg !38
+  %218 = icmp ult i32 %141, 50249, !dbg !38
+  br i1 %218, label %140, label %219, !dbg !38
+
+219:                                              ; preds = %140
+  ret void, !dbg !56
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #1
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #2 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+!nvvm.annotations = !{!3, !4, !4, !3}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_C, file: !2, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!2 = !DIFile(filename: "ckzgl7thb4xdfkfnd2tidks6mt5f3hauwfyjflbtzyepo5oxkvhk.py", directory: "/tmp/torchinductor_root/kz")
+!3 = !{ptr @triton__0d1d2d3d4d5d6d7de8, !"kernel", i32 1}
+!4 = !{ptr @triton__0d1d2d3d4d5d6d7de8, !"maxntidx", i32 128}
+!5 = distinct !DISubprogram(name: "triton__0d1d2d3d4d5d6d7de8", linkageName: "triton__0d1d2d3d4d5d6d7de8", scope: !2, file: !2, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !1)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 22, column: 44, scope: !5)
+!9 = !DILocation(line: 24, column: 33, scope: !5)
+!10 = !DILocation(line: 21, column: 28, scope: !5)
+!11 = !DILocation(line: 21, column: 34, scope: !5)
+!12 = !DILocation(line: 21, column: 46, scope: !5)
+!13 = !DILocation(line: 22, column: 23, scope: !5)
+!14 = !DILocation(line: 26, column: 30, scope: !5)
+!15 = !DILocation(line: 26, column: 35, scope: !5)
+!16 = !DILocation(line: 27, column: 19, scope: !5)
+!17 = !DILocation(line: 29, column: 19, scope: !5)
+!18 = !DILocation(line: 36, column: 46, scope: !5)
+!19 = !DILocation(line: 38, column: 23, scope: !5)
+!20 = !DILocation(line: 39, column: 22, scope: !5)
+!21 = !DILocation(line: 41, column: 37, scope: !5)
+!22 = !DILocation(line: 32, column: 36, scope: !5)
+!23 = !DILocation(line: 33, column: 27, scope: !5)
+!24 = !DILocation(line: 34, column: 25, scope: !5)
+!25 = !DILocation(line: 36, column: 34, scope: !5)
+!26 = !DILocation(line: 36, column: 52, scope: !5)
+!27 = !DILocation(line: 42, column: 23, scope: !5)
+!28 = !DILocation(line: 45, column: 40, scope: !5)
+!29 = !DILocation(line: 243, column: 36, scope: !30, inlinedAt: !32)
+!30 = distinct !DILexicalBlockFile(scope: !5, file: !31, discriminator: 0)
+!31 = !DIFile(filename: "standard.py", directory: "/usr/local/lib/python3.10/dist-packages/triton/language")
+!32 = !DILocation(line: 46, column: 27, scope: !30)
+!33 = !DILocation(line: 233, column: 15, scope: !34, inlinedAt: !35)
+!34 = distinct !DILexicalBlockFile(scope: !30, file: !31, discriminator: 0)
+!35 = !DILocation(line: 243, column: 36, scope: !34, inlinedAt: !36)
+!36 = !DILocation(line: 46, column: 27, scope: !34)
+!37 = !DILocation(line: 63, column: 24, scope: !5)
+!38 = !DILocation(line: 51, column: 36, scope: !5)
+!39 = !DILocation(line: 52, column: 27, scope: !5)
+!40 = !DILocation(line: 53, column: 25, scope: !5)
+!41 = !DILocation(line: 55, column: 41, scope: !5)
+!42 = !DILocation(line: 55, column: 35, scope: !5)
+!43 = !DILocation(line: 55, column: 53, scope: !5)
+!44 = !DILocation(line: 55, column: 105, scope: !5)
+!45 = !DILocation(line: 56, column: 35, scope: !5)
+!46 = !DILocation(line: 56, column: 53, scope: !5)
+!47 = !DILocation(line: 57, column: 35, scope: !5)
+!48 = !DILocation(line: 57, column: 53, scope: !5)
+!49 = !DILocation(line: 57, column: 105, scope: !5)
+!50 = !DILocation(line: 65, column: 23, scope: !5)
+!51 = !DILocation(line: 66, column: 24, scope: !5)
+!52 = !DILocation(line: 67, column: 24, scope: !5)
+!53 = !DILocation(line: 69, column: 24, scope: !5)
+!54 = !DILocation(line: 70, column: 29, scope: !5)
+!55 = !DILocation(line: 70, column: 54, scope: !5)
+!56 = !DILocation(line: 51, column: 4, scope: !5)
diff --git a/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ptx b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..ce586f236747063c96d0a72ead51cd7f9eb64914
--- /dev/null
+++ b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ptx
@@ -0,0 +1,734 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2d3d4d5d6d7de8
+
+.visible .entry triton__0d1d2d3d4d5d6d7de8(
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_0,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_1,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_2,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_3,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_4,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_5,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_6,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_7,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_8
+)
+.maxntid 128, 1, 1
+{
+	.reg .pred 	%p<49>;
+	.reg .b16 	%rs<33>;
+	.reg .b32 	%r<72>;
+	.reg .f32 	%f<98>;
+	.reg .b64 	%rd<66>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd17, [triton__0d1d2d3d4d5d6d7de8_param_6];
+	ld.param.u64 	%rd16, [triton__0d1d2d3d4d5d6d7de8_param_5];
+	ld.param.u64 	%rd15, [triton__0d1d2d3d4d5d6d7de8_param_4];
+	ld.param.u64 	%rd28, [triton__0d1d2d3d4d5d6d7de8_param_0];
+	ld.param.u64 	%rd29, [triton__0d1d2d3d4d5d6d7de8_param_1];
+$L__tmp0:
+	.loc	1 22 44
+	mov.u32 	%r13, %tid.x;
+	ld.param.u64 	%rd26, [triton__0d1d2d3d4d5d6d7de8_param_2];
+	bfe.u32 	%r14, %r13, 3, 4;
+	ld.param.u64 	%rd27, [triton__0d1d2d3d4d5d6d7de8_param_3];
+	.loc	1 24 33
+	and.b32  	%r1, %r13, 7;
+	.loc	1 21 28
+	mov.u32 %r6, %ctaid.x;
+	.loc	1 21 34
+	cvt.s64.s32 	%rd1, %r6;
+	.loc	1 21 46
+	mul.wide.s32 	%rd30, %r6, 64;
+	cvt.u64.u32 	%rd2, %r14;
+	.loc	1 22 23
+	or.b64  	%rd31, %rd30, %rd2;
+	.loc	1 26 30
+	shl.b64 	%rd32, %rd31, 3;
+	add.s64 	%rd19, %rd29, %rd32;
+	add.s64 	%rd21, %rd19, 128;
+	add.s64 	%rd23, %rd19, 256;
+	add.s64 	%rd25, %rd19, 384;
+	mov.pred 	%p1, -1;
+	.loc	1 26 35
+	mov.u64 %rd18, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd18 }, [ %rd19 + 0 ];
+	mov.u64 %rd20, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd20 }, [ %rd21 + 0 ];
+	mov.u64 %rd22, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd22 }, [ %rd23 + 0 ];
+	mov.u64 %rd24, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd24 }, [ %rd25 + 0 ];
+	.loc	1 27 19
+	mov.u32 %r10, 0x0;
+	@%p1 ld.global.b32 { %r10 }, [ %rd26 + 0 ];
+	.loc	1 29 19
+	mov.u32 %r11, 0x0;
+	@%p1 ld.global.b32 { %r11 }, [ %rd27 + 0 ];
+	.loc	1 38 23
+	setp.eq.s64 	%p7, %rd18, -1;
+	setp.eq.s64 	%p8, %rd20, -1;
+	setp.eq.s64 	%p9, %rd22, -1;
+	setp.eq.s64 	%p10, %rd24, -1;
+	.loc	1 39 22
+	div.full.f32 %r9, %r10, %r11;
+	mov.b32 	%f25, %r9;
+	.loc	1 41 37
+	selp.f32 	%f4, 0f00000000, %f25, %p10;
+	selp.f32 	%f3, 0f00000000, %f25, %p9;
+	selp.f32 	%f2, 0f00000000, %f25, %p8;
+	selp.f32 	%f1, 0f00000000, %f25, %p7;
+	.loc	1 32 36
+	mul.wide.s32 	%rd33, %r6, 12865792;
+	mul.wide.u32 	%rd34, %r14, 201028;
+	add.s64 	%rd35, %rd33, %rd34;
+	cvt.u64.u32 	%rd36, %r13;
+	and.b64  	%rd3, %rd36, 7;
+	mul.wide.u32 	%rd37, %r1, 4;
+	add.s64 	%rd38, %rd35, %rd37;
+	add.s64 	%rd39, %rd38, %rd28;
+	add.s64 	%rd65, %rd39, 9649344;
+	mov.f32 	%f94, 0f00000000;
+	mov.b32 	%r70, -8;
+	mov.u64 	%rd63, %rd65;
+	mov.f32 	%f95, %f94;
+	mov.f32 	%f96, %f94;
+	mov.f32 	%f97, %f94;
+$L__BB0_1:
+	add.s32 	%r70, %r70, 8;
+	.loc	1 33 27
+	add.s32 	%r23, %r70, %r1;
+	.loc	1 34 25
+	setp.lt.u32 	%p11, %r23, 50257;
+	.loc	1 36 34
+	add.s64 	%rd40, %rd63, -9649344;
+	add.s64 	%rd41, %rd63, -6432896;
+	add.s64 	%rd42, %rd63, -3216448;
+	mov.b32 	%r54, 0;
+	.loc	1 36 52
+	mov.u32 %r15, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r15 }, [ %rd40 + 0 ];
+	@!%p11 mov.u32 %r15, %r54;
+	mov.u32 %r17, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r17 }, [ %rd41 + 0 ];
+	@!%p11 mov.u32 %r17, %r54;
+	mov.u32 %r19, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r19 }, [ %rd42 + 0 ];
+	@!%p11 mov.u32 %r19, %r54;
+	mov.u32 %r21, 0x0;
+	@%p11 ld.global.L1::evict_last.b32 { %r21 }, [ %rd63 + 0 ];
+	@!%p11 mov.u32 %r21, %r54;
+	mov.b32 	%f26, %r21;
+	mov.b32 	%f27, %r19;
+	mov.b32 	%f28, %r17;
+	mov.b32 	%f29, %r15;
+	.loc	1 42 23
+	mul.f32 	%f30, %f1, %f29;
+	mul.f32 	%f31, %f2, %f28;
+	mul.f32 	%f32, %f3, %f27;
+	mul.f32 	%f33, %f4, %f26;
+	.loc	1 45 40
+	selp.f32 	%f34, %f33, 0f80000000, %p11;
+	selp.f32 	%f35, %f32, 0f80000000, %p11;
+	selp.f32 	%f36, %f31, 0f80000000, %p11;
+	selp.f32 	%f37, %f30, 0f80000000, %p11;
+	add.f32 	%f94, %f94, %f37;
+	add.f32 	%f95, %f95, %f36;
+	add.f32 	%f96, %f96, %f35;
+	add.f32 	%f97, %f97, %f34;
+	.loc	1 32 36
+	add.s64 	%rd63, %rd63, 32;
+	setp.lt.u32 	%p19, %r70, 50249;
+	@%p19 bra 	$L__BB0_1;
+$L__tmp1:
+	.loc	2 243 36
+	mov.b32 	%r25, %f94;
+	shfl.sync.bfly.b32	%r26, %r25, 4, 31, -1;
+	mov.b32 	%f38, %r26;
+$L__tmp2:
+	.loc	2 233 15
+	add.f32 	%f39, %f94, %f38;
+$L__tmp3:
+	.loc	2 243 36
+	mov.b32 	%r27, %f39;
+	shfl.sync.bfly.b32	%r28, %r27, 2, 31, -1;
+	mov.b32 	%f40, %r28;
+$L__tmp4:
+	.loc	2 233 15
+	add.f32 	%f41, %f39, %f40;
+$L__tmp5:
+	.loc	2 243 36
+	mov.b32 	%r29, %f41;
+	shfl.sync.bfly.b32	%r30, %r29, 1, 31, -1;
+	mov.b32 	%f42, %r30;
+$L__tmp6:
+	.loc	2 233 15
+	add.f32 	%f13, %f41, %f42;
+$L__tmp7:
+	.loc	2 243 36
+	mov.b32 	%r31, %f95;
+	shfl.sync.bfly.b32	%r32, %r31, 4, 31, -1;
+	mov.b32 	%f43, %r32;
+$L__tmp8:
+	.loc	2 233 15
+	add.f32 	%f44, %f95, %f43;
+$L__tmp9:
+	.loc	2 243 36
+	mov.b32 	%r33, %f44;
+	shfl.sync.bfly.b32	%r34, %r33, 2, 31, -1;
+	mov.b32 	%f45, %r34;
+$L__tmp10:
+	.loc	2 233 15
+	add.f32 	%f46, %f44, %f45;
+$L__tmp11:
+	.loc	2 243 36
+	mov.b32 	%r35, %f46;
+	shfl.sync.bfly.b32	%r36, %r35, 1, 31, -1;
+	mov.b32 	%f47, %r36;
+$L__tmp12:
+	.loc	2 233 15
+	add.f32 	%f14, %f46, %f47;
+$L__tmp13:
+	.loc	2 243 36
+	mov.b32 	%r37, %f96;
+	shfl.sync.bfly.b32	%r38, %r37, 4, 31, -1;
+	mov.b32 	%f48, %r38;
+$L__tmp14:
+	.loc	2 233 15
+	add.f32 	%f49, %f96, %f48;
+$L__tmp15:
+	.loc	2 243 36
+	mov.b32 	%r39, %f49;
+	shfl.sync.bfly.b32	%r40, %r39, 2, 31, -1;
+	mov.b32 	%f50, %r40;
+$L__tmp16:
+	.loc	2 233 15
+	add.f32 	%f51, %f49, %f50;
+$L__tmp17:
+	.loc	2 243 36
+	mov.b32 	%r41, %f51;
+	shfl.sync.bfly.b32	%r42, %r41, 1, 31, -1;
+	mov.b32 	%f52, %r42;
+$L__tmp18:
+	.loc	2 233 15
+	add.f32 	%f15, %f51, %f52;
+$L__tmp19:
+	.loc	2 243 36
+	mov.b32 	%r43, %f97;
+	shfl.sync.bfly.b32	%r44, %r43, 4, 31, -1;
+	mov.b32 	%f53, %r44;
+$L__tmp20:
+	.loc	2 233 15
+	add.f32 	%f54, %f97, %f53;
+$L__tmp21:
+	.loc	2 243 36
+	mov.b32 	%r45, %f54;
+	shfl.sync.bfly.b32	%r46, %r45, 2, 31, -1;
+	mov.b32 	%f55, %r46;
+$L__tmp22:
+	.loc	2 233 15
+	add.f32 	%f56, %f54, %f55;
+$L__tmp23:
+	.loc	2 243 36
+	mov.b32 	%r47, %f56;
+	shfl.sync.bfly.b32	%r48, %r47, 1, 31, -1;
+	mov.b32 	%f57, %r48;
+$L__tmp24:
+	.loc	2 233 15
+	add.f32 	%f16, %f56, %f57;
+$L__tmp25:
+	.loc	1 51 36
+	shl.b64 	%rd44, %rd3, 1;
+	add.s64 	%rd7, %rd17, %rd44;
+	mul.lo.s64 	%rd45, %rd1, 6432896;
+	mul.lo.s64 	%rd46, %rd2, 100514;
+	add.s64 	%rd64, %rd45, %rd46;
+	add.s64 	%rd9, %rd16, %rd44;
+	add.s64 	%rd10, %rd15, %rd44;
+	mov.b32 	%r71, -8;
+	mov.u16 	%rs2, 0;
+$L__BB0_3:
+	add.s32 	%r71, %r71, 8;
+	.loc	1 52 27
+	add.s32 	%r69, %r71, %r1;
+	.loc	1 53 25
+	setp.lt.u32 	%p20, %r69, 50257;
+	.loc	1 55 35
+	add.s64 	%rd47, %rd10, %rd64;
+	add.s64 	%rd48, %rd47, 1608224;
+	add.s64 	%rd49, %rd47, 3216448;
+	.loc	1 55 53
+	add.s64 	%rd50, %rd47, 4824672;
+	mov.u16 %rs1, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs1 }, [ %rd47 + 0 ];
+	@!%p20 mov.u16 %rs1, %rs2;
+	mov.u16 %rs3, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs3 }, [ %rd48 + 0 ];
+	@!%p20 mov.u16 %rs3, %rs2;
+	mov.u16 %rs5, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs5 }, [ %rd49 + 0 ];
+	@!%p20 mov.u16 %rs5, %rs2;
+	mov.u16 %rs7, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs7 }, [ %rd50 + 0 ];
+	@!%p20 mov.u16 %rs7, %rs2;
+	.loc	1 55 105
+	cvt.f32.bf16 %r49, %rs1;
+	mov.b32 	%f66, %r49;
+	cvt.f32.bf16 %r50, %rs3;
+	mov.b32 	%f67, %r50;
+	cvt.f32.bf16 %r51, %rs5;
+	mov.b32 	%f68, %r51;
+	cvt.f32.bf16 %r52, %rs7;
+	mov.b32 	%f69, %r52;
+	.loc	1 56 35
+	add.s64 	%rd51, %rd65, -9649344;
+	add.s64 	%rd52, %rd65, -6432896;
+	add.s64 	%rd53, %rd65, -3216448;
+	.loc	1 56 53
+	mov.u32 %r53, 0x0;
+	@%p20 ld.global.L1::evict_first.b32 { %r53 }, [ %rd51 + 0 ];
+	@!%p20 mov.u32 %r53, %r54;
+	mov.b32 	%f70, %r53;
+	mov.u32 %r55, 0x0;
+	@%p20 ld.global.L1::evict_first.b32 { %r55 }, [ %rd52 + 0 ];
+	@!%p20 mov.u32 %r55, %r54;
+	mov.b32 	%f71, %r55;
+	mov.u32 %r57, 0x0;
+	@%p20 ld.global.L1::evict_first.b32 { %r57 }, [ %rd53 + 0 ];
+	@!%p20 mov.u32 %r57, %r54;
+	mov.b32 	%f72, %r57;
+	mov.u32 %r59, 0x0;
+	@%p20 ld.global.L1::evict_first.b32 { %r59 }, [ %rd65 + 0 ];
+	@!%p20 mov.u32 %r59, %r54;
+	mov.b32 	%f73, %r59;
+	.loc	1 57 35
+	add.s64 	%rd55, %rd9, %rd64;
+	add.s64 	%rd56, %rd55, 1608224;
+	add.s64 	%rd57, %rd55, 3216448;
+	.loc	1 57 53
+	add.s64 	%rd58, %rd55, 4824672;
+	mov.u16 %rs13, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs13 }, [ %rd55 + 0 ];
+	@!%p20 mov.u16 %rs13, %rs2;
+	mov.u16 %rs15, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs15 }, [ %rd56 + 0 ];
+	@!%p20 mov.u16 %rs15, %rs2;
+	mov.u16 %rs17, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs17 }, [ %rd57 + 0 ];
+	@!%p20 mov.u16 %rs17, %rs2;
+	mov.u16 %rs19, 0x0;
+	@%p20 ld.global.L1::evict_first.b16 { %rs19 }, [ %rd58 + 0 ];
+	@!%p20 mov.u16 %rs19, %rs2;
+	.loc	1 57 105
+	cvt.f32.bf16 %r61, %rs13;
+	mov.b32 	%f74, %r61;
+	cvt.f32.bf16 %r62, %rs15;
+	mov.b32 	%f75, %r62;
+	cvt.f32.bf16 %r63, %rs17;
+	mov.b32 	%f76, %r63;
+	cvt.f32.bf16 %r64, %rs19;
+	mov.b32 	%f77, %r64;
+	.loc	1 65 23
+	mul.f32 	%f59, %f74, 0f3FB8AA3B;
+	ex2.approx.f32 %f58, %f59;
+	mul.f32 	%f61, %f75, 0f3FB8AA3B;
+	ex2.approx.f32 %f60, %f61;
+	mul.f32 	%f63, %f76, 0f3FB8AA3B;
+	ex2.approx.f32 %f62, %f63;
+	mul.f32 	%f65, %f77, 0f3FB8AA3B;
+	ex2.approx.f32 %f64, %f65;
+	.loc	1 66 24
+	mul.f32 	%f78, %f13, %f58;
+	mul.f32 	%f79, %f14, %f60;
+	mul.f32 	%f80, %f15, %f62;
+	mul.f32 	%f81, %f16, %f64;
+	.loc	1 67 24
+	neg.f32 	%f82, %f78;
+	fma.rn.f32 	%f83, %f1, %f70, %f82;
+	neg.f32 	%f84, %f79;
+	fma.rn.f32 	%f85, %f2, %f71, %f84;
+	neg.f32 	%f86, %f80;
+	fma.rn.f32 	%f87, %f3, %f72, %f86;
+	neg.f32 	%f88, %f81;
+	fma.rn.f32 	%f89, %f4, %f73, %f88;
+	.loc	1 69 24
+	add.f32 	%f90, %f66, %f83;
+	add.f32 	%f91, %f67, %f85;
+	add.f32 	%f92, %f68, %f87;
+	add.f32 	%f93, %f69, %f89;
+	.loc	1 70 29
+	add.s64 	%rd59, %rd7, %rd64;
+	add.s64 	%rd60, %rd59, 1608224;
+	add.s64 	%rd61, %rd59, 3216448;
+	.loc	1 70 54
+	add.s64 	%rd62, %rd59, 4824672;
+	mov.b32 	%r65, %f90;
+	cvt.rn.bf16.f32 %rs25, %r65;
+	mov.b32 	%r66, %f91;
+	cvt.rn.bf16.f32 %rs26, %r66;
+	mov.b32 	%r67, %f92;
+	cvt.rn.bf16.f32 %rs27, %r67;
+	mov.b32 	%r68, %f93;
+	cvt.rn.bf16.f32 %rs28, %r68;
+	@%p20 st.global.b16 [ %rd59 + 0 ], { %rs25 };
+	@%p20 st.global.b16 [ %rd60 + 0 ], { %rs26 };
+	@%p20 st.global.b16 [ %rd61 + 0 ], { %rs27 };
+	@%p20 st.global.b16 [ %rd62 + 0 ], { %rs28 };
+	.loc	1 51 36
+	add.s64 	%rd65, %rd65, 32;
+	add.s64 	%rd64, %rd64, 16;
+	setp.lt.u32 	%p48, %r71, 50249;
+	@%p48 bra 	$L__BB0_3;
+	.loc	1 51 4
+	ret;
+$L__tmp26:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/kz/ckzgl7thb4xdfkfnd2tidks6mt5f3hauwfyjflbtzyepo5oxkvhk.py"
+	.file	2 "/usr/local/lib/python3.10/dist-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
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+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 278
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
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+.b8 114
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+.b8 46
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+.b8 0
+.b32 .debug_line
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+.b8 114
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+.b8 111
+.b8 116
+.b8 47
+.b8 107
+.b8 122
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
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+.b8 101
+.b8 56
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 1
+.b8 3
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b32 125
+.b8 4
+.b32 125
+.b64 $L__tmp1
+.b64 $L__tmp24
+.b8 2
+.b8 46
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+.b8 5
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp25
+.b8 2
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+.b8 27
+.b8 4
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp25
+.b8 2
+.b8 243
+.b8 36
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 282
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
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+.b8 95
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+.b8 54
+.b8 100
+.b8 55
+.b8 100
+.b8 101
+.b8 56
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 282
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ttgir b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..4e52c89b2109475b2e32264bd0c634693d13173d
--- /dev/null
+++ b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ttgir
@@ -0,0 +1,92 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [4, 8], warpsPerCTA = [4, 1], order = [1, 0], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2d3d4d5d6d7de8(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg7: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}, %arg8: i64) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<64x1xf32, #blocked>
+    %cst_0 = arith.constant dense<50257> : tensor<64x1xi64, #blocked>
+    %cst_1 = arith.constant dense<-1> : tensor<64x1xi64, #blocked>
+    %cst_2 = arith.constant dense<0.000000e+00> : tensor<64x8xf32, #blocked>
+    %c64_i64 = arith.constant 64 : i64
+    %cst_3 = arith.constant dense<50257> : tensor<1x8xi64, #blocked>
+    %c0_i32 = arith.constant 0 : i32
+    %c8_i32 = arith.constant 8 : i32
+    %c50257_i32 = arith.constant 50257 : i32
+    %cst_4 = arith.constant dense<0.000000e+00> : tensor<64x8xbf16, #blocked>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c64_i64 : i64
+    %3 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %4 = tt.expand_dims %3 {axis = 1 : i32} : (tensor<64xi32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<64x1xi32, #blocked>
+    %5 = arith.extsi %4 : tensor<64x1xi32, #blocked> to tensor<64x1xi64, #blocked>
+    %6 = tt.splat %2 : (i64) -> tensor<64x1xi64, #blocked>
+    %7 = arith.addi %6, %5 : tensor<64x1xi64, #blocked>
+    %8 = tt.make_range {end = 8 : i32, start = 0 : i32} : tensor<8xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>
+    %9 = tt.expand_dims %8 {axis = 0 : i32} : (tensor<8xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>) -> tensor<1x8xi32, #blocked>
+    %10 = arith.extsi %9 : tensor<1x8xi32, #blocked> to tensor<1x8xi64, #blocked>
+    %11 = tt.splat %arg1 : (!tt.ptr<i64, 1>) -> tensor<64x1x!tt.ptr<i64, 1>, #blocked>
+    %12 = tt.addptr %11, %7 : tensor<64x1x!tt.ptr<i64, 1>, #blocked>, tensor<64x1xi64, #blocked>
+    %13 = tt.load %12 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<64x1xi64, #blocked>
+    %14 = tt.addptr %arg2, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %15 = tt.load %14 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %16 = tt.addptr %arg3, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %17 = tt.load %16 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %18 = arith.muli %7, %cst_0 : tensor<64x1xi64, #blocked>
+    %19 = tt.broadcast %18 : (tensor<64x1xi64, #blocked>) -> tensor<64x8xi64, #blocked>
+    %20 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<64x8x!tt.ptr<f32, 1>, #blocked>
+    %21 = arith.cmpi ne, %13, %cst_1 : tensor<64x1xi64, #blocked>
+    %22 = arith.divf %15, %17 : f32
+    %23 = tt.splat %22 : (f32) -> tensor<64x1xf32, #blocked>
+    %24 = arith.select %21, %23, %cst : tensor<64x1xi1, #blocked>, tensor<64x1xf32, #blocked>
+    %25 = tt.broadcast %24 : (tensor<64x1xf32, #blocked>) -> tensor<64x8xf32, #blocked>
+    %26 = scf.for %arg9 = %c0_i32 to %c50257_i32 step %c8_i32 iter_args(%arg10 = %cst_2) -> (tensor<64x8xf32, #blocked>)  : i32 {
+      %33 = arith.extsi %arg9 : i32 to i64
+      %34 = tt.splat %33 : (i64) -> tensor<1x8xi64, #blocked>
+      %35 = arith.addi %34, %10 : tensor<1x8xi64, #blocked>
+      %36 = arith.cmpi slt, %35, %cst_3 : tensor<1x8xi64, #blocked>
+      %37 = tt.broadcast %35 : (tensor<1x8xi64, #blocked>) -> tensor<64x8xi64, #blocked>
+      %38 = arith.addi %37, %19 : tensor<64x8xi64, #blocked>
+      %39 = tt.addptr %20, %38 : tensor<64x8x!tt.ptr<f32, 1>, #blocked>, tensor<64x8xi64, #blocked>
+      %40 = tt.broadcast %36 : (tensor<1x8xi1, #blocked>) -> tensor<64x8xi1, #blocked>
+      %41 = tt.load %39, %40, %cst_2 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<64x8xf32, #blocked>
+      %42 = arith.mulf %41, %25 : tensor<64x8xf32, #blocked>
+      %43 = arith.addf %arg10, %42 : tensor<64x8xf32, #blocked>
+      %44 = arith.select %40, %43, %arg10 : tensor<64x8xi1, #blocked>, tensor<64x8xf32, #blocked>
+      scf.yield %44 : tensor<64x8xf32, #blocked>
+    }
+    %27 = "tt.reduce"(%26) <{axis = 1 : i32}> ({
+    ^bb0(%arg9: f32, %arg10: f32):
+      %33 = arith.addf %arg9, %arg10 : f32
+      tt.reduce.return %33 : f32
+    }) : (tensor<64x8xf32, #blocked>) -> tensor<64xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %28 = tt.expand_dims %27 {axis = 1 : i32} : (tensor<64xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<64x1xf32, #blocked>
+    %29 = tt.splat %arg4 : (!tt.ptr<bf16, 1>) -> tensor<64x8x!tt.ptr<bf16, 1>, #blocked>
+    %30 = tt.splat %arg5 : (!tt.ptr<bf16, 1>) -> tensor<64x8x!tt.ptr<bf16, 1>, #blocked>
+    %31 = tt.broadcast %28 : (tensor<64x1xf32, #blocked>) -> tensor<64x8xf32, #blocked>
+    %32 = tt.splat %arg6 : (!tt.ptr<bf16, 1>) -> tensor<64x8x!tt.ptr<bf16, 1>, #blocked>
+    scf.for %arg9 = %c0_i32 to %c50257_i32 step %c8_i32  : i32 {
+      %33 = arith.extsi %arg9 : i32 to i64
+      %34 = tt.splat %33 : (i64) -> tensor<1x8xi64, #blocked>
+      %35 = arith.addi %34, %10 : tensor<1x8xi64, #blocked>
+      %36 = arith.cmpi slt, %35, %cst_3 : tensor<1x8xi64, #blocked>
+      %37 = tt.broadcast %35 : (tensor<1x8xi64, #blocked>) -> tensor<64x8xi64, #blocked>
+      %38 = arith.addi %37, %19 : tensor<64x8xi64, #blocked>
+      %39 = tt.addptr %29, %38 : tensor<64x8x!tt.ptr<bf16, 1>, #blocked>, tensor<64x8xi64, #blocked>
+      %40 = tt.broadcast %36 : (tensor<1x8xi1, #blocked>) -> tensor<64x8xi1, #blocked>
+      %41 = tt.load %39, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x8xbf16, #blocked>
+      %42 = arith.extf %41 : tensor<64x8xbf16, #blocked> to tensor<64x8xf32, #blocked>
+      %43 = tt.addptr %20, %38 : tensor<64x8x!tt.ptr<f32, 1>, #blocked>, tensor<64x8xi64, #blocked>
+      %44 = tt.load %43, %40, %cst_2 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x8xf32, #blocked>
+      %45 = tt.addptr %30, %38 : tensor<64x8x!tt.ptr<bf16, 1>, #blocked>, tensor<64x8xi64, #blocked>
+      %46 = tt.load %45, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x8xbf16, #blocked>
+      %47 = arith.extf %46 : tensor<64x8xbf16, #blocked> to tensor<64x8xf32, #blocked>
+      %48 = arith.mulf %44, %25 : tensor<64x8xf32, #blocked>
+      %49 = math.exp %47 : tensor<64x8xf32, #blocked>
+      %50 = arith.mulf %49, %31 : tensor<64x8xf32, #blocked>
+      %51 = arith.subf %48, %50 : tensor<64x8xf32, #blocked>
+      %52 = arith.addf %42, %51 : tensor<64x8xf32, #blocked>
+      %53 = tt.addptr %32, %38 : tensor<64x8x!tt.ptr<bf16, 1>, #blocked>, tensor<64x8xi64, #blocked>
+      %54 = arith.truncf %52 : tensor<64x8xf32, #blocked> to tensor<64x8xbf16, #blocked>
+      tt.store %53, %54, %40 {cache = 1 : i32, evict = 1 : i32} : tensor<64x8xbf16, #blocked>
+    }
+    tt.return
+  }
+}
diff --git a/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ttir b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..db39021d3e9b5d7d2b3bacb5442e45c1b33dda84
--- /dev/null
+++ b/.triton/dump/0ef13ec90cf21db4d33a072ff09ec2d4/triton_.ttir
@@ -0,0 +1,99 @@
+module {
+  tt.func public @triton__0d1d2d3d4d5d6d7de8(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg7: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}, %arg8: i64) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<64x8xbf16>
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<64x1xf32>
+    %c50257_i32 = arith.constant 50257 : i32
+    %c8_i32 = arith.constant 8 : i32
+    %c0_i32 = arith.constant 0 : i32
+    %cst_1 = arith.constant dense<50257> : tensor<64x1xi64>
+    %cst_2 = arith.constant dense<50257> : tensor<1x8xi64>
+    %c64_i64 = arith.constant 64 : i64
+    %cst_3 = arith.constant dense<-1> : tensor<64x1xi64>
+    %cst_4 = arith.constant dense<0.000000e+00> : tensor<64x8xf32>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c64_i64 : i64
+    %3 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32>
+    %4 = tt.expand_dims %3 {axis = 1 : i32} : (tensor<64xi32>) -> tensor<64x1xi32>
+    %5 = arith.extsi %4 : tensor<64x1xi32> to tensor<64x1xi64>
+    %6 = tt.splat %2 : (i64) -> tensor<64x1xi64>
+    %7 = arith.addi %6, %5 : tensor<64x1xi64>
+    %8 = tt.make_range {end = 8 : i32, start = 0 : i32} : tensor<8xi32>
+    %9 = tt.expand_dims %8 {axis = 0 : i32} : (tensor<8xi32>) -> tensor<1x8xi32>
+    %10 = arith.extsi %9 : tensor<1x8xi32> to tensor<1x8xi64>
+    %11 = tt.splat %arg1 : (!tt.ptr<i64, 1>) -> tensor<64x1x!tt.ptr<i64, 1>>
+    %12 = tt.addptr %11, %7 : tensor<64x1x!tt.ptr<i64, 1>>, tensor<64x1xi64>
+    %13 = tt.load %12 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<64x1xi64>
+    %14 = tt.addptr %arg2, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %15 = tt.load %14 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %16 = tt.addptr %arg3, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %17 = tt.load %16 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %18 = arith.muli %7, %cst_1 : tensor<64x1xi64>
+    %19 = tt.broadcast %18 : (tensor<64x1xi64>) -> tensor<64x8xi64>
+    %20 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<64x8x!tt.ptr<f32, 1>>
+    %21 = arith.cmpi ne, %13, %cst_3 : tensor<64x1xi64>
+    %22 = arith.divf %15, %17 : f32
+    %23 = tt.splat %22 : (f32) -> tensor<64x1xf32>
+    %24 = arith.select %21, %23, %cst_0 : tensor<64x1xi1>, tensor<64x1xf32>
+    %25 = tt.broadcast %24 : (tensor<64x1xf32>) -> tensor<64x8xf32>
+    %26 = scf.for %arg9 = %c0_i32 to %c50257_i32 step %c8_i32 iter_args(%arg10 = %cst_4) -> (tensor<64x8xf32>)  : i32 {
+      %41 = arith.extsi %arg9 : i32 to i64
+      %42 = tt.splat %41 : (i64) -> tensor<1x8xi64>
+      %43 = arith.addi %42, %10 : tensor<1x8xi64>
+      %44 = arith.cmpi slt, %43, %cst_2 : tensor<1x8xi64>
+      %45 = tt.broadcast %43 : (tensor<1x8xi64>) -> tensor<64x8xi64>
+      %46 = arith.addi %45, %19 : tensor<64x8xi64>
+      %47 = tt.addptr %20, %46 : tensor<64x8x!tt.ptr<f32, 1>>, tensor<64x8xi64>
+      %48 = tt.broadcast %44 : (tensor<1x8xi1>) -> tensor<64x8xi1>
+      %49 = tt.load %47, %48, %cst_4 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<64x8xf32>
+      %50 = arith.mulf %49, %25 : tensor<64x8xf32>
+      %51 = arith.addf %arg10, %50 : tensor<64x8xf32>
+      %52 = arith.select %48, %51, %arg10 : tensor<64x8xi1>, tensor<64x8xf32>
+      scf.yield %52 : tensor<64x8xf32>
+    }
+    %27 = "tt.reduce"(%26) <{axis = 1 : i32}> ({
+    ^bb0(%arg9: f32, %arg10: f32):
+      %41 = arith.addf %arg9, %arg10 : f32
+      tt.reduce.return %41 : f32
+    }) : (tensor<64x8xf32>) -> tensor<64xf32>
+    %28 = tt.expand_dims %27 {axis = 1 : i32} : (tensor<64xf32>) -> tensor<64x1xf32>
+    %29 = arith.muli %7, %cst_1 : tensor<64x1xi64>
+    %30 = tt.broadcast %29 : (tensor<64x1xi64>) -> tensor<64x8xi64>
+    %31 = tt.splat %arg4 : (!tt.ptr<bf16, 1>) -> tensor<64x8x!tt.ptr<bf16, 1>>
+    %32 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<64x8x!tt.ptr<f32, 1>>
+    %33 = tt.splat %arg5 : (!tt.ptr<bf16, 1>) -> tensor<64x8x!tt.ptr<bf16, 1>>
+    %34 = arith.cmpi ne, %13, %cst_3 : tensor<64x1xi64>
+    %35 = arith.divf %15, %17 : f32
+    %36 = tt.splat %35 : (f32) -> tensor<64x1xf32>
+    %37 = arith.select %34, %36, %cst_0 : tensor<64x1xi1>, tensor<64x1xf32>
+    %38 = tt.broadcast %37 : (tensor<64x1xf32>) -> tensor<64x8xf32>
+    %39 = tt.broadcast %28 : (tensor<64x1xf32>) -> tensor<64x8xf32>
+    %40 = tt.splat %arg6 : (!tt.ptr<bf16, 1>) -> tensor<64x8x!tt.ptr<bf16, 1>>
+    scf.for %arg9 = %c0_i32 to %c50257_i32 step %c8_i32  : i32 {
+      %41 = arith.extsi %arg9 : i32 to i64
+      %42 = tt.splat %41 : (i64) -> tensor<1x8xi64>
+      %43 = arith.addi %42, %10 : tensor<1x8xi64>
+      %44 = arith.cmpi slt, %43, %cst_2 : tensor<1x8xi64>
+      %45 = tt.broadcast %43 : (tensor<1x8xi64>) -> tensor<64x8xi64>
+      %46 = arith.addi %45, %30 : tensor<64x8xi64>
+      %47 = tt.addptr %31, %46 : tensor<64x8x!tt.ptr<bf16, 1>>, tensor<64x8xi64>
+      %48 = tt.broadcast %44 : (tensor<1x8xi1>) -> tensor<64x8xi1>
+      %49 = tt.load %47, %48, %cst {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x8xbf16>
+      %50 = arith.extf %49 : tensor<64x8xbf16> to tensor<64x8xf32>
+      %51 = tt.addptr %32, %46 : tensor<64x8x!tt.ptr<f32, 1>>, tensor<64x8xi64>
+      %52 = tt.load %51, %48, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x8xf32>
+      %53 = tt.addptr %33, %46 : tensor<64x8x!tt.ptr<bf16, 1>>, tensor<64x8xi64>
+      %54 = tt.load %53, %48, %cst {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x8xbf16>
+      %55 = arith.extf %54 : tensor<64x8xbf16> to tensor<64x8xf32>
+      %56 = arith.mulf %52, %38 : tensor<64x8xf32>
+      %57 = math.exp %55 : tensor<64x8xf32>
+      %58 = arith.mulf %57, %39 : tensor<64x8xf32>
+      %59 = arith.subf %56, %58 : tensor<64x8xf32>
+      %60 = arith.addf %50, %59 : tensor<64x8xf32>
+      %61 = tt.addptr %40, %46 : tensor<64x8x!tt.ptr<bf16, 1>>, tensor<64x8xi64>
+      %62 = arith.truncf %60 : tensor<64x8xf32> to tensor<64x8xbf16>
+      tt.store %61, %62, %48 {cache = 1 : i32, evict = 1 : i32} : tensor<64x8xbf16>
+    }
+    tt.return
+  }
+}
diff --git a/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.cubin b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..adf4e4f106dc3db346151588c7dbabbe3f47201e
Binary files /dev/null and b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.cubin differ
diff --git a/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.llir b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..f0d1d72dd4ba3f37144e6816fe600bccaa765ff1
--- /dev/null
+++ b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.llir
@@ -0,0 +1,43 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+define void @triton__0d1de(ptr addrspace(1) %0, i64 %1) local_unnamed_addr !dbg !5 {
+  %3 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !8
+  %4 = shl i32 %3, 1, !dbg !8
+  %5 = and i32 %4, 510, !dbg !8
+  %6 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #1, !dbg !9
+  %7 = sext i32 %6 to i64, !dbg !10
+  %8 = shl nsw i64 %7, 9, !dbg !11
+  %9 = zext nneg i32 %5 to i64
+  %10 = or i64 %8, %9, !dbg !12
+  %11 = getelementptr float, ptr addrspace(1) %0, i64 %10, !dbg !13
+  tail call void asm sideeffect "@$3 st.global.v2.b32 [ $2 + 0 ], { $0, $1 };", "r,r,l,b"(i32 0, i32 0, ptr addrspace(1) %11, i1 true) #1, !dbg !14
+  ret void, !dbg !15
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+!nvvm.annotations = !{!3, !4, !4, !3}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_C, file: !2, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!2 = !DIFile(filename: "cpkw3bdoamlgzvqjeyuk34b3jcjf57htisara7lukflexo3t22ew.py", directory: "/tmp/torchinductor_root/pk")
+!3 = !{ptr @triton__0d1de, !"kernel", i32 1}
+!4 = !{ptr @triton__0d1de, !"maxntidx", i32 256}
+!5 = distinct !DISubprogram(name: "triton__0d1de", linkageName: "triton__0d1de", scope: !2, file: !2, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !1)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 21, column: 36, scope: !5)
+!9 = !DILocation(line: 20, column: 28, scope: !5)
+!10 = !DILocation(line: 20, column: 34, scope: !5)
+!11 = !DILocation(line: 20, column: 46, scope: !5)
+!12 = !DILocation(line: 21, column: 23, scope: !5)
+!13 = !DILocation(line: 25, column: 25, scope: !5)
+!14 = !DILocation(line: 25, column: 36, scope: !5)
+!15 = !DILocation(line: 25, column: 4, scope: !5)
diff --git a/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.ttgir b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..c65385f25bd5fc5e4411fd71ed170c11b64cb1bc
--- /dev/null
+++ b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.ttgir
@@ -0,0 +1,18 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [2], threadsPerWarp = [32], warpsPerCTA = [8], order = [0], CTAsPerCGA = [1], CTASplitNum = [1], CTAOrder = [0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1de(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<512xf32, #blocked>
+    %c512_i64 = arith.constant 512 : i64
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c512_i64 : i64
+    %3 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32, #blocked>
+    %4 = arith.extsi %3 : tensor<512xi32, #blocked> to tensor<512xi64, #blocked>
+    %5 = tt.splat %2 : (i64) -> tensor<512xi64, #blocked>
+    %6 = arith.addi %5, %4 : tensor<512xi64, #blocked>
+    %7 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<512x!tt.ptr<f32, 1>, #blocked>
+    %8 = tt.addptr %7, %6 : tensor<512x!tt.ptr<f32, 1>, #blocked>, tensor<512xi64, #blocked>
+    tt.store %8, %cst {cache = 1 : i32, evict = 1 : i32} : tensor<512xf32, #blocked>
+    tt.return
+  }
+}
diff --git a/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.ttir b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..849c13a14012ee376e801f10e8d667b38aebbf52
--- /dev/null
+++ b/.triton/dump/246118bec10f09cdce32d0be7c22b5ae/triton_.ttir
@@ -0,0 +1,17 @@
+module {
+  tt.func public @triton__0d1de(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %c512_i64 = arith.constant 512 : i64
+    %cst = arith.constant dense<0.000000e+00> : tensor<512xf32>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c512_i64 : i64
+    %3 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32>
+    %4 = arith.extsi %3 : tensor<512xi32> to tensor<512xi64>
+    %5 = tt.splat %2 : (i64) -> tensor<512xi64>
+    %6 = arith.addi %5, %4 : tensor<512xi64>
+    %7 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<512x!tt.ptr<f32, 1>>
+    %8 = tt.addptr %7, %6 : tensor<512x!tt.ptr<f32, 1>>, tensor<512xi64>
+    tt.store %8, %cst {cache = 1 : i32, evict = 1 : i32} : tensor<512xf32>
+    tt.return
+  }
+}
diff --git a/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.cubin b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..8f0a72636deaf9e089725fef918c339c2db7e840
Binary files /dev/null and b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.cubin differ
diff --git a/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.llir b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..51b7f7d12f3cf2215cfa8824ab55c3eec8ae4c85
--- /dev/null
+++ b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.llir
@@ -0,0 +1,793 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+@global_smem = external addrspace(3) global [0 x i8]
+
+define void @triton__0d1d2d3d4d5d6d7de8(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, ptr addrspace(1) %5, ptr addrspace(1) %6, i64 %7, i64 %8) local_unnamed_addr !dbg !5 {
+  %10 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !8
+  %11 = lshr i32 %10, 5, !dbg !8
+  %urem = and i32 %10, 255, !dbg !9
+  %12 = or i32 %urem, 256, !dbg !9
+  %13 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #3, !dbg !10
+  %14 = sext i32 %13 to i64, !dbg !11
+  %15 = shl nsw i64 %14, 3, !dbg !12
+  %16 = or i64 %15, 1, !dbg !13
+  %17 = or i64 %15, 2, !dbg !13
+  %18 = or i64 %15, 3, !dbg !13
+  %19 = or i64 %15, 4, !dbg !13
+  %20 = or i64 %15, 5, !dbg !13
+  %21 = or i64 %15, 6, !dbg !13
+  %22 = or i64 %15, 7, !dbg !13
+  %23 = insertelement <2 x i32> poison, i32 %urem, i64 0
+  %24 = insertelement <2 x i32> %23, i32 %12, i64 1
+  %25 = zext nneg <2 x i32> %24 to <2 x i64>
+  %26 = getelementptr i64, ptr addrspace(1) %1, i64 %15, !dbg !14
+  %27 = getelementptr i64, ptr addrspace(1) %1, i64 %16, !dbg !14
+  %28 = getelementptr i64, ptr addrspace(1) %1, i64 %17, !dbg !14
+  %29 = getelementptr i64, ptr addrspace(1) %1, i64 %18, !dbg !14
+  %30 = getelementptr i64, ptr addrspace(1) %1, i64 %19, !dbg !14
+  %31 = getelementptr i64, ptr addrspace(1) %1, i64 %20, !dbg !14
+  %32 = getelementptr i64, ptr addrspace(1) %1, i64 %21, !dbg !14
+  %33 = getelementptr i64, ptr addrspace(1) %1, i64 %22, !dbg !14
+  %34 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %26, i1 true) #3, !dbg !15
+  %35 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %27, i1 true) #3, !dbg !15
+  %36 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %28, i1 true) #3, !dbg !15
+  %37 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %29, i1 true) #3, !dbg !15
+  %38 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %30, i1 true) #3, !dbg !15
+  %39 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %31, i1 true) #3, !dbg !15
+  %40 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %32, i1 true) #3, !dbg !15
+  %41 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %33, i1 true) #3, !dbg !15
+  %42 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %2, i1 true) #3, !dbg !16
+  %43 = bitcast i32 %42 to float, !dbg !16
+  %44 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %3, i1 true) #3, !dbg !17
+  %45 = bitcast i32 %44 to float, !dbg !17
+  %46 = mul nsw i64 %14, 402056, !dbg !18
+  %47 = mul nsw i64 %16, 50257, !dbg !18
+  %48 = mul nsw i64 %17, 50257, !dbg !18
+  %49 = mul nsw i64 %18, 50257, !dbg !18
+  %50 = mul nsw i64 %19, 50257, !dbg !18
+  %51 = mul nsw i64 %20, 50257, !dbg !18
+  %52 = mul nsw i64 %21, 50257, !dbg !18
+  %53 = mul nsw i64 %22, 50257, !dbg !18
+  %54 = insertelement <8 x i64> poison, i64 %34, i64 0, !dbg !19
+  %55 = insertelement <8 x i64> %54, i64 %35, i64 1, !dbg !19
+  %56 = insertelement <8 x i64> %55, i64 %36, i64 2, !dbg !19
+  %57 = insertelement <8 x i64> %56, i64 %37, i64 3, !dbg !19
+  %58 = insertelement <8 x i64> %57, i64 %38, i64 4, !dbg !19
+  %59 = insertelement <8 x i64> %58, i64 %39, i64 5, !dbg !19
+  %60 = insertelement <8 x i64> %59, i64 %40, i64 6, !dbg !19
+  %61 = insertelement <8 x i64> %60, i64 %41, i64 7, !dbg !19
+  %62 = icmp eq <8 x i64> %61, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, !dbg !19
+  %63 = tail call float asm "div.full.f32 $0, $1, $2;", "=r,r,r"(float %43, float %45) #3, !dbg !20
+  %64 = insertelement <8 x float> poison, float %63, i64 0, !dbg !21
+  %65 = shufflevector <8 x float> %64, <8 x float> poison, <8 x i32> zeroinitializer, !dbg !21
+  %66 = select <8 x i1> %62, <8 x float> zeroinitializer, <8 x float> %65, !dbg !21
+  %67 = shufflevector <8 x float> %66, <8 x float> poison, <16 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7>, !dbg !21
+  br label %68, !dbg !22
+
+68:                                               ; preds = %9, %68
+  %69 = phi i32 [ 0, %9 ], [ %135, %68 ]
+  %70 = phi <16 x float> [ zeroinitializer, %9 ], [ %134, %68 ]
+  %71 = zext nneg i32 %69 to i64, !dbg !23
+  %72 = insertelement <2 x i64> poison, i64 %71, i64 0, !dbg !23
+  %73 = shufflevector <2 x i64> %72, <2 x i64> poison, <2 x i32> zeroinitializer, !dbg !23
+  %74 = or <2 x i64> %73, %25, !dbg !23
+  %75 = icmp ult <2 x i64> %74, <i64 50257, i64 50257>, !dbg !24
+  %76 = shufflevector <2 x i1> %75, <2 x i1> poison, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>, !dbg !24
+  %77 = extractelement <2 x i64> %74, i64 0, !dbg !25
+  %78 = getelementptr float, ptr addrspace(1) %0, i64 %77, !dbg !25
+  %79 = getelementptr float, ptr addrspace(1) %78, i64 %46, !dbg !25
+  %80 = extractelement <2 x i64> %74, i64 1, !dbg !25
+  %81 = getelementptr float, ptr addrspace(1) %0, i64 %80, !dbg !25
+  %82 = getelementptr float, ptr addrspace(1) %81, i64 %46, !dbg !25
+  %83 = getelementptr float, ptr addrspace(1) %78, i64 %47, !dbg !25
+  %84 = getelementptr float, ptr addrspace(1) %81, i64 %47, !dbg !25
+  %85 = getelementptr float, ptr addrspace(1) %78, i64 %48, !dbg !25
+  %86 = getelementptr float, ptr addrspace(1) %81, i64 %48, !dbg !25
+  %87 = getelementptr float, ptr addrspace(1) %78, i64 %49, !dbg !25
+  %88 = getelementptr float, ptr addrspace(1) %81, i64 %49, !dbg !25
+  %89 = getelementptr float, ptr addrspace(1) %78, i64 %50, !dbg !25
+  %90 = getelementptr float, ptr addrspace(1) %81, i64 %50, !dbg !25
+  %91 = getelementptr float, ptr addrspace(1) %78, i64 %51, !dbg !25
+  %92 = getelementptr float, ptr addrspace(1) %81, i64 %51, !dbg !25
+  %93 = getelementptr float, ptr addrspace(1) %78, i64 %52, !dbg !25
+  %94 = getelementptr float, ptr addrspace(1) %81, i64 %52, !dbg !25
+  %95 = getelementptr float, ptr addrspace(1) %78, i64 %53, !dbg !25
+  %96 = getelementptr float, ptr addrspace(1) %81, i64 %53, !dbg !25
+  %97 = extractelement <2 x i1> %75, i64 0, !dbg !26
+  %98 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %79, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %99 = extractelement <2 x i1> %75, i64 1, !dbg !26
+  %100 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %82, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %101 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %83, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %102 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %84, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %103 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %85, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %104 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %86, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %105 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %87, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %106 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %88, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %107 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %89, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %108 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %90, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %109 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %91, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %110 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %92, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %111 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %93, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %112 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %94, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %113 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %95, i1 %97, i32 0, i1 %97) #3, !dbg !26
+  %114 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %96, i1 %99, i32 0, i1 %99) #3, !dbg !26
+  %115 = insertelement <16 x i32> poison, i32 %98, i64 0, !dbg !26
+  %116 = insertelement <16 x i32> %115, i32 %100, i64 1, !dbg !26
+  %117 = insertelement <16 x i32> %116, i32 %101, i64 2, !dbg !26
+  %118 = insertelement <16 x i32> %117, i32 %102, i64 3, !dbg !26
+  %119 = insertelement <16 x i32> %118, i32 %103, i64 4, !dbg !26
+  %120 = insertelement <16 x i32> %119, i32 %104, i64 5, !dbg !26
+  %121 = insertelement <16 x i32> %120, i32 %105, i64 6, !dbg !26
+  %122 = insertelement <16 x i32> %121, i32 %106, i64 7, !dbg !26
+  %123 = insertelement <16 x i32> %122, i32 %107, i64 8, !dbg !26
+  %124 = insertelement <16 x i32> %123, i32 %108, i64 9, !dbg !26
+  %125 = insertelement <16 x i32> %124, i32 %109, i64 10, !dbg !26
+  %126 = insertelement <16 x i32> %125, i32 %110, i64 11, !dbg !26
+  %127 = insertelement <16 x i32> %126, i32 %111, i64 12, !dbg !26
+  %128 = insertelement <16 x i32> %127, i32 %112, i64 13, !dbg !26
+  %129 = insertelement <16 x i32> %128, i32 %113, i64 14, !dbg !26
+  %130 = insertelement <16 x i32> %129, i32 %114, i64 15, !dbg !26
+  %131 = bitcast <16 x i32> %130 to <16 x float>, !dbg !26
+  %132 = fmul <16 x float> %67, %131, !dbg !27
+  %133 = select <16 x i1> %76, <16 x float> %132, <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, !dbg !28
+  %134 = fadd <16 x float> %70, %133, !dbg !28
+  %135 = add nuw nsw i32 %69, 512, !dbg !22
+  %136 = icmp ult i32 %69, 49745, !dbg !22
+  br i1 %136, label %68, label %137, !dbg !22
+
+137:                                              ; preds = %68
+  %138 = and i32 %10, 31, !dbg !8
+  %139 = and i32 %11, 7, !dbg !9
+  %shift = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %140 = fadd <16 x float> %134, %shift, !dbg !29
+  %141 = extractelement <16 x float> %140, i64 0, !dbg !29
+  %shift54 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %142 = fadd <16 x float> %134, %shift54, !dbg !29
+  %143 = extractelement <16 x float> %142, i64 2, !dbg !29
+  %shift55 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 5, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %144 = fadd <16 x float> %134, %shift55, !dbg !29
+  %145 = extractelement <16 x float> %144, i64 4, !dbg !29
+  %shift56 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %146 = fadd <16 x float> %134, %shift56, !dbg !29
+  %147 = extractelement <16 x float> %146, i64 6, !dbg !29
+  %shift57 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 9, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %148 = fadd <16 x float> %134, %shift57, !dbg !29
+  %149 = extractelement <16 x float> %148, i64 8, !dbg !29
+  %shift58 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 11, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %150 = fadd <16 x float> %134, %shift58, !dbg !29
+  %151 = extractelement <16 x float> %150, i64 10, !dbg !29
+  %shift59 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 13, i32 poison, i32 poison, i32 poison>, !dbg !29
+  %152 = fadd <16 x float> %134, %shift59, !dbg !29
+  %153 = extractelement <16 x float> %152, i64 12, !dbg !29
+  %shift60 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> <i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 15, i32 poison>, !dbg !29
+  %154 = fadd <16 x float> %134, %shift60, !dbg !29
+  %155 = extractelement <16 x float> %154, i64 14, !dbg !29
+  %156 = bitcast float %141 to i32, !dbg !35
+  %157 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %156, i32 16, i32 31), !dbg !35
+  %158 = bitcast i32 %157 to float, !dbg !35
+  %159 = fadd float %141, %158, !dbg !29
+  %160 = bitcast float %159 to i32, !dbg !35
+  %161 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %160, i32 8, i32 31), !dbg !35
+  %162 = bitcast i32 %161 to float, !dbg !35
+  %163 = fadd float %159, %162, !dbg !29
+  %164 = bitcast float %163 to i32, !dbg !35
+  %165 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %164, i32 4, i32 31), !dbg !35
+  %166 = bitcast i32 %165 to float, !dbg !35
+  %167 = fadd float %163, %166, !dbg !29
+  %168 = bitcast float %167 to i32, !dbg !35
+  %169 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %168, i32 2, i32 31), !dbg !35
+  %170 = bitcast i32 %169 to float, !dbg !35
+  %171 = fadd float %167, %170, !dbg !29
+  %172 = bitcast float %171 to i32, !dbg !35
+  %173 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %172, i32 1, i32 31), !dbg !35
+  %174 = bitcast i32 %173 to float, !dbg !35
+  %175 = fadd float %171, %174, !dbg !29
+  %176 = bitcast float %143 to i32, !dbg !35
+  %177 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %176, i32 16, i32 31), !dbg !35
+  %178 = bitcast i32 %177 to float, !dbg !35
+  %179 = fadd float %143, %178, !dbg !29
+  %180 = bitcast float %179 to i32, !dbg !35
+  %181 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %180, i32 8, i32 31), !dbg !35
+  %182 = bitcast i32 %181 to float, !dbg !35
+  %183 = fadd float %179, %182, !dbg !29
+  %184 = bitcast float %183 to i32, !dbg !35
+  %185 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %184, i32 4, i32 31), !dbg !35
+  %186 = bitcast i32 %185 to float, !dbg !35
+  %187 = fadd float %183, %186, !dbg !29
+  %188 = bitcast float %187 to i32, !dbg !35
+  %189 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %188, i32 2, i32 31), !dbg !35
+  %190 = bitcast i32 %189 to float, !dbg !35
+  %191 = fadd float %187, %190, !dbg !29
+  %192 = bitcast float %191 to i32, !dbg !35
+  %193 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %192, i32 1, i32 31), !dbg !35
+  %194 = bitcast i32 %193 to float, !dbg !35
+  %195 = fadd float %191, %194, !dbg !29
+  %196 = bitcast float %145 to i32, !dbg !35
+  %197 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %196, i32 16, i32 31), !dbg !35
+  %198 = bitcast i32 %197 to float, !dbg !35
+  %199 = fadd float %145, %198, !dbg !29
+  %200 = bitcast float %199 to i32, !dbg !35
+  %201 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %200, i32 8, i32 31), !dbg !35
+  %202 = bitcast i32 %201 to float, !dbg !35
+  %203 = fadd float %199, %202, !dbg !29
+  %204 = bitcast float %203 to i32, !dbg !35
+  %205 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %204, i32 4, i32 31), !dbg !35
+  %206 = bitcast i32 %205 to float, !dbg !35
+  %207 = fadd float %203, %206, !dbg !29
+  %208 = bitcast float %207 to i32, !dbg !35
+  %209 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %208, i32 2, i32 31), !dbg !35
+  %210 = bitcast i32 %209 to float, !dbg !35
+  %211 = fadd float %207, %210, !dbg !29
+  %212 = bitcast float %211 to i32, !dbg !35
+  %213 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %212, i32 1, i32 31), !dbg !35
+  %214 = bitcast i32 %213 to float, !dbg !35
+  %215 = fadd float %211, %214, !dbg !29
+  %216 = bitcast float %147 to i32, !dbg !35
+  %217 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %216, i32 16, i32 31), !dbg !35
+  %218 = bitcast i32 %217 to float, !dbg !35
+  %219 = fadd float %147, %218, !dbg !29
+  %220 = bitcast float %219 to i32, !dbg !35
+  %221 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %220, i32 8, i32 31), !dbg !35
+  %222 = bitcast i32 %221 to float, !dbg !35
+  %223 = fadd float %219, %222, !dbg !29
+  %224 = bitcast float %223 to i32, !dbg !35
+  %225 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %224, i32 4, i32 31), !dbg !35
+  %226 = bitcast i32 %225 to float, !dbg !35
+  %227 = fadd float %223, %226, !dbg !29
+  %228 = bitcast float %227 to i32, !dbg !35
+  %229 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %228, i32 2, i32 31), !dbg !35
+  %230 = bitcast i32 %229 to float, !dbg !35
+  %231 = fadd float %227, %230, !dbg !29
+  %232 = bitcast float %231 to i32, !dbg !35
+  %233 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %232, i32 1, i32 31), !dbg !35
+  %234 = bitcast i32 %233 to float, !dbg !35
+  %235 = fadd float %231, %234, !dbg !29
+  %236 = bitcast float %149 to i32, !dbg !35
+  %237 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %236, i32 16, i32 31), !dbg !35
+  %238 = bitcast i32 %237 to float, !dbg !35
+  %239 = fadd float %149, %238, !dbg !29
+  %240 = bitcast float %239 to i32, !dbg !35
+  %241 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %240, i32 8, i32 31), !dbg !35
+  %242 = bitcast i32 %241 to float, !dbg !35
+  %243 = fadd float %239, %242, !dbg !29
+  %244 = bitcast float %243 to i32, !dbg !35
+  %245 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %244, i32 4, i32 31), !dbg !35
+  %246 = bitcast i32 %245 to float, !dbg !35
+  %247 = fadd float %243, %246, !dbg !29
+  %248 = bitcast float %247 to i32, !dbg !35
+  %249 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %248, i32 2, i32 31), !dbg !35
+  %250 = bitcast i32 %249 to float, !dbg !35
+  %251 = fadd float %247, %250, !dbg !29
+  %252 = bitcast float %251 to i32, !dbg !35
+  %253 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %252, i32 1, i32 31), !dbg !35
+  %254 = bitcast i32 %253 to float, !dbg !35
+  %255 = fadd float %251, %254, !dbg !29
+  %256 = bitcast float %151 to i32, !dbg !35
+  %257 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %256, i32 16, i32 31), !dbg !35
+  %258 = bitcast i32 %257 to float, !dbg !35
+  %259 = fadd float %151, %258, !dbg !29
+  %260 = bitcast float %259 to i32, !dbg !35
+  %261 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %260, i32 8, i32 31), !dbg !35
+  %262 = bitcast i32 %261 to float, !dbg !35
+  %263 = fadd float %259, %262, !dbg !29
+  %264 = bitcast float %263 to i32, !dbg !35
+  %265 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %264, i32 4, i32 31), !dbg !35
+  %266 = bitcast i32 %265 to float, !dbg !35
+  %267 = fadd float %263, %266, !dbg !29
+  %268 = bitcast float %267 to i32, !dbg !35
+  %269 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %268, i32 2, i32 31), !dbg !35
+  %270 = bitcast i32 %269 to float, !dbg !35
+  %271 = fadd float %267, %270, !dbg !29
+  %272 = bitcast float %271 to i32, !dbg !35
+  %273 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %272, i32 1, i32 31), !dbg !35
+  %274 = bitcast i32 %273 to float, !dbg !35
+  %275 = fadd float %271, %274, !dbg !29
+  %276 = bitcast float %153 to i32, !dbg !35
+  %277 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %276, i32 16, i32 31), !dbg !35
+  %278 = bitcast i32 %277 to float, !dbg !35
+  %279 = fadd float %153, %278, !dbg !29
+  %280 = bitcast float %279 to i32, !dbg !35
+  %281 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %280, i32 8, i32 31), !dbg !35
+  %282 = bitcast i32 %281 to float, !dbg !35
+  %283 = fadd float %279, %282, !dbg !29
+  %284 = bitcast float %283 to i32, !dbg !35
+  %285 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %284, i32 4, i32 31), !dbg !35
+  %286 = bitcast i32 %285 to float, !dbg !35
+  %287 = fadd float %283, %286, !dbg !29
+  %288 = bitcast float %287 to i32, !dbg !35
+  %289 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %288, i32 2, i32 31), !dbg !35
+  %290 = bitcast i32 %289 to float, !dbg !35
+  %291 = fadd float %287, %290, !dbg !29
+  %292 = bitcast float %291 to i32, !dbg !35
+  %293 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %292, i32 1, i32 31), !dbg !35
+  %294 = bitcast i32 %293 to float, !dbg !35
+  %295 = fadd float %291, %294, !dbg !29
+  %296 = bitcast float %155 to i32, !dbg !35
+  %297 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %296, i32 16, i32 31), !dbg !35
+  %298 = bitcast i32 %297 to float, !dbg !35
+  %299 = fadd float %155, %298, !dbg !29
+  %300 = bitcast float %299 to i32, !dbg !35
+  %301 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %300, i32 8, i32 31), !dbg !35
+  %302 = bitcast i32 %301 to float, !dbg !35
+  %303 = fadd float %299, %302, !dbg !29
+  %304 = bitcast float %303 to i32, !dbg !35
+  %305 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %304, i32 4, i32 31), !dbg !35
+  %306 = bitcast i32 %305 to float, !dbg !35
+  %307 = fadd float %303, %306, !dbg !29
+  %308 = bitcast float %307 to i32, !dbg !35
+  %309 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %308, i32 2, i32 31), !dbg !35
+  %310 = bitcast i32 %309 to float, !dbg !35
+  %311 = fadd float %307, %310, !dbg !29
+  %312 = bitcast float %311 to i32, !dbg !35
+  %313 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %312, i32 1, i32 31), !dbg !35
+  %314 = bitcast i32 %313 to float, !dbg !35
+  %315 = fadd float %311, %314, !dbg !29
+  %316 = icmp eq i32 %138, 0, !dbg !35
+  %317 = zext nneg i32 %139 to i64, !dbg !35
+  %318 = getelementptr float, ptr addrspace(3) @global_smem, i64 %317, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %318, float %175, i1 %316) #3, !dbg !35
+  %319 = or i32 %139, 8, !dbg !35
+  %320 = zext nneg i32 %319 to i64, !dbg !35
+  %321 = getelementptr float, ptr addrspace(3) @global_smem, i64 %320, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %321, float %195, i1 %316) #3, !dbg !35
+  %322 = or i32 %139, 16, !dbg !35
+  %323 = zext nneg i32 %322 to i64, !dbg !35
+  %324 = getelementptr float, ptr addrspace(3) @global_smem, i64 %323, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %324, float %215, i1 %316) #3, !dbg !35
+  %325 = or i32 %139, 24, !dbg !35
+  %326 = zext nneg i32 %325 to i64, !dbg !35
+  %327 = getelementptr float, ptr addrspace(3) @global_smem, i64 %326, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %327, float %235, i1 %316) #3, !dbg !35
+  %328 = or i32 %139, 32, !dbg !35
+  %329 = zext nneg i32 %328 to i64, !dbg !35
+  %330 = getelementptr float, ptr addrspace(3) @global_smem, i64 %329, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %330, float %255, i1 %316) #3, !dbg !35
+  %331 = or i32 %139, 40, !dbg !35
+  %332 = zext nneg i32 %331 to i64, !dbg !35
+  %333 = getelementptr float, ptr addrspace(3) @global_smem, i64 %332, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %333, float %275, i1 %316) #3, !dbg !35
+  %334 = or i32 %139, 48, !dbg !35
+  %335 = zext nneg i32 %334 to i64, !dbg !35
+  %336 = getelementptr float, ptr addrspace(3) @global_smem, i64 %335, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %336, float %295, i1 %316) #3, !dbg !35
+  %337 = or i32 %139, 56, !dbg !35
+  %338 = zext nneg i32 %337 to i64, !dbg !35
+  %339 = getelementptr float, ptr addrspace(3) @global_smem, i64 %338, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %339, float %315, i1 %316) #3, !dbg !35
+  tail call void @llvm.nvvm.barrier0(), !dbg !35
+  %340 = icmp slt i32 %10, 64, !dbg !35
+  %341 = sext i32 %10 to i64, !dbg !35
+  %342 = getelementptr float, ptr addrspace(3) @global_smem, i64 %341, !dbg !35
+  %343 = tail call float asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %342, i1 %340) #3, !dbg !35
+  %344 = bitcast float %343 to i32, !dbg !35
+  %345 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %344, i32 4, i32 31), !dbg !35
+  %346 = bitcast i32 %345 to float, !dbg !35
+  %347 = fadd float %343, %346, !dbg !29
+  %348 = bitcast float %347 to i32, !dbg !35
+  %349 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %348, i32 2, i32 31), !dbg !35
+  %350 = bitcast i32 %349 to float, !dbg !35
+  %351 = fadd float %347, %350, !dbg !29
+  %352 = bitcast float %351 to i32, !dbg !35
+  %353 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %352, i32 1, i32 31), !dbg !35
+  %354 = bitcast i32 %353 to float, !dbg !35
+  %355 = fadd float %351, %354, !dbg !29
+  %356 = and i32 %10, 7, !dbg !35
+  %357 = icmp eq i32 %356, 0, !dbg !35
+  %358 = and i1 %340, %357, !dbg !35
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %342, float %355, i1 %358) #3, !dbg !35
+  tail call void @llvm.nvvm.barrier0(), !dbg !35
+  %359 = load float, ptr addrspace(3) @global_smem, align 4, !dbg !35
+  %360 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 32), align 4, !dbg !35
+  %361 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 64), align 4, !dbg !35
+  %362 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 96), align 4, !dbg !35
+  %363 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 128), align 4, !dbg !35
+  %364 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 160), align 4, !dbg !35
+  %365 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 192), align 4, !dbg !35
+  %366 = load float, ptr addrspace(3) getelementptr ([0 x i8], ptr addrspace(3) @global_smem, i64 0, i64 224), align 4, !dbg !35
+  %367 = extractelement <2 x i64> %25, i64 0, !dbg !37
+  %368 = extractelement <2 x i64> %25, i64 1, !dbg !37
+  %369 = extractelement <8 x float> %66, i64 0, !dbg !38
+  %370 = extractelement <8 x float> %66, i64 1, !dbg !38
+  %371 = extractelement <8 x float> %66, i64 2, !dbg !38
+  %372 = extractelement <8 x float> %66, i64 3, !dbg !38
+  %373 = extractelement <8 x float> %66, i64 4, !dbg !38
+  %374 = extractelement <8 x float> %66, i64 5, !dbg !38
+  %375 = extractelement <8 x float> %66, i64 6, !dbg !38
+  %376 = extractelement <8 x float> %66, i64 7, !dbg !38
+  br label %377, !dbg !39
+
+377:                                              ; preds = %137, %377
+  %378 = phi i32 [ 0, %137 ], [ %672, %377 ]
+  %379 = zext nneg i32 %378 to i64, !dbg !37
+  %380 = or i64 %367, %379, !dbg !37
+  %381 = or i64 %368, %379, !dbg !37
+  %382 = icmp ult i64 %380, 50257, !dbg !40
+  %383 = icmp ult i64 %381, 50257, !dbg !40
+  %384 = add nsw i64 %380, %46, !dbg !41
+  %385 = add nsw i64 %381, %46, !dbg !41
+  %386 = add nsw i64 %380, %47, !dbg !41
+  %387 = add nsw i64 %381, %47, !dbg !41
+  %388 = add nsw i64 %380, %48, !dbg !41
+  %389 = add nsw i64 %381, %48, !dbg !41
+  %390 = add nsw i64 %380, %49, !dbg !41
+  %391 = add nsw i64 %381, %49, !dbg !41
+  %392 = add nsw i64 %380, %50, !dbg !41
+  %393 = add nsw i64 %381, %50, !dbg !41
+  %394 = add nsw i64 %380, %51, !dbg !41
+  %395 = add nsw i64 %381, %51, !dbg !41
+  %396 = add nsw i64 %380, %52, !dbg !41
+  %397 = add nsw i64 %381, %52, !dbg !41
+  %398 = add nsw i64 %380, %53, !dbg !41
+  %399 = add nsw i64 %381, %53, !dbg !41
+  %400 = getelementptr i16, ptr addrspace(1) %4, i64 %384, !dbg !42
+  %401 = getelementptr i16, ptr addrspace(1) %4, i64 %385, !dbg !42
+  %402 = getelementptr i16, ptr addrspace(1) %4, i64 %386, !dbg !42
+  %403 = getelementptr i16, ptr addrspace(1) %4, i64 %387, !dbg !42
+  %404 = getelementptr i16, ptr addrspace(1) %4, i64 %388, !dbg !42
+  %405 = getelementptr i16, ptr addrspace(1) %4, i64 %389, !dbg !42
+  %406 = getelementptr i16, ptr addrspace(1) %4, i64 %390, !dbg !42
+  %407 = getelementptr i16, ptr addrspace(1) %4, i64 %391, !dbg !42
+  %408 = getelementptr i16, ptr addrspace(1) %4, i64 %392, !dbg !42
+  %409 = getelementptr i16, ptr addrspace(1) %4, i64 %393, !dbg !42
+  %410 = getelementptr i16, ptr addrspace(1) %4, i64 %394, !dbg !42
+  %411 = getelementptr i16, ptr addrspace(1) %4, i64 %395, !dbg !42
+  %412 = getelementptr i16, ptr addrspace(1) %4, i64 %396, !dbg !42
+  %413 = getelementptr i16, ptr addrspace(1) %4, i64 %397, !dbg !42
+  %414 = getelementptr i16, ptr addrspace(1) %4, i64 %398, !dbg !42
+  %415 = getelementptr i16, ptr addrspace(1) %4, i64 %399, !dbg !42
+  %416 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %400, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %417 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %401, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %418 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %402, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %419 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %403, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %420 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %404, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %421 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %405, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %422 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %406, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %423 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %407, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %424 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %408, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %425 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %409, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %426 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %410, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %427 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %411, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %428 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %412, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %429 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %413, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %430 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %414, i1 %382, i16 0, i1 %382) #3, !dbg !43
+  %431 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %415, i1 %383, i16 0, i1 %383) #3, !dbg !43
+  %432 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %416) #3, !dbg !44
+  %433 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %417) #3, !dbg !44
+  %434 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %418) #3, !dbg !44
+  %435 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %419) #3, !dbg !44
+  %436 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %420) #3, !dbg !44
+  %437 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %421) #3, !dbg !44
+  %438 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %422) #3, !dbg !44
+  %439 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %423) #3, !dbg !44
+  %440 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %424) #3, !dbg !44
+  %441 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %425) #3, !dbg !44
+  %442 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %426) #3, !dbg !44
+  %443 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %427) #3, !dbg !44
+  %444 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %428) #3, !dbg !44
+  %445 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %429) #3, !dbg !44
+  %446 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %430) #3, !dbg !44
+  %447 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %431) #3, !dbg !44
+  %448 = getelementptr float, ptr addrspace(1) %0, i64 %384, !dbg !45
+  %449 = getelementptr float, ptr addrspace(1) %0, i64 %385, !dbg !45
+  %450 = getelementptr float, ptr addrspace(1) %0, i64 %386, !dbg !45
+  %451 = getelementptr float, ptr addrspace(1) %0, i64 %387, !dbg !45
+  %452 = getelementptr float, ptr addrspace(1) %0, i64 %388, !dbg !45
+  %453 = getelementptr float, ptr addrspace(1) %0, i64 %389, !dbg !45
+  %454 = getelementptr float, ptr addrspace(1) %0, i64 %390, !dbg !45
+  %455 = getelementptr float, ptr addrspace(1) %0, i64 %391, !dbg !45
+  %456 = getelementptr float, ptr addrspace(1) %0, i64 %392, !dbg !45
+  %457 = getelementptr float, ptr addrspace(1) %0, i64 %393, !dbg !45
+  %458 = getelementptr float, ptr addrspace(1) %0, i64 %394, !dbg !45
+  %459 = getelementptr float, ptr addrspace(1) %0, i64 %395, !dbg !45
+  %460 = getelementptr float, ptr addrspace(1) %0, i64 %396, !dbg !45
+  %461 = getelementptr float, ptr addrspace(1) %0, i64 %397, !dbg !45
+  %462 = getelementptr float, ptr addrspace(1) %0, i64 %398, !dbg !45
+  %463 = getelementptr float, ptr addrspace(1) %0, i64 %399, !dbg !45
+  %464 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %448, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %465 = bitcast i32 %464 to float, !dbg !46
+  %466 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %449, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %467 = bitcast i32 %466 to float, !dbg !46
+  %468 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %450, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %469 = bitcast i32 %468 to float, !dbg !46
+  %470 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %451, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %471 = bitcast i32 %470 to float, !dbg !46
+  %472 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %452, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %473 = bitcast i32 %472 to float, !dbg !46
+  %474 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %453, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %475 = bitcast i32 %474 to float, !dbg !46
+  %476 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %454, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %477 = bitcast i32 %476 to float, !dbg !46
+  %478 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %455, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %479 = bitcast i32 %478 to float, !dbg !46
+  %480 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %456, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %481 = bitcast i32 %480 to float, !dbg !46
+  %482 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %457, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %483 = bitcast i32 %482 to float, !dbg !46
+  %484 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %458, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %485 = bitcast i32 %484 to float, !dbg !46
+  %486 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %459, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %487 = bitcast i32 %486 to float, !dbg !46
+  %488 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %460, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %489 = bitcast i32 %488 to float, !dbg !46
+  %490 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %461, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %491 = bitcast i32 %490 to float, !dbg !46
+  %492 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %462, i1 %382, i32 0, i1 %382) #3, !dbg !46
+  %493 = bitcast i32 %492 to float, !dbg !46
+  %494 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %463, i1 %383, i32 0, i1 %383) #3, !dbg !46
+  %495 = bitcast i32 %494 to float, !dbg !46
+  %496 = getelementptr i16, ptr addrspace(1) %5, i64 %384, !dbg !47
+  %497 = getelementptr i16, ptr addrspace(1) %5, i64 %385, !dbg !47
+  %498 = getelementptr i16, ptr addrspace(1) %5, i64 %386, !dbg !47
+  %499 = getelementptr i16, ptr addrspace(1) %5, i64 %387, !dbg !47
+  %500 = getelementptr i16, ptr addrspace(1) %5, i64 %388, !dbg !47
+  %501 = getelementptr i16, ptr addrspace(1) %5, i64 %389, !dbg !47
+  %502 = getelementptr i16, ptr addrspace(1) %5, i64 %390, !dbg !47
+  %503 = getelementptr i16, ptr addrspace(1) %5, i64 %391, !dbg !47
+  %504 = getelementptr i16, ptr addrspace(1) %5, i64 %392, !dbg !47
+  %505 = getelementptr i16, ptr addrspace(1) %5, i64 %393, !dbg !47
+  %506 = getelementptr i16, ptr addrspace(1) %5, i64 %394, !dbg !47
+  %507 = getelementptr i16, ptr addrspace(1) %5, i64 %395, !dbg !47
+  %508 = getelementptr i16, ptr addrspace(1) %5, i64 %396, !dbg !47
+  %509 = getelementptr i16, ptr addrspace(1) %5, i64 %397, !dbg !47
+  %510 = getelementptr i16, ptr addrspace(1) %5, i64 %398, !dbg !47
+  %511 = getelementptr i16, ptr addrspace(1) %5, i64 %399, !dbg !47
+  %512 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %496, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %513 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %497, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %514 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %498, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %515 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %499, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %516 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %500, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %517 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %501, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %518 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %502, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %519 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %503, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %520 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %504, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %521 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %505, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %522 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %506, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %523 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %507, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %524 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %508, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %525 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %509, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %526 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %510, i1 %382, i16 0, i1 %382) #3, !dbg !48
+  %527 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %511, i1 %383, i16 0, i1 %383) #3, !dbg !48
+  %528 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %512) #3, !dbg !49
+  %529 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %513) #3, !dbg !49
+  %530 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %514) #3, !dbg !49
+  %531 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %515) #3, !dbg !49
+  %532 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %516) #3, !dbg !49
+  %533 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %517) #3, !dbg !49
+  %534 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %518) #3, !dbg !49
+  %535 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %519) #3, !dbg !49
+  %536 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %520) #3, !dbg !49
+  %537 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %521) #3, !dbg !49
+  %538 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %522) #3, !dbg !49
+  %539 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %523) #3, !dbg !49
+  %540 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %524) #3, !dbg !49
+  %541 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %525) #3, !dbg !49
+  %542 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %526) #3, !dbg !49
+  %543 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %527) #3, !dbg !49
+  %544 = fmul float %369, %465, !dbg !38
+  %545 = fmul float %369, %467, !dbg !38
+  %546 = fmul float %370, %469, !dbg !38
+  %547 = fmul float %370, %471, !dbg !38
+  %548 = fmul float %371, %473, !dbg !38
+  %549 = fmul float %371, %475, !dbg !38
+  %550 = fmul float %372, %477, !dbg !38
+  %551 = fmul float %372, %479, !dbg !38
+  %552 = fmul float %373, %481, !dbg !38
+  %553 = fmul float %373, %483, !dbg !38
+  %554 = fmul float %374, %485, !dbg !38
+  %555 = fmul float %374, %487, !dbg !38
+  %556 = fmul float %375, %489, !dbg !38
+  %557 = fmul float %375, %491, !dbg !38
+  %558 = fmul float %376, %493, !dbg !38
+  %559 = fmul float %376, %495, !dbg !38
+  %560 = fmul float %528, 0x3FF7154760000000, !dbg !50
+  %561 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %560) #3, !dbg !50
+  %562 = fmul float %529, 0x3FF7154760000000, !dbg !50
+  %563 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %562) #3, !dbg !50
+  %564 = fmul float %530, 0x3FF7154760000000, !dbg !50
+  %565 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %564) #3, !dbg !50
+  %566 = fmul float %531, 0x3FF7154760000000, !dbg !50
+  %567 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %566) #3, !dbg !50
+  %568 = fmul float %532, 0x3FF7154760000000, !dbg !50
+  %569 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %568) #3, !dbg !50
+  %570 = fmul float %533, 0x3FF7154760000000, !dbg !50
+  %571 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %570) #3, !dbg !50
+  %572 = fmul float %534, 0x3FF7154760000000, !dbg !50
+  %573 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %572) #3, !dbg !50
+  %574 = fmul float %535, 0x3FF7154760000000, !dbg !50
+  %575 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %574) #3, !dbg !50
+  %576 = fmul float %536, 0x3FF7154760000000, !dbg !50
+  %577 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %576) #3, !dbg !50
+  %578 = fmul float %537, 0x3FF7154760000000, !dbg !50
+  %579 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %578) #3, !dbg !50
+  %580 = fmul float %538, 0x3FF7154760000000, !dbg !50
+  %581 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %580) #3, !dbg !50
+  %582 = fmul float %539, 0x3FF7154760000000, !dbg !50
+  %583 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %582) #3, !dbg !50
+  %584 = fmul float %540, 0x3FF7154760000000, !dbg !50
+  %585 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %584) #3, !dbg !50
+  %586 = fmul float %541, 0x3FF7154760000000, !dbg !50
+  %587 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %586) #3, !dbg !50
+  %588 = fmul float %542, 0x3FF7154760000000, !dbg !50
+  %589 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %588) #3, !dbg !50
+  %590 = fmul float %543, 0x3FF7154760000000, !dbg !50
+  %591 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %590) #3, !dbg !50
+  %592 = fmul float %359, %561, !dbg !51
+  %593 = fmul float %359, %563, !dbg !51
+  %594 = fmul float %360, %565, !dbg !51
+  %595 = fmul float %360, %567, !dbg !51
+  %596 = fmul float %361, %569, !dbg !51
+  %597 = fmul float %361, %571, !dbg !51
+  %598 = fmul float %362, %573, !dbg !51
+  %599 = fmul float %362, %575, !dbg !51
+  %600 = fmul float %363, %577, !dbg !51
+  %601 = fmul float %363, %579, !dbg !51
+  %602 = fmul float %364, %581, !dbg !51
+  %603 = fmul float %364, %583, !dbg !51
+  %604 = fmul float %365, %585, !dbg !51
+  %605 = fmul float %365, %587, !dbg !51
+  %606 = fmul float %366, %589, !dbg !51
+  %607 = fmul float %366, %591, !dbg !51
+  %608 = fsub float %544, %592, !dbg !52
+  %609 = fsub float %545, %593, !dbg !52
+  %610 = fsub float %546, %594, !dbg !52
+  %611 = fsub float %547, %595, !dbg !52
+  %612 = fsub float %548, %596, !dbg !52
+  %613 = fsub float %549, %597, !dbg !52
+  %614 = fsub float %550, %598, !dbg !52
+  %615 = fsub float %551, %599, !dbg !52
+  %616 = fsub float %552, %600, !dbg !52
+  %617 = fsub float %553, %601, !dbg !52
+  %618 = fsub float %554, %602, !dbg !52
+  %619 = fsub float %555, %603, !dbg !52
+  %620 = fsub float %556, %604, !dbg !52
+  %621 = fsub float %557, %605, !dbg !52
+  %622 = fsub float %558, %606, !dbg !52
+  %623 = fsub float %559, %607, !dbg !52
+  %624 = fadd float %432, %608, !dbg !53
+  %625 = fadd float %433, %609, !dbg !53
+  %626 = fadd float %434, %610, !dbg !53
+  %627 = fadd float %435, %611, !dbg !53
+  %628 = fadd float %436, %612, !dbg !53
+  %629 = fadd float %437, %613, !dbg !53
+  %630 = fadd float %438, %614, !dbg !53
+  %631 = fadd float %439, %615, !dbg !53
+  %632 = fadd float %440, %616, !dbg !53
+  %633 = fadd float %441, %617, !dbg !53
+  %634 = fadd float %442, %618, !dbg !53
+  %635 = fadd float %443, %619, !dbg !53
+  %636 = fadd float %444, %620, !dbg !53
+  %637 = fadd float %445, %621, !dbg !53
+  %638 = fadd float %446, %622, !dbg !53
+  %639 = fadd float %447, %623, !dbg !53
+  %640 = getelementptr i16, ptr addrspace(1) %6, i64 %384, !dbg !54
+  %641 = getelementptr i16, ptr addrspace(1) %6, i64 %385, !dbg !54
+  %642 = getelementptr i16, ptr addrspace(1) %6, i64 %386, !dbg !54
+  %643 = getelementptr i16, ptr addrspace(1) %6, i64 %387, !dbg !54
+  %644 = getelementptr i16, ptr addrspace(1) %6, i64 %388, !dbg !54
+  %645 = getelementptr i16, ptr addrspace(1) %6, i64 %389, !dbg !54
+  %646 = getelementptr i16, ptr addrspace(1) %6, i64 %390, !dbg !54
+  %647 = getelementptr i16, ptr addrspace(1) %6, i64 %391, !dbg !54
+  %648 = getelementptr i16, ptr addrspace(1) %6, i64 %392, !dbg !54
+  %649 = getelementptr i16, ptr addrspace(1) %6, i64 %393, !dbg !54
+  %650 = getelementptr i16, ptr addrspace(1) %6, i64 %394, !dbg !54
+  %651 = getelementptr i16, ptr addrspace(1) %6, i64 %395, !dbg !54
+  %652 = getelementptr i16, ptr addrspace(1) %6, i64 %396, !dbg !54
+  %653 = getelementptr i16, ptr addrspace(1) %6, i64 %397, !dbg !54
+  %654 = getelementptr i16, ptr addrspace(1) %6, i64 %398, !dbg !54
+  %655 = getelementptr i16, ptr addrspace(1) %6, i64 %399, !dbg !54
+  %656 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %624) #3, !dbg !55
+  %657 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %625) #3, !dbg !55
+  %658 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %626) #3, !dbg !55
+  %659 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %627) #3, !dbg !55
+  %660 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %628) #3, !dbg !55
+  %661 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %629) #3, !dbg !55
+  %662 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %630) #3, !dbg !55
+  %663 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %631) #3, !dbg !55
+  %664 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %632) #3, !dbg !55
+  %665 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %633) #3, !dbg !55
+  %666 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %634) #3, !dbg !55
+  %667 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %635) #3, !dbg !55
+  %668 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %636) #3, !dbg !55
+  %669 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %637) #3, !dbg !55
+  %670 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %638) #3, !dbg !55
+  %671 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %639) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %656, ptr addrspace(1) %640, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %657, ptr addrspace(1) %641, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %658, ptr addrspace(1) %642, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %659, ptr addrspace(1) %643, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %660, ptr addrspace(1) %644, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %661, ptr addrspace(1) %645, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %662, ptr addrspace(1) %646, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %663, ptr addrspace(1) %647, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %664, ptr addrspace(1) %648, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %665, ptr addrspace(1) %649, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %666, ptr addrspace(1) %650, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %667, ptr addrspace(1) %651, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %668, ptr addrspace(1) %652, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %669, ptr addrspace(1) %653, i1 %383) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %670, ptr addrspace(1) %654, i1 %382) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %671, ptr addrspace(1) %655, i1 %383) #3, !dbg !55
+  %672 = add nuw nsw i32 %378, 512, !dbg !39
+  %673 = icmp ult i32 %378, 49745, !dbg !39
+  br i1 %673, label %377, label %674, !dbg !39
+
+674:                                              ; preds = %377
+  ret void, !dbg !56
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #2
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+!nvvm.annotations = !{!3, !4, !4, !3}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_C, file: !2, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!2 = !DIFile(filename: "ckzgl7thb4xdfkfnd2tidks6mt5f3hauwfyjflbtzyepo5oxkvhk.py", directory: "/tmp/torchinductor_root/kz")
+!3 = !{ptr @triton__0d1d2d3d4d5d6d7de8, !"kernel", i32 1}
+!4 = !{ptr @triton__0d1d2d3d4d5d6d7de8, !"maxntidx", i32 256}
+!5 = distinct !DISubprogram(name: "triton__0d1d2d3d4d5d6d7de8", linkageName: "triton__0d1d2d3d4d5d6d7de8", scope: !2, file: !2, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !1)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 22, column: 44, scope: !5)
+!9 = !DILocation(line: 24, column: 33, scope: !5)
+!10 = !DILocation(line: 21, column: 28, scope: !5)
+!11 = !DILocation(line: 21, column: 34, scope: !5)
+!12 = !DILocation(line: 21, column: 46, scope: !5)
+!13 = !DILocation(line: 22, column: 23, scope: !5)
+!14 = !DILocation(line: 26, column: 30, scope: !5)
+!15 = !DILocation(line: 26, column: 35, scope: !5)
+!16 = !DILocation(line: 27, column: 19, scope: !5)
+!17 = !DILocation(line: 29, column: 19, scope: !5)
+!18 = !DILocation(line: 36, column: 46, scope: !5)
+!19 = !DILocation(line: 38, column: 23, scope: !5)
+!20 = !DILocation(line: 39, column: 22, scope: !5)
+!21 = !DILocation(line: 41, column: 37, scope: !5)
+!22 = !DILocation(line: 32, column: 36, scope: !5)
+!23 = !DILocation(line: 33, column: 27, scope: !5)
+!24 = !DILocation(line: 34, column: 25, scope: !5)
+!25 = !DILocation(line: 36, column: 34, scope: !5)
+!26 = !DILocation(line: 36, column: 52, scope: !5)
+!27 = !DILocation(line: 42, column: 23, scope: !5)
+!28 = !DILocation(line: 45, column: 40, scope: !5)
+!29 = !DILocation(line: 233, column: 15, scope: !30, inlinedAt: !33)
+!30 = distinct !DILexicalBlockFile(scope: !32, file: !31, discriminator: 0)
+!31 = !DIFile(filename: "standard.py", directory: "/usr/local/lib/python3.10/dist-packages/triton/language")
+!32 = distinct !DILexicalBlockFile(scope: !5, file: !31, discriminator: 0)
+!33 = !DILocation(line: 243, column: 36, scope: !30, inlinedAt: !34)
+!34 = !DILocation(line: 46, column: 27, scope: !30)
+!35 = !DILocation(line: 243, column: 36, scope: !32, inlinedAt: !36)
+!36 = !DILocation(line: 46, column: 27, scope: !32)
+!37 = !DILocation(line: 52, column: 27, scope: !5)
+!38 = !DILocation(line: 63, column: 24, scope: !5)
+!39 = !DILocation(line: 51, column: 36, scope: !5)
+!40 = !DILocation(line: 53, column: 25, scope: !5)
+!41 = !DILocation(line: 55, column: 41, scope: !5)
+!42 = !DILocation(line: 55, column: 35, scope: !5)
+!43 = !DILocation(line: 55, column: 53, scope: !5)
+!44 = !DILocation(line: 55, column: 105, scope: !5)
+!45 = !DILocation(line: 56, column: 35, scope: !5)
+!46 = !DILocation(line: 56, column: 53, scope: !5)
+!47 = !DILocation(line: 57, column: 35, scope: !5)
+!48 = !DILocation(line: 57, column: 53, scope: !5)
+!49 = !DILocation(line: 57, column: 105, scope: !5)
+!50 = !DILocation(line: 65, column: 23, scope: !5)
+!51 = !DILocation(line: 66, column: 24, scope: !5)
+!52 = !DILocation(line: 67, column: 24, scope: !5)
+!53 = !DILocation(line: 69, column: 24, scope: !5)
+!54 = !DILocation(line: 70, column: 29, scope: !5)
+!55 = !DILocation(line: 70, column: 54, scope: !5)
+!56 = !DILocation(line: 51, column: 4, scope: !5)
diff --git a/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.ptx b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..9946165402d6f60ec2eb5a4f0e15b445d3caf76b
--- /dev/null
+++ b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.ptx
@@ -0,0 +1,1517 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2d3d4d5d6d7de8
+.extern .shared .align 1 .b8 global_smem[];
+
+.visible .entry triton__0d1d2d3d4d5d6d7de8(
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_0,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_1,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_2,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_3,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_4,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_5,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_6,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_7,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_8
+)
+.maxntid 256, 1, 1
+{
+	.reg .pred 	%p<176>;
+	.reg .b16 	%rs<129>;
+	.reg .b32 	%r<238>;
+	.reg .f32 	%f<393>;
+	.reg .b64 	%rd<166>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd39, [triton__0d1d2d3d4d5d6d7de8_param_6];
+	ld.param.u64 	%rd38, [triton__0d1d2d3d4d5d6d7de8_param_5];
+	ld.param.u64 	%rd37, [triton__0d1d2d3d4d5d6d7de8_param_4];
+	ld.param.u64 	%rd36, [triton__0d1d2d3d4d5d6d7de8_param_0];
+$L__tmp0:
+	.loc	1 22 44
+	mov.u32 	%r1, %tid.x;
+	ld.param.u64 	%rd59, [triton__0d1d2d3d4d5d6d7de8_param_1];
+	shr.u32 	%r2, %r1, 5;
+	ld.param.u64 	%rd56, [triton__0d1d2d3d4d5d6d7de8_param_2];
+	.loc	1 24 33
+	and.b32  	%r9, %r1, 255;
+	ld.param.u64 	%rd57, [triton__0d1d2d3d4d5d6d7de8_param_3];
+	or.b32  	%r10, %r9, 256;
+	.loc	1 21 28
+	mov.u32 %r3, %ctaid.x;
+	.loc	1 21 34
+	cvt.s64.s32 	%rd1, %r3;
+	.loc	1 21 46
+	mul.wide.s32 	%rd60, %r3, 8;
+	.loc	1 22 23
+	or.b64  	%rd61, %rd60, 1;
+	cvt.u64.u32 	%rd2, %r9;
+	cvt.u64.u32 	%rd3, %r10;
+	.loc	1 26 30
+	shl.b64 	%rd62, %rd60, 3;
+	add.s64 	%rd41, %rd59, %rd62;
+	add.s64 	%rd43, %rd41, 8;
+	add.s64 	%rd45, %rd41, 16;
+	add.s64 	%rd47, %rd41, 24;
+	add.s64 	%rd49, %rd41, 32;
+	add.s64 	%rd51, %rd41, 40;
+	add.s64 	%rd53, %rd41, 48;
+	add.s64 	%rd55, %rd41, 56;
+	mov.pred 	%p1, -1;
+	.loc	1 26 35
+	mov.u64 %rd40, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd40 }, [ %rd41 + 0 ];
+	mov.u64 %rd42, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd42 }, [ %rd43 + 0 ];
+	mov.u64 %rd44, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd44 }, [ %rd45 + 0 ];
+	mov.u64 %rd46, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd46 }, [ %rd47 + 0 ];
+	mov.u64 %rd48, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd48 }, [ %rd49 + 0 ];
+	mov.u64 %rd50, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd50 }, [ %rd51 + 0 ];
+	mov.u64 %rd52, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd52 }, [ %rd53 + 0 ];
+	mov.u64 %rd54, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd54 }, [ %rd55 + 0 ];
+	.loc	1 27 19
+	mov.u32 %r7, 0x0;
+	@%p1 ld.global.b32 { %r7 }, [ %rd56 + 0 ];
+	.loc	1 29 19
+	mov.u32 %r8, 0x0;
+	@%p1 ld.global.b32 { %r8 }, [ %rd57 + 0 ];
+	.loc	1 36 46
+	mul.wide.s32 	%rd4, %r3, 402056;
+	mul.lo.s64 	%rd5, %rd61, 50257;
+	.loc	1 38 23
+	setp.eq.s64 	%p11, %rd40, -1;
+	setp.eq.s64 	%p12, %rd42, -1;
+	setp.eq.s64 	%p13, %rd44, -1;
+	setp.eq.s64 	%p14, %rd46, -1;
+	setp.eq.s64 	%p15, %rd48, -1;
+	setp.eq.s64 	%p16, %rd50, -1;
+	setp.eq.s64 	%p17, %rd52, -1;
+	setp.eq.s64 	%p18, %rd54, -1;
+	.loc	1 39 22
+	div.full.f32 %r6, %r7, %r8;
+	mov.b32 	%f89, %r6;
+	.loc	1 41 37
+	selp.f32 	%f8, 0f00000000, %f89, %p18;
+	selp.f32 	%f7, 0f00000000, %f89, %p17;
+	selp.f32 	%f6, 0f00000000, %f89, %p16;
+	selp.f32 	%f5, 0f00000000, %f89, %p15;
+	selp.f32 	%f4, 0f00000000, %f89, %p14;
+	selp.f32 	%f3, 0f00000000, %f89, %p13;
+	selp.f32 	%f2, 0f00000000, %f89, %p12;
+	selp.f32 	%f1, 0f00000000, %f89, %p11;
+	mov.f32 	%f377, 0f00000000;
+	mov.u64 	%rd157, 0;
+	shl.b64 	%rd83, %rd4, 2;
+	shl.b64 	%rd86, %rd5, 2;
+	mov.f32 	%f378, %f377;
+	mov.f32 	%f379, %f377;
+	mov.f32 	%f380, %f377;
+	mov.f32 	%f381, %f377;
+	mov.f32 	%f382, %f377;
+	mov.f32 	%f383, %f377;
+	mov.f32 	%f384, %f377;
+	mov.f32 	%f385, %f377;
+	mov.f32 	%f386, %f377;
+	mov.f32 	%f387, %f377;
+	mov.f32 	%f388, %f377;
+	mov.f32 	%f389, %f377;
+	mov.f32 	%f390, %f377;
+	mov.f32 	%f391, %f377;
+	mov.f32 	%f392, %f377;
+$L__BB0_1:
+	.loc	1 33 27
+	or.b64  	%rd79, %rd157, %rd2;
+	or.b64  	%rd80, %rd157, %rd3;
+	.loc	1 34 25
+	setp.lt.u64 	%p22, %rd80, 50257;
+	setp.lt.u64 	%p20, %rd79, 50257;
+	.loc	1 36 34
+	shl.b64 	%rd81, %rd79, 2;
+	add.s64 	%rd82, %rd36, %rd81;
+	add.s64 	%rd63, %rd82, %rd83;
+	shl.b64 	%rd84, %rd80, 2;
+	add.s64 	%rd85, %rd36, %rd84;
+	add.s64 	%rd64, %rd85, %rd83;
+	add.s64 	%rd65, %rd82, %rd86;
+	add.s64 	%rd66, %rd85, %rd86;
+	add.s64 	%rd67, %rd65, 201028;
+	add.s64 	%rd68, %rd66, 201028;
+	add.s64 	%rd69, %rd65, 402056;
+	add.s64 	%rd70, %rd66, 402056;
+	add.s64 	%rd71, %rd65, 603084;
+	add.s64 	%rd72, %rd66, 603084;
+	add.s64 	%rd73, %rd65, 804112;
+	add.s64 	%rd74, %rd66, 804112;
+	add.s64 	%rd75, %rd65, 1005140;
+	add.s64 	%rd76, %rd66, 1005140;
+	add.s64 	%rd77, %rd65, 1206168;
+	add.s64 	%rd78, %rd66, 1206168;
+	mov.b32 	%r173, 0;
+	.loc	1 36 52
+	mov.u32 %r11, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r11 }, [ %rd63 + 0 ];
+	@!%p20 mov.u32 %r11, %r173;
+	mov.u32 %r13, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r13 }, [ %rd64 + 0 ];
+	@!%p22 mov.u32 %r13, %r173;
+	mov.u32 %r15, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r15 }, [ %rd65 + 0 ];
+	@!%p20 mov.u32 %r15, %r173;
+	mov.u32 %r17, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r17 }, [ %rd66 + 0 ];
+	@!%p22 mov.u32 %r17, %r173;
+	mov.u32 %r19, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r19 }, [ %rd67 + 0 ];
+	@!%p20 mov.u32 %r19, %r173;
+	mov.u32 %r21, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r21 }, [ %rd68 + 0 ];
+	@!%p22 mov.u32 %r21, %r173;
+	mov.u32 %r23, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r23 }, [ %rd69 + 0 ];
+	@!%p20 mov.u32 %r23, %r173;
+	mov.u32 %r25, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r25 }, [ %rd70 + 0 ];
+	@!%p22 mov.u32 %r25, %r173;
+	mov.u32 %r27, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r27 }, [ %rd71 + 0 ];
+	@!%p20 mov.u32 %r27, %r173;
+	mov.u32 %r29, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r29 }, [ %rd72 + 0 ];
+	@!%p22 mov.u32 %r29, %r173;
+	mov.u32 %r31, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r31 }, [ %rd73 + 0 ];
+	@!%p20 mov.u32 %r31, %r173;
+	mov.u32 %r33, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r33 }, [ %rd74 + 0 ];
+	@!%p22 mov.u32 %r33, %r173;
+	mov.u32 %r35, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r35 }, [ %rd75 + 0 ];
+	@!%p20 mov.u32 %r35, %r173;
+	mov.u32 %r37, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r37 }, [ %rd76 + 0 ];
+	@!%p22 mov.u32 %r37, %r173;
+	mov.u32 %r39, 0x0;
+	@%p20 ld.global.L1::evict_last.b32 { %r39 }, [ %rd77 + 0 ];
+	@!%p20 mov.u32 %r39, %r173;
+	mov.u32 %r41, 0x0;
+	@%p22 ld.global.L1::evict_last.b32 { %r41 }, [ %rd78 + 0 ];
+	@!%p22 mov.u32 %r41, %r173;
+	mov.b32 	%f90, %r41;
+	mov.b32 	%f91, %r39;
+	mov.b32 	%f92, %r37;
+	mov.b32 	%f93, %r35;
+	mov.b32 	%f94, %r33;
+	mov.b32 	%f95, %r31;
+	mov.b32 	%f96, %r29;
+	mov.b32 	%f97, %r27;
+	mov.b32 	%f98, %r25;
+	mov.b32 	%f99, %r23;
+	mov.b32 	%f100, %r21;
+	mov.b32 	%f101, %r19;
+	mov.b32 	%f102, %r17;
+	mov.b32 	%f103, %r15;
+	mov.b32 	%f104, %r13;
+	mov.b32 	%f105, %r11;
+	.loc	1 42 23
+	mul.f32 	%f106, %f1, %f105;
+	mul.f32 	%f107, %f1, %f104;
+	mul.f32 	%f108, %f2, %f103;
+	mul.f32 	%f109, %f2, %f102;
+	mul.f32 	%f110, %f3, %f101;
+	mul.f32 	%f111, %f3, %f100;
+	mul.f32 	%f112, %f4, %f99;
+	mul.f32 	%f113, %f4, %f98;
+	mul.f32 	%f114, %f5, %f97;
+	mul.f32 	%f115, %f5, %f96;
+	mul.f32 	%f116, %f6, %f95;
+	mul.f32 	%f117, %f6, %f94;
+	mul.f32 	%f118, %f7, %f93;
+	mul.f32 	%f119, %f7, %f92;
+	mul.f32 	%f120, %f8, %f91;
+	mul.f32 	%f121, %f8, %f90;
+	.loc	1 45 40
+	selp.f32 	%f122, %f121, 0f80000000, %p22;
+	selp.f32 	%f123, %f120, 0f80000000, %p20;
+	selp.f32 	%f124, %f119, 0f80000000, %p22;
+	selp.f32 	%f125, %f118, 0f80000000, %p20;
+	selp.f32 	%f126, %f117, 0f80000000, %p22;
+	selp.f32 	%f127, %f116, 0f80000000, %p20;
+	selp.f32 	%f128, %f115, 0f80000000, %p22;
+	selp.f32 	%f129, %f114, 0f80000000, %p20;
+	selp.f32 	%f130, %f113, 0f80000000, %p22;
+	selp.f32 	%f131, %f112, 0f80000000, %p20;
+	selp.f32 	%f132, %f111, 0f80000000, %p22;
+	selp.f32 	%f133, %f110, 0f80000000, %p20;
+	selp.f32 	%f134, %f109, 0f80000000, %p22;
+	selp.f32 	%f135, %f108, 0f80000000, %p20;
+	selp.f32 	%f136, %f107, 0f80000000, %p22;
+	selp.f32 	%f137, %f106, 0f80000000, %p20;
+	add.f32 	%f377, %f377, %f137;
+	add.f32 	%f378, %f378, %f136;
+	add.f32 	%f379, %f379, %f135;
+	add.f32 	%f380, %f380, %f134;
+	add.f32 	%f381, %f381, %f133;
+	add.f32 	%f382, %f382, %f132;
+	add.f32 	%f383, %f383, %f131;
+	add.f32 	%f384, %f384, %f130;
+	add.f32 	%f385, %f385, %f129;
+	add.f32 	%f386, %f386, %f128;
+	add.f32 	%f387, %f387, %f127;
+	add.f32 	%f388, %f388, %f126;
+	add.f32 	%f389, %f389, %f125;
+	add.f32 	%f390, %f390, %f124;
+	add.f32 	%f391, %f391, %f123;
+	add.f32 	%f392, %f392, %f122;
+	.loc	1 32 36
+	add.s64 	%rd157, %rd157, 512;
+	cvt.u32.u64 	%r43, %rd157;
+	add.s32 	%r44, %r43, -512;
+	setp.lt.u32 	%p51, %r44, 49745;
+	@%p51 bra 	$L__BB0_1;
+	.loc	1 22 44
+	and.b32  	%r65, %r1, 31;
+	.loc	1 24 33
+	and.b32  	%r66, %r2, 7;
+$L__tmp1:
+	.loc	2 233 15
+	add.f32 	%f138, %f377, %f378;
+	add.f32 	%f139, %f379, %f380;
+	add.f32 	%f140, %f381, %f382;
+	add.f32 	%f141, %f383, %f384;
+	add.f32 	%f142, %f385, %f386;
+	add.f32 	%f143, %f387, %f388;
+	add.f32 	%f144, %f389, %f390;
+	add.f32 	%f145, %f391, %f392;
+$L__tmp2:
+	.loc	2 243 36
+	mov.b32 	%r67, %f138;
+	shfl.sync.bfly.b32	%r68, %r67, 16, 31, -1;
+	mov.b32 	%f146, %r68;
+$L__tmp3:
+	.loc	2 233 15
+	add.f32 	%f147, %f138, %f146;
+$L__tmp4:
+	.loc	2 243 36
+	mov.b32 	%r69, %f147;
+	shfl.sync.bfly.b32	%r70, %r69, 8, 31, -1;
+	mov.b32 	%f148, %r70;
+$L__tmp5:
+	.loc	2 233 15
+	add.f32 	%f149, %f147, %f148;
+$L__tmp6:
+	.loc	2 243 36
+	mov.b32 	%r71, %f149;
+	shfl.sync.bfly.b32	%r72, %r71, 4, 31, -1;
+	mov.b32 	%f150, %r72;
+$L__tmp7:
+	.loc	2 233 15
+	add.f32 	%f151, %f149, %f150;
+$L__tmp8:
+	.loc	2 243 36
+	mov.b32 	%r73, %f151;
+	shfl.sync.bfly.b32	%r74, %r73, 2, 31, -1;
+	mov.b32 	%f152, %r74;
+$L__tmp9:
+	.loc	2 233 15
+	add.f32 	%f153, %f151, %f152;
+$L__tmp10:
+	.loc	2 243 36
+	mov.b32 	%r75, %f153;
+	shfl.sync.bfly.b32	%r76, %r75, 1, 31, -1;
+	mov.b32 	%f154, %r76;
+$L__tmp11:
+	.loc	2 233 15
+	add.f32 	%f155, %f153, %f154;
+$L__tmp12:
+	.loc	2 243 36
+	mov.b32 	%r77, %f139;
+	shfl.sync.bfly.b32	%r78, %r77, 16, 31, -1;
+	mov.b32 	%f156, %r78;
+$L__tmp13:
+	.loc	2 233 15
+	add.f32 	%f157, %f139, %f156;
+$L__tmp14:
+	.loc	2 243 36
+	mov.b32 	%r79, %f157;
+	shfl.sync.bfly.b32	%r80, %r79, 8, 31, -1;
+	mov.b32 	%f158, %r80;
+$L__tmp15:
+	.loc	2 233 15
+	add.f32 	%f159, %f157, %f158;
+$L__tmp16:
+	.loc	2 243 36
+	mov.b32 	%r81, %f159;
+	shfl.sync.bfly.b32	%r82, %r81, 4, 31, -1;
+	mov.b32 	%f160, %r82;
+$L__tmp17:
+	.loc	2 233 15
+	add.f32 	%f161, %f159, %f160;
+$L__tmp18:
+	.loc	2 243 36
+	mov.b32 	%r83, %f161;
+	shfl.sync.bfly.b32	%r84, %r83, 2, 31, -1;
+	mov.b32 	%f162, %r84;
+$L__tmp19:
+	.loc	2 233 15
+	add.f32 	%f163, %f161, %f162;
+$L__tmp20:
+	.loc	2 243 36
+	mov.b32 	%r85, %f163;
+	shfl.sync.bfly.b32	%r86, %r85, 1, 31, -1;
+	mov.b32 	%f164, %r86;
+$L__tmp21:
+	.loc	2 233 15
+	add.f32 	%f165, %f163, %f164;
+$L__tmp22:
+	.loc	2 243 36
+	mov.b32 	%r87, %f140;
+	shfl.sync.bfly.b32	%r88, %r87, 16, 31, -1;
+	mov.b32 	%f166, %r88;
+$L__tmp23:
+	.loc	2 233 15
+	add.f32 	%f167, %f140, %f166;
+$L__tmp24:
+	.loc	2 243 36
+	mov.b32 	%r89, %f167;
+	shfl.sync.bfly.b32	%r90, %r89, 8, 31, -1;
+	mov.b32 	%f168, %r90;
+$L__tmp25:
+	.loc	2 233 15
+	add.f32 	%f169, %f167, %f168;
+$L__tmp26:
+	.loc	2 243 36
+	mov.b32 	%r91, %f169;
+	shfl.sync.bfly.b32	%r92, %r91, 4, 31, -1;
+	mov.b32 	%f170, %r92;
+$L__tmp27:
+	.loc	2 233 15
+	add.f32 	%f171, %f169, %f170;
+$L__tmp28:
+	.loc	2 243 36
+	mov.b32 	%r93, %f171;
+	shfl.sync.bfly.b32	%r94, %r93, 2, 31, -1;
+	mov.b32 	%f172, %r94;
+$L__tmp29:
+	.loc	2 233 15
+	add.f32 	%f173, %f171, %f172;
+$L__tmp30:
+	.loc	2 243 36
+	mov.b32 	%r95, %f173;
+	shfl.sync.bfly.b32	%r96, %r95, 1, 31, -1;
+	mov.b32 	%f174, %r96;
+$L__tmp31:
+	.loc	2 233 15
+	add.f32 	%f175, %f173, %f174;
+$L__tmp32:
+	.loc	2 243 36
+	mov.b32 	%r97, %f141;
+	shfl.sync.bfly.b32	%r98, %r97, 16, 31, -1;
+	mov.b32 	%f176, %r98;
+$L__tmp33:
+	.loc	2 233 15
+	add.f32 	%f177, %f141, %f176;
+$L__tmp34:
+	.loc	2 243 36
+	mov.b32 	%r99, %f177;
+	shfl.sync.bfly.b32	%r100, %r99, 8, 31, -1;
+	mov.b32 	%f178, %r100;
+$L__tmp35:
+	.loc	2 233 15
+	add.f32 	%f179, %f177, %f178;
+$L__tmp36:
+	.loc	2 243 36
+	mov.b32 	%r101, %f179;
+	shfl.sync.bfly.b32	%r102, %r101, 4, 31, -1;
+	mov.b32 	%f180, %r102;
+$L__tmp37:
+	.loc	2 233 15
+	add.f32 	%f181, %f179, %f180;
+$L__tmp38:
+	.loc	2 243 36
+	mov.b32 	%r103, %f181;
+	shfl.sync.bfly.b32	%r104, %r103, 2, 31, -1;
+	mov.b32 	%f182, %r104;
+$L__tmp39:
+	.loc	2 233 15
+	add.f32 	%f183, %f181, %f182;
+$L__tmp40:
+	.loc	2 243 36
+	mov.b32 	%r105, %f183;
+	shfl.sync.bfly.b32	%r106, %r105, 1, 31, -1;
+	mov.b32 	%f184, %r106;
+$L__tmp41:
+	.loc	2 233 15
+	add.f32 	%f185, %f183, %f184;
+$L__tmp42:
+	.loc	2 243 36
+	mov.b32 	%r107, %f142;
+	shfl.sync.bfly.b32	%r108, %r107, 16, 31, -1;
+	mov.b32 	%f186, %r108;
+$L__tmp43:
+	.loc	2 233 15
+	add.f32 	%f187, %f142, %f186;
+$L__tmp44:
+	.loc	2 243 36
+	mov.b32 	%r109, %f187;
+	shfl.sync.bfly.b32	%r110, %r109, 8, 31, -1;
+	mov.b32 	%f188, %r110;
+$L__tmp45:
+	.loc	2 233 15
+	add.f32 	%f189, %f187, %f188;
+$L__tmp46:
+	.loc	2 243 36
+	mov.b32 	%r111, %f189;
+	shfl.sync.bfly.b32	%r112, %r111, 4, 31, -1;
+	mov.b32 	%f190, %r112;
+$L__tmp47:
+	.loc	2 233 15
+	add.f32 	%f191, %f189, %f190;
+$L__tmp48:
+	.loc	2 243 36
+	mov.b32 	%r113, %f191;
+	shfl.sync.bfly.b32	%r114, %r113, 2, 31, -1;
+	mov.b32 	%f192, %r114;
+$L__tmp49:
+	.loc	2 233 15
+	add.f32 	%f193, %f191, %f192;
+$L__tmp50:
+	.loc	2 243 36
+	mov.b32 	%r115, %f193;
+	shfl.sync.bfly.b32	%r116, %r115, 1, 31, -1;
+	mov.b32 	%f194, %r116;
+$L__tmp51:
+	.loc	2 233 15
+	add.f32 	%f195, %f193, %f194;
+$L__tmp52:
+	.loc	2 243 36
+	mov.b32 	%r117, %f143;
+	shfl.sync.bfly.b32	%r118, %r117, 16, 31, -1;
+	mov.b32 	%f196, %r118;
+$L__tmp53:
+	.loc	2 233 15
+	add.f32 	%f197, %f143, %f196;
+$L__tmp54:
+	.loc	2 243 36
+	mov.b32 	%r119, %f197;
+	shfl.sync.bfly.b32	%r120, %r119, 8, 31, -1;
+	mov.b32 	%f198, %r120;
+$L__tmp55:
+	.loc	2 233 15
+	add.f32 	%f199, %f197, %f198;
+$L__tmp56:
+	.loc	2 243 36
+	mov.b32 	%r121, %f199;
+	shfl.sync.bfly.b32	%r122, %r121, 4, 31, -1;
+	mov.b32 	%f200, %r122;
+$L__tmp57:
+	.loc	2 233 15
+	add.f32 	%f201, %f199, %f200;
+$L__tmp58:
+	.loc	2 243 36
+	mov.b32 	%r123, %f201;
+	shfl.sync.bfly.b32	%r124, %r123, 2, 31, -1;
+	mov.b32 	%f202, %r124;
+$L__tmp59:
+	.loc	2 233 15
+	add.f32 	%f203, %f201, %f202;
+$L__tmp60:
+	.loc	2 243 36
+	mov.b32 	%r125, %f203;
+	shfl.sync.bfly.b32	%r126, %r125, 1, 31, -1;
+	mov.b32 	%f204, %r126;
+$L__tmp61:
+	.loc	2 233 15
+	add.f32 	%f205, %f203, %f204;
+$L__tmp62:
+	.loc	2 243 36
+	mov.b32 	%r127, %f144;
+	shfl.sync.bfly.b32	%r128, %r127, 16, 31, -1;
+	mov.b32 	%f206, %r128;
+$L__tmp63:
+	.loc	2 233 15
+	add.f32 	%f207, %f144, %f206;
+$L__tmp64:
+	.loc	2 243 36
+	mov.b32 	%r129, %f207;
+	shfl.sync.bfly.b32	%r130, %r129, 8, 31, -1;
+	mov.b32 	%f208, %r130;
+$L__tmp65:
+	.loc	2 233 15
+	add.f32 	%f209, %f207, %f208;
+$L__tmp66:
+	.loc	2 243 36
+	mov.b32 	%r131, %f209;
+	shfl.sync.bfly.b32	%r132, %r131, 4, 31, -1;
+	mov.b32 	%f210, %r132;
+$L__tmp67:
+	.loc	2 233 15
+	add.f32 	%f211, %f209, %f210;
+$L__tmp68:
+	.loc	2 243 36
+	mov.b32 	%r133, %f211;
+	shfl.sync.bfly.b32	%r134, %r133, 2, 31, -1;
+	mov.b32 	%f212, %r134;
+$L__tmp69:
+	.loc	2 233 15
+	add.f32 	%f213, %f211, %f212;
+$L__tmp70:
+	.loc	2 243 36
+	mov.b32 	%r135, %f213;
+	shfl.sync.bfly.b32	%r136, %r135, 1, 31, -1;
+	mov.b32 	%f214, %r136;
+$L__tmp71:
+	.loc	2 233 15
+	add.f32 	%f215, %f213, %f214;
+$L__tmp72:
+	.loc	2 243 36
+	mov.b32 	%r137, %f145;
+	shfl.sync.bfly.b32	%r138, %r137, 16, 31, -1;
+	mov.b32 	%f216, %r138;
+$L__tmp73:
+	.loc	2 233 15
+	add.f32 	%f217, %f145, %f216;
+$L__tmp74:
+	.loc	2 243 36
+	mov.b32 	%r139, %f217;
+	shfl.sync.bfly.b32	%r140, %r139, 8, 31, -1;
+	mov.b32 	%f218, %r140;
+$L__tmp75:
+	.loc	2 233 15
+	add.f32 	%f219, %f217, %f218;
+$L__tmp76:
+	.loc	2 243 36
+	mov.b32 	%r141, %f219;
+	shfl.sync.bfly.b32	%r142, %r141, 4, 31, -1;
+	mov.b32 	%f220, %r142;
+$L__tmp77:
+	.loc	2 233 15
+	add.f32 	%f221, %f219, %f220;
+$L__tmp78:
+	.loc	2 243 36
+	mov.b32 	%r143, %f221;
+	shfl.sync.bfly.b32	%r144, %r143, 2, 31, -1;
+	mov.b32 	%f222, %r144;
+$L__tmp79:
+	.loc	2 233 15
+	add.f32 	%f223, %f221, %f222;
+$L__tmp80:
+	.loc	2 243 36
+	mov.b32 	%r145, %f223;
+	shfl.sync.bfly.b32	%r146, %r145, 1, 31, -1;
+	mov.b32 	%f224, %r146;
+$L__tmp81:
+	.loc	2 233 15
+	add.f32 	%f225, %f223, %f224;
+$L__tmp82:
+	.loc	2 243 36
+	setp.eq.s32 	%p52, %r65, 0;
+	shl.b32 	%r147, %r66, 2;
+	mov.u32 	%r148, global_smem;
+	add.s32 	%r45, %r148, %r147;
+	mov.b32 	%r46, %f155;
+	@%p52 st.shared.b32 [ %r45 + 0 ], %r46;
+	add.s32 	%r47, %r45, 32;
+	mov.b32 	%r48, %f165;
+	@%p52 st.shared.b32 [ %r47 + 0 ], %r48;
+	add.s32 	%r49, %r45, 64;
+	mov.b32 	%r50, %f175;
+	@%p52 st.shared.b32 [ %r49 + 0 ], %r50;
+	add.s32 	%r51, %r45, 96;
+	mov.b32 	%r52, %f185;
+	@%p52 st.shared.b32 [ %r51 + 0 ], %r52;
+	add.s32 	%r53, %r45, 128;
+	mov.b32 	%r54, %f195;
+	@%p52 st.shared.b32 [ %r53 + 0 ], %r54;
+	add.s32 	%r55, %r45, 160;
+	mov.b32 	%r56, %f205;
+	@%p52 st.shared.b32 [ %r55 + 0 ], %r56;
+	add.s32 	%r57, %r45, 192;
+	mov.b32 	%r58, %f215;
+	@%p52 st.shared.b32 [ %r57 + 0 ], %r58;
+	add.s32 	%r59, %r45, 224;
+	mov.b32 	%r60, %f225;
+	@%p52 st.shared.b32 [ %r59 + 0 ], %r60;
+	bar.sync 	0;
+	setp.lt.s32 	%p60, %r1, 64;
+	shl.b32 	%r149, %r1, 2;
+	add.s32 	%r62, %r148, %r149;
+	@%p60 ld.shared.b32 %r61, [ %r62 + 0 ];
+	mov.b32 	%f226, %r61;
+	shfl.sync.bfly.b32	%r150, %r61, 4, 31, -1;
+	mov.b32 	%f227, %r150;
+$L__tmp83:
+	.loc	2 233 15
+	add.f32 	%f228, %f226, %f227;
+$L__tmp84:
+	.loc	2 243 36
+	mov.b32 	%r151, %f228;
+	shfl.sync.bfly.b32	%r152, %r151, 2, 31, -1;
+	mov.b32 	%f229, %r152;
+$L__tmp85:
+	.loc	2 233 15
+	add.f32 	%f230, %f228, %f229;
+$L__tmp86:
+	.loc	2 243 36
+	mov.b32 	%r153, %f230;
+	shfl.sync.bfly.b32	%r154, %r153, 1, 31, -1;
+	mov.b32 	%f231, %r154;
+$L__tmp87:
+	.loc	2 233 15
+	add.f32 	%f232, %f230, %f231;
+$L__tmp88:
+	.loc	2 243 36
+	and.b32  	%r155, %r1, 7;
+	setp.eq.s32 	%p62, %r155, 0;
+	and.pred  	%p61, %p60, %p62;
+	mov.b32 	%r64, %f232;
+	@%p61 st.shared.b32 [ %r62 + 0 ], %r64;
+	bar.sync 	0;
+	ld.shared.f32 	%f57, [global_smem];
+	ld.shared.f32 	%f58, [global_smem+32];
+	ld.shared.f32 	%f59, [global_smem+64];
+	ld.shared.f32 	%f60, [global_smem+96];
+	ld.shared.f32 	%f61, [global_smem+128];
+	ld.shared.f32 	%f62, [global_smem+160];
+	ld.shared.f32 	%f63, [global_smem+192];
+	ld.shared.f32 	%f64, [global_smem+224];
+$L__tmp89:
+	.loc	1 51 36
+	mul.lo.s64 	%rd10, %rd1, 804112;
+	shl.b64 	%rd88, %rd3, 1;
+	add.s64 	%rd164, %rd39, %rd88;
+	add.s64 	%rd163, %rd38, %rd88;
+	shl.b64 	%rd13, %rd3, 2;
+	mul.lo.s64 	%rd89, %rd1, 1608224;
+	add.s64 	%rd162, %rd36, %rd89;
+	add.s64 	%rd161, %rd37, %rd88;
+	shl.b64 	%rd90, %rd2, 1;
+	add.s64 	%rd160, %rd39, %rd90;
+	add.s64 	%rd159, %rd38, %rd90;
+	shl.b64 	%rd18, %rd2, 2;
+	add.s64 	%rd158, %rd37, %rd90;
+	mov.u64 	%rd165, 0;
+	mov.u16 	%rs2, 0;
+$L__BB0_3:
+	.loc	1 52 27
+	add.s64 	%rd155, %rd2, %rd165;
+	.loc	1 53 25
+	add.s64 	%rd156, %rd3, %rd165;
+	setp.lt.u64 	%p63, %rd155, 50257;
+	setp.lt.u64 	%p65, %rd156, 50257;
+	.loc	1 55 35
+	add.s64 	%rd91, %rd158, %rd10;
+	add.s64 	%rd92, %rd161, %rd10;
+	add.s64 	%rd93, %rd91, 100514;
+	add.s64 	%rd94, %rd92, 100514;
+	add.s64 	%rd95, %rd91, 201028;
+	add.s64 	%rd96, %rd92, 201028;
+	add.s64 	%rd97, %rd91, 301542;
+	add.s64 	%rd98, %rd92, 301542;
+	add.s64 	%rd99, %rd91, 402056;
+	add.s64 	%rd100, %rd92, 402056;
+	add.s64 	%rd101, %rd91, 502570;
+	add.s64 	%rd102, %rd92, 502570;
+	add.s64 	%rd103, %rd91, 603084;
+	add.s64 	%rd104, %rd92, 603084;
+	add.s64 	%rd105, %rd91, 703598;
+	.loc	1 55 53
+	add.s64 	%rd106, %rd92, 703598;
+	mov.u16 %rs1, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs1 }, [ %rd91 + 0 ];
+	@!%p63 mov.u16 %rs1, %rs2;
+	mov.u16 %rs3, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs3 }, [ %rd92 + 0 ];
+	@!%p65 mov.u16 %rs3, %rs2;
+	mov.u16 %rs5, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs5 }, [ %rd93 + 0 ];
+	@!%p63 mov.u16 %rs5, %rs2;
+	mov.u16 %rs7, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs7 }, [ %rd94 + 0 ];
+	@!%p65 mov.u16 %rs7, %rs2;
+	mov.u16 %rs9, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs9 }, [ %rd95 + 0 ];
+	@!%p63 mov.u16 %rs9, %rs2;
+	mov.u16 %rs11, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs11 }, [ %rd96 + 0 ];
+	@!%p65 mov.u16 %rs11, %rs2;
+	mov.u16 %rs13, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs13 }, [ %rd97 + 0 ];
+	@!%p63 mov.u16 %rs13, %rs2;
+	mov.u16 %rs15, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs15 }, [ %rd98 + 0 ];
+	@!%p65 mov.u16 %rs15, %rs2;
+	mov.u16 %rs17, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs17 }, [ %rd99 + 0 ];
+	@!%p63 mov.u16 %rs17, %rs2;
+	mov.u16 %rs19, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs19 }, [ %rd100 + 0 ];
+	@!%p65 mov.u16 %rs19, %rs2;
+	mov.u16 %rs21, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs21 }, [ %rd101 + 0 ];
+	@!%p63 mov.u16 %rs21, %rs2;
+	mov.u16 %rs23, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs23 }, [ %rd102 + 0 ];
+	@!%p65 mov.u16 %rs23, %rs2;
+	mov.u16 %rs25, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs25 }, [ %rd103 + 0 ];
+	@!%p63 mov.u16 %rs25, %rs2;
+	mov.u16 %rs27, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs27 }, [ %rd104 + 0 ];
+	@!%p65 mov.u16 %rs27, %rs2;
+	mov.u16 %rs29, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs29 }, [ %rd105 + 0 ];
+	@!%p63 mov.u16 %rs29, %rs2;
+	mov.u16 %rs31, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs31 }, [ %rd106 + 0 ];
+	@!%p65 mov.u16 %rs31, %rs2;
+	.loc	1 55 105
+	cvt.f32.bf16 %r156, %rs1;
+	mov.b32 	%f265, %r156;
+	cvt.f32.bf16 %r157, %rs3;
+	mov.b32 	%f266, %r157;
+	cvt.f32.bf16 %r158, %rs5;
+	mov.b32 	%f267, %r158;
+	cvt.f32.bf16 %r159, %rs7;
+	mov.b32 	%f268, %r159;
+	cvt.f32.bf16 %r160, %rs9;
+	mov.b32 	%f269, %r160;
+	cvt.f32.bf16 %r161, %rs11;
+	mov.b32 	%f270, %r161;
+	cvt.f32.bf16 %r162, %rs13;
+	mov.b32 	%f271, %r162;
+	cvt.f32.bf16 %r163, %rs15;
+	mov.b32 	%f272, %r163;
+	cvt.f32.bf16 %r164, %rs17;
+	mov.b32 	%f273, %r164;
+	cvt.f32.bf16 %r165, %rs19;
+	mov.b32 	%f274, %r165;
+	cvt.f32.bf16 %r166, %rs21;
+	mov.b32 	%f275, %r166;
+	cvt.f32.bf16 %r167, %rs23;
+	mov.b32 	%f276, %r167;
+	cvt.f32.bf16 %r168, %rs25;
+	mov.b32 	%f277, %r168;
+	cvt.f32.bf16 %r169, %rs27;
+	mov.b32 	%f278, %r169;
+	cvt.f32.bf16 %r170, %rs29;
+	mov.b32 	%f279, %r170;
+	cvt.f32.bf16 %r171, %rs31;
+	mov.b32 	%f280, %r171;
+	.loc	1 56 35
+	add.s64 	%rd107, %rd162, %rd18;
+	add.s64 	%rd108, %rd162, %rd13;
+	add.s64 	%rd109, %rd107, 201028;
+	add.s64 	%rd110, %rd108, 201028;
+	add.s64 	%rd111, %rd107, 402056;
+	add.s64 	%rd112, %rd108, 402056;
+	add.s64 	%rd113, %rd107, 603084;
+	add.s64 	%rd114, %rd108, 603084;
+	add.s64 	%rd115, %rd107, 804112;
+	add.s64 	%rd116, %rd108, 804112;
+	add.s64 	%rd117, %rd107, 1005140;
+	add.s64 	%rd118, %rd108, 1005140;
+	add.s64 	%rd119, %rd107, 1206168;
+	add.s64 	%rd120, %rd108, 1206168;
+	add.s64 	%rd121, %rd107, 1407196;
+	.loc	1 56 53
+	add.s64 	%rd122, %rd108, 1407196;
+	mov.u32 %r172, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r172 }, [ %rd107 + 0 ];
+	@!%p63 mov.u32 %r172, %r173;
+	mov.b32 	%f281, %r172;
+	mov.u32 %r174, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r174 }, [ %rd108 + 0 ];
+	@!%p65 mov.u32 %r174, %r173;
+	mov.b32 	%f282, %r174;
+	mov.u32 %r176, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r176 }, [ %rd109 + 0 ];
+	@!%p63 mov.u32 %r176, %r173;
+	mov.b32 	%f283, %r176;
+	mov.u32 %r178, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r178 }, [ %rd110 + 0 ];
+	@!%p65 mov.u32 %r178, %r173;
+	mov.b32 	%f284, %r178;
+	mov.u32 %r180, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r180 }, [ %rd111 + 0 ];
+	@!%p63 mov.u32 %r180, %r173;
+	mov.b32 	%f285, %r180;
+	mov.u32 %r182, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r182 }, [ %rd112 + 0 ];
+	@!%p65 mov.u32 %r182, %r173;
+	mov.b32 	%f286, %r182;
+	mov.u32 %r184, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r184 }, [ %rd113 + 0 ];
+	@!%p63 mov.u32 %r184, %r173;
+	mov.b32 	%f287, %r184;
+	mov.u32 %r186, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r186 }, [ %rd114 + 0 ];
+	@!%p65 mov.u32 %r186, %r173;
+	mov.b32 	%f288, %r186;
+	mov.u32 %r188, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r188 }, [ %rd115 + 0 ];
+	@!%p63 mov.u32 %r188, %r173;
+	mov.b32 	%f289, %r188;
+	mov.u32 %r190, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r190 }, [ %rd116 + 0 ];
+	@!%p65 mov.u32 %r190, %r173;
+	mov.b32 	%f290, %r190;
+	mov.u32 %r192, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r192 }, [ %rd117 + 0 ];
+	@!%p63 mov.u32 %r192, %r173;
+	mov.b32 	%f291, %r192;
+	mov.u32 %r194, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r194 }, [ %rd118 + 0 ];
+	@!%p65 mov.u32 %r194, %r173;
+	mov.b32 	%f292, %r194;
+	mov.u32 %r196, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r196 }, [ %rd119 + 0 ];
+	@!%p63 mov.u32 %r196, %r173;
+	mov.b32 	%f293, %r196;
+	mov.u32 %r198, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r198 }, [ %rd120 + 0 ];
+	@!%p65 mov.u32 %r198, %r173;
+	mov.b32 	%f294, %r198;
+	mov.u32 %r200, 0x0;
+	@%p63 ld.global.L1::evict_first.b32 { %r200 }, [ %rd121 + 0 ];
+	@!%p63 mov.u32 %r200, %r173;
+	mov.b32 	%f295, %r200;
+	mov.u32 %r202, 0x0;
+	@%p65 ld.global.L1::evict_first.b32 { %r202 }, [ %rd122 + 0 ];
+	@!%p65 mov.u32 %r202, %r173;
+	mov.b32 	%f296, %r202;
+	.loc	1 57 35
+	add.s64 	%rd123, %rd159, %rd10;
+	add.s64 	%rd124, %rd163, %rd10;
+	add.s64 	%rd125, %rd123, 100514;
+	add.s64 	%rd126, %rd124, 100514;
+	add.s64 	%rd127, %rd123, 201028;
+	add.s64 	%rd128, %rd124, 201028;
+	add.s64 	%rd129, %rd123, 301542;
+	add.s64 	%rd130, %rd124, 301542;
+	add.s64 	%rd131, %rd123, 402056;
+	add.s64 	%rd132, %rd124, 402056;
+	add.s64 	%rd133, %rd123, 502570;
+	add.s64 	%rd134, %rd124, 502570;
+	add.s64 	%rd135, %rd123, 603084;
+	add.s64 	%rd136, %rd124, 603084;
+	add.s64 	%rd137, %rd123, 703598;
+	.loc	1 57 53
+	add.s64 	%rd138, %rd124, 703598;
+	mov.u16 %rs49, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs49 }, [ %rd123 + 0 ];
+	@!%p63 mov.u16 %rs49, %rs2;
+	mov.u16 %rs51, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs51 }, [ %rd124 + 0 ];
+	@!%p65 mov.u16 %rs51, %rs2;
+	mov.u16 %rs53, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs53 }, [ %rd125 + 0 ];
+	@!%p63 mov.u16 %rs53, %rs2;
+	mov.u16 %rs55, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs55 }, [ %rd126 + 0 ];
+	@!%p65 mov.u16 %rs55, %rs2;
+	mov.u16 %rs57, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs57 }, [ %rd127 + 0 ];
+	@!%p63 mov.u16 %rs57, %rs2;
+	mov.u16 %rs59, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs59 }, [ %rd128 + 0 ];
+	@!%p65 mov.u16 %rs59, %rs2;
+	mov.u16 %rs61, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs61 }, [ %rd129 + 0 ];
+	@!%p63 mov.u16 %rs61, %rs2;
+	mov.u16 %rs63, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs63 }, [ %rd130 + 0 ];
+	@!%p65 mov.u16 %rs63, %rs2;
+	mov.u16 %rs65, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs65 }, [ %rd131 + 0 ];
+	@!%p63 mov.u16 %rs65, %rs2;
+	mov.u16 %rs67, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs67 }, [ %rd132 + 0 ];
+	@!%p65 mov.u16 %rs67, %rs2;
+	mov.u16 %rs69, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs69 }, [ %rd133 + 0 ];
+	@!%p63 mov.u16 %rs69, %rs2;
+	mov.u16 %rs71, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs71 }, [ %rd134 + 0 ];
+	@!%p65 mov.u16 %rs71, %rs2;
+	mov.u16 %rs73, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs73 }, [ %rd135 + 0 ];
+	@!%p63 mov.u16 %rs73, %rs2;
+	mov.u16 %rs75, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs75 }, [ %rd136 + 0 ];
+	@!%p65 mov.u16 %rs75, %rs2;
+	mov.u16 %rs77, 0x0;
+	@%p63 ld.global.L1::evict_first.b16 { %rs77 }, [ %rd137 + 0 ];
+	@!%p63 mov.u16 %rs77, %rs2;
+	mov.u16 %rs79, 0x0;
+	@%p65 ld.global.L1::evict_first.b16 { %rs79 }, [ %rd138 + 0 ];
+	@!%p65 mov.u16 %rs79, %rs2;
+	.loc	1 57 105
+	cvt.f32.bf16 %r204, %rs49;
+	mov.b32 	%f297, %r204;
+	cvt.f32.bf16 %r205, %rs51;
+	mov.b32 	%f298, %r205;
+	cvt.f32.bf16 %r206, %rs53;
+	mov.b32 	%f299, %r206;
+	cvt.f32.bf16 %r207, %rs55;
+	mov.b32 	%f300, %r207;
+	cvt.f32.bf16 %r208, %rs57;
+	mov.b32 	%f301, %r208;
+	cvt.f32.bf16 %r209, %rs59;
+	mov.b32 	%f302, %r209;
+	cvt.f32.bf16 %r210, %rs61;
+	mov.b32 	%f303, %r210;
+	cvt.f32.bf16 %r211, %rs63;
+	mov.b32 	%f304, %r211;
+	cvt.f32.bf16 %r212, %rs65;
+	mov.b32 	%f305, %r212;
+	cvt.f32.bf16 %r213, %rs67;
+	mov.b32 	%f306, %r213;
+	cvt.f32.bf16 %r214, %rs69;
+	mov.b32 	%f307, %r214;
+	cvt.f32.bf16 %r215, %rs71;
+	mov.b32 	%f308, %r215;
+	cvt.f32.bf16 %r216, %rs73;
+	mov.b32 	%f309, %r216;
+	cvt.f32.bf16 %r217, %rs75;
+	mov.b32 	%f310, %r217;
+	cvt.f32.bf16 %r218, %rs77;
+	mov.b32 	%f311, %r218;
+	cvt.f32.bf16 %r219, %rs79;
+	mov.b32 	%f312, %r219;
+	.loc	1 65 23
+	mul.f32 	%f234, %f297, 0f3FB8AA3B;
+	ex2.approx.f32 %f233, %f234;
+	mul.f32 	%f236, %f298, 0f3FB8AA3B;
+	ex2.approx.f32 %f235, %f236;
+	mul.f32 	%f238, %f299, 0f3FB8AA3B;
+	ex2.approx.f32 %f237, %f238;
+	mul.f32 	%f240, %f300, 0f3FB8AA3B;
+	ex2.approx.f32 %f239, %f240;
+	mul.f32 	%f242, %f301, 0f3FB8AA3B;
+	ex2.approx.f32 %f241, %f242;
+	mul.f32 	%f244, %f302, 0f3FB8AA3B;
+	ex2.approx.f32 %f243, %f244;
+	mul.f32 	%f246, %f303, 0f3FB8AA3B;
+	ex2.approx.f32 %f245, %f246;
+	mul.f32 	%f248, %f304, 0f3FB8AA3B;
+	ex2.approx.f32 %f247, %f248;
+	mul.f32 	%f250, %f305, 0f3FB8AA3B;
+	ex2.approx.f32 %f249, %f250;
+	mul.f32 	%f252, %f306, 0f3FB8AA3B;
+	ex2.approx.f32 %f251, %f252;
+	mul.f32 	%f254, %f307, 0f3FB8AA3B;
+	ex2.approx.f32 %f253, %f254;
+	mul.f32 	%f256, %f308, 0f3FB8AA3B;
+	ex2.approx.f32 %f255, %f256;
+	mul.f32 	%f258, %f309, 0f3FB8AA3B;
+	ex2.approx.f32 %f257, %f258;
+	mul.f32 	%f260, %f310, 0f3FB8AA3B;
+	ex2.approx.f32 %f259, %f260;
+	mul.f32 	%f262, %f311, 0f3FB8AA3B;
+	ex2.approx.f32 %f261, %f262;
+	mul.f32 	%f264, %f312, 0f3FB8AA3B;
+	ex2.approx.f32 %f263, %f264;
+	.loc	1 66 24
+	mul.f32 	%f313, %f57, %f233;
+	mul.f32 	%f314, %f57, %f235;
+	mul.f32 	%f315, %f58, %f237;
+	mul.f32 	%f316, %f58, %f239;
+	mul.f32 	%f317, %f59, %f241;
+	mul.f32 	%f318, %f59, %f243;
+	mul.f32 	%f319, %f60, %f245;
+	mul.f32 	%f320, %f60, %f247;
+	mul.f32 	%f321, %f61, %f249;
+	mul.f32 	%f322, %f61, %f251;
+	mul.f32 	%f323, %f62, %f253;
+	mul.f32 	%f324, %f62, %f255;
+	mul.f32 	%f325, %f63, %f257;
+	mul.f32 	%f326, %f63, %f259;
+	mul.f32 	%f327, %f64, %f261;
+	mul.f32 	%f328, %f64, %f263;
+	.loc	1 67 24
+	neg.f32 	%f329, %f313;
+	fma.rn.f32 	%f330, %f1, %f281, %f329;
+	neg.f32 	%f331, %f314;
+	fma.rn.f32 	%f332, %f1, %f282, %f331;
+	neg.f32 	%f333, %f315;
+	fma.rn.f32 	%f334, %f2, %f283, %f333;
+	neg.f32 	%f335, %f316;
+	fma.rn.f32 	%f336, %f2, %f284, %f335;
+	neg.f32 	%f337, %f317;
+	fma.rn.f32 	%f338, %f3, %f285, %f337;
+	neg.f32 	%f339, %f318;
+	fma.rn.f32 	%f340, %f3, %f286, %f339;
+	neg.f32 	%f341, %f319;
+	fma.rn.f32 	%f342, %f4, %f287, %f341;
+	neg.f32 	%f343, %f320;
+	fma.rn.f32 	%f344, %f4, %f288, %f343;
+	neg.f32 	%f345, %f321;
+	fma.rn.f32 	%f346, %f5, %f289, %f345;
+	neg.f32 	%f347, %f322;
+	fma.rn.f32 	%f348, %f5, %f290, %f347;
+	neg.f32 	%f349, %f323;
+	fma.rn.f32 	%f350, %f6, %f291, %f349;
+	neg.f32 	%f351, %f324;
+	fma.rn.f32 	%f352, %f6, %f292, %f351;
+	neg.f32 	%f353, %f325;
+	fma.rn.f32 	%f354, %f7, %f293, %f353;
+	neg.f32 	%f355, %f326;
+	fma.rn.f32 	%f356, %f7, %f294, %f355;
+	neg.f32 	%f357, %f327;
+	fma.rn.f32 	%f358, %f8, %f295, %f357;
+	neg.f32 	%f359, %f328;
+	fma.rn.f32 	%f360, %f8, %f296, %f359;
+	.loc	1 69 24
+	add.f32 	%f361, %f265, %f330;
+	add.f32 	%f362, %f266, %f332;
+	add.f32 	%f363, %f267, %f334;
+	add.f32 	%f364, %f268, %f336;
+	add.f32 	%f365, %f269, %f338;
+	add.f32 	%f366, %f270, %f340;
+	add.f32 	%f367, %f271, %f342;
+	add.f32 	%f368, %f272, %f344;
+	add.f32 	%f369, %f273, %f346;
+	add.f32 	%f370, %f274, %f348;
+	add.f32 	%f371, %f275, %f350;
+	add.f32 	%f372, %f276, %f352;
+	add.f32 	%f373, %f277, %f354;
+	add.f32 	%f374, %f278, %f356;
+	add.f32 	%f375, %f279, %f358;
+	add.f32 	%f376, %f280, %f360;
+	.loc	1 70 29
+	add.s64 	%rd139, %rd160, %rd10;
+	add.s64 	%rd140, %rd164, %rd10;
+	add.s64 	%rd141, %rd139, 100514;
+	add.s64 	%rd142, %rd140, 100514;
+	add.s64 	%rd143, %rd139, 201028;
+	add.s64 	%rd144, %rd140, 201028;
+	add.s64 	%rd145, %rd139, 301542;
+	add.s64 	%rd146, %rd140, 301542;
+	add.s64 	%rd147, %rd139, 402056;
+	add.s64 	%rd148, %rd140, 402056;
+	add.s64 	%rd149, %rd139, 502570;
+	add.s64 	%rd150, %rd140, 502570;
+	add.s64 	%rd151, %rd139, 603084;
+	add.s64 	%rd152, %rd140, 603084;
+	add.s64 	%rd153, %rd139, 703598;
+	.loc	1 70 54
+	add.s64 	%rd154, %rd140, 703598;
+	mov.b32 	%r220, %f361;
+	cvt.rn.bf16.f32 %rs97, %r220;
+	mov.b32 	%r221, %f362;
+	cvt.rn.bf16.f32 %rs98, %r221;
+	mov.b32 	%r222, %f363;
+	cvt.rn.bf16.f32 %rs99, %r222;
+	mov.b32 	%r223, %f364;
+	cvt.rn.bf16.f32 %rs100, %r223;
+	mov.b32 	%r224, %f365;
+	cvt.rn.bf16.f32 %rs101, %r224;
+	mov.b32 	%r225, %f366;
+	cvt.rn.bf16.f32 %rs102, %r225;
+	mov.b32 	%r226, %f367;
+	cvt.rn.bf16.f32 %rs103, %r226;
+	mov.b32 	%r227, %f368;
+	cvt.rn.bf16.f32 %rs104, %r227;
+	mov.b32 	%r228, %f369;
+	cvt.rn.bf16.f32 %rs105, %r228;
+	mov.b32 	%r229, %f370;
+	cvt.rn.bf16.f32 %rs106, %r229;
+	mov.b32 	%r230, %f371;
+	cvt.rn.bf16.f32 %rs107, %r230;
+	mov.b32 	%r231, %f372;
+	cvt.rn.bf16.f32 %rs108, %r231;
+	mov.b32 	%r232, %f373;
+	cvt.rn.bf16.f32 %rs109, %r232;
+	mov.b32 	%r233, %f374;
+	cvt.rn.bf16.f32 %rs110, %r233;
+	mov.b32 	%r234, %f375;
+	cvt.rn.bf16.f32 %rs111, %r234;
+	mov.b32 	%r235, %f376;
+	cvt.rn.bf16.f32 %rs112, %r235;
+	@%p63 st.global.b16 [ %rd139 + 0 ], { %rs97 };
+	@%p65 st.global.b16 [ %rd140 + 0 ], { %rs98 };
+	@%p63 st.global.b16 [ %rd141 + 0 ], { %rs99 };
+	@%p65 st.global.b16 [ %rd142 + 0 ], { %rs100 };
+	@%p63 st.global.b16 [ %rd143 + 0 ], { %rs101 };
+	@%p65 st.global.b16 [ %rd144 + 0 ], { %rs102 };
+	@%p63 st.global.b16 [ %rd145 + 0 ], { %rs103 };
+	@%p65 st.global.b16 [ %rd146 + 0 ], { %rs104 };
+	@%p63 st.global.b16 [ %rd147 + 0 ], { %rs105 };
+	@%p65 st.global.b16 [ %rd148 + 0 ], { %rs106 };
+	@%p63 st.global.b16 [ %rd149 + 0 ], { %rs107 };
+	@%p65 st.global.b16 [ %rd150 + 0 ], { %rs108 };
+	@%p63 st.global.b16 [ %rd151 + 0 ], { %rs109 };
+	@%p65 st.global.b16 [ %rd152 + 0 ], { %rs110 };
+	@%p63 st.global.b16 [ %rd153 + 0 ], { %rs111 };
+	@%p65 st.global.b16 [ %rd154 + 0 ], { %rs112 };
+	.loc	1 51 36
+	add.s64 	%rd165, %rd165, 512;
+	cvt.u32.u64 	%r236, %rd165;
+	add.s32 	%r237, %r236, -512;
+	add.s64 	%rd164, %rd164, 1024;
+	add.s64 	%rd163, %rd163, 1024;
+	add.s64 	%rd162, %rd162, 2048;
+	add.s64 	%rd161, %rd161, 1024;
+	add.s64 	%rd160, %rd160, 1024;
+	add.s64 	%rd159, %rd159, 1024;
+	add.s64 	%rd158, %rd158, 1024;
+	setp.lt.u32 	%p175, %r237, 49745;
+	@%p175 bra 	$L__BB0_3;
+	.loc	1 51 4
+	ret;
+$L__tmp90:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/kz/ckzgl7thb4xdfkfnd2tidks6mt5f3hauwfyjflbtzyepo5oxkvhk.py"
+	.file	2 "/usr/local/lib/python3.10/dist-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
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+.b8 1
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+.b8 49
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+.b8 1
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+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 278
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
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+.b8 120
+.b8 107
+.b8 118
+.b8 104
+.b8 107
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
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+.b8 104
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+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 107
+.b8 122
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
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+.b8 55
+.b8 100
+.b8 101
+.b8 56
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 1
+.b8 3
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b32 125
+.b8 4
+.b32 125
+.b64 $L__tmp1
+.b64 $L__tmp88
+.b8 2
+.b8 46
+.b8 27
+.b8 5
+.b32 125
+.b64 $L__tmp1
+.b64 $L__tmp88
+.b8 2
+.b8 243
+.b8 36
+.b8 0
+.b8 5
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp89
+.b8 2
+.b8 46
+.b8 27
+.b8 0
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 282
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
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+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 53
+.b8 100
+.b8 54
+.b8 100
+.b8 55
+.b8 100
+.b8 101
+.b8 56
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 282
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.ttgir b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..67460b3d72f02faf084ee559389c01bbc18a939f
--- /dev/null
+++ b/.triton/dump/33dcd7dc40e8b1089e9a4c61a9c826b5/triton_.ttgir
@@ -0,0 +1,92 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 8], order = [1, 0], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2d3d4d5d6d7de8(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg7: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}, %arg8: i64) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<8x1xf32, #blocked>
+    %cst_0 = arith.constant dense<50257> : tensor<8x1xi64, #blocked>
+    %cst_1 = arith.constant dense<-1> : tensor<8x1xi64, #blocked>
+    %cst_2 = arith.constant dense<0.000000e+00> : tensor<8x512xf32, #blocked>
+    %c8_i64 = arith.constant 8 : i64
+    %cst_3 = arith.constant dense<50257> : tensor<1x512xi64, #blocked>
+    %c0_i32 = arith.constant 0 : i32
+    %c512_i32 = arith.constant 512 : i32
+    %c50257_i32 = arith.constant 50257 : i32
+    %cst_4 = arith.constant dense<0.000000e+00> : tensor<8x512xbf16, #blocked>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c8_i64 : i64
+    %3 = tt.make_range {end = 8 : i32, start = 0 : i32} : tensor<8xi32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %4 = tt.expand_dims %3 {axis = 1 : i32} : (tensor<8xi32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<8x1xi32, #blocked>
+    %5 = arith.extsi %4 : tensor<8x1xi32, #blocked> to tensor<8x1xi64, #blocked>
+    %6 = tt.splat %2 : (i64) -> tensor<8x1xi64, #blocked>
+    %7 = arith.addi %6, %5 : tensor<8x1xi64, #blocked>
+    %8 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>
+    %9 = tt.expand_dims %8 {axis = 0 : i32} : (tensor<512xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>) -> tensor<1x512xi32, #blocked>
+    %10 = arith.extsi %9 : tensor<1x512xi32, #blocked> to tensor<1x512xi64, #blocked>
+    %11 = tt.splat %arg1 : (!tt.ptr<i64, 1>) -> tensor<8x1x!tt.ptr<i64, 1>, #blocked>
+    %12 = tt.addptr %11, %7 : tensor<8x1x!tt.ptr<i64, 1>, #blocked>, tensor<8x1xi64, #blocked>
+    %13 = tt.load %12 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<8x1xi64, #blocked>
+    %14 = tt.addptr %arg2, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %15 = tt.load %14 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %16 = tt.addptr %arg3, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %17 = tt.load %16 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %18 = arith.muli %7, %cst_0 : tensor<8x1xi64, #blocked>
+    %19 = tt.broadcast %18 : (tensor<8x1xi64, #blocked>) -> tensor<8x512xi64, #blocked>
+    %20 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<8x512x!tt.ptr<f32, 1>, #blocked>
+    %21 = arith.cmpi ne, %13, %cst_1 : tensor<8x1xi64, #blocked>
+    %22 = arith.divf %15, %17 : f32
+    %23 = tt.splat %22 : (f32) -> tensor<8x1xf32, #blocked>
+    %24 = arith.select %21, %23, %cst : tensor<8x1xi1, #blocked>, tensor<8x1xf32, #blocked>
+    %25 = tt.broadcast %24 : (tensor<8x1xf32, #blocked>) -> tensor<8x512xf32, #blocked>
+    %26 = scf.for %arg9 = %c0_i32 to %c50257_i32 step %c512_i32 iter_args(%arg10 = %cst_2) -> (tensor<8x512xf32, #blocked>)  : i32 {
+      %33 = arith.extsi %arg9 : i32 to i64
+      %34 = tt.splat %33 : (i64) -> tensor<1x512xi64, #blocked>
+      %35 = arith.addi %34, %10 : tensor<1x512xi64, #blocked>
+      %36 = arith.cmpi slt, %35, %cst_3 : tensor<1x512xi64, #blocked>
+      %37 = tt.broadcast %35 : (tensor<1x512xi64, #blocked>) -> tensor<8x512xi64, #blocked>
+      %38 = arith.addi %37, %19 : tensor<8x512xi64, #blocked>
+      %39 = tt.addptr %20, %38 : tensor<8x512x!tt.ptr<f32, 1>, #blocked>, tensor<8x512xi64, #blocked>
+      %40 = tt.broadcast %36 : (tensor<1x512xi1, #blocked>) -> tensor<8x512xi1, #blocked>
+      %41 = tt.load %39, %40, %cst_2 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<8x512xf32, #blocked>
+      %42 = arith.mulf %41, %25 : tensor<8x512xf32, #blocked>
+      %43 = arith.addf %arg10, %42 : tensor<8x512xf32, #blocked>
+      %44 = arith.select %40, %43, %arg10 : tensor<8x512xi1, #blocked>, tensor<8x512xf32, #blocked>
+      scf.yield %44 : tensor<8x512xf32, #blocked>
+    }
+    %27 = "tt.reduce"(%26) <{axis = 1 : i32}> ({
+    ^bb0(%arg9: f32, %arg10: f32):
+      %33 = arith.addf %arg9, %arg10 : f32
+      tt.reduce.return %33 : f32
+    }) : (tensor<8x512xf32, #blocked>) -> tensor<8xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %28 = tt.expand_dims %27 {axis = 1 : i32} : (tensor<8xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<8x1xf32, #blocked>
+    %29 = tt.splat %arg4 : (!tt.ptr<bf16, 1>) -> tensor<8x512x!tt.ptr<bf16, 1>, #blocked>
+    %30 = tt.splat %arg5 : (!tt.ptr<bf16, 1>) -> tensor<8x512x!tt.ptr<bf16, 1>, #blocked>
+    %31 = tt.broadcast %28 : (tensor<8x1xf32, #blocked>) -> tensor<8x512xf32, #blocked>
+    %32 = tt.splat %arg6 : (!tt.ptr<bf16, 1>) -> tensor<8x512x!tt.ptr<bf16, 1>, #blocked>
+    scf.for %arg9 = %c0_i32 to %c50257_i32 step %c512_i32  : i32 {
+      %33 = arith.extsi %arg9 : i32 to i64
+      %34 = tt.splat %33 : (i64) -> tensor<1x512xi64, #blocked>
+      %35 = arith.addi %34, %10 : tensor<1x512xi64, #blocked>
+      %36 = arith.cmpi slt, %35, %cst_3 : tensor<1x512xi64, #blocked>
+      %37 = tt.broadcast %35 : (tensor<1x512xi64, #blocked>) -> tensor<8x512xi64, #blocked>
+      %38 = arith.addi %37, %19 : tensor<8x512xi64, #blocked>
+      %39 = tt.addptr %29, %38 : tensor<8x512x!tt.ptr<bf16, 1>, #blocked>, tensor<8x512xi64, #blocked>
+      %40 = tt.broadcast %36 : (tensor<1x512xi1, #blocked>) -> tensor<8x512xi1, #blocked>
+      %41 = tt.load %39, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<8x512xbf16, #blocked>
+      %42 = arith.extf %41 : tensor<8x512xbf16, #blocked> to tensor<8x512xf32, #blocked>
+      %43 = tt.addptr %20, %38 : tensor<8x512x!tt.ptr<f32, 1>, #blocked>, tensor<8x512xi64, #blocked>
+      %44 = tt.load %43, %40, %cst_2 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<8x512xf32, #blocked>
+      %45 = tt.addptr %30, %38 : tensor<8x512x!tt.ptr<bf16, 1>, #blocked>, tensor<8x512xi64, #blocked>
+      %46 = tt.load %45, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<8x512xbf16, #blocked>
+      %47 = arith.extf %46 : tensor<8x512xbf16, #blocked> to tensor<8x512xf32, #blocked>
+      %48 = arith.mulf %44, %25 : tensor<8x512xf32, #blocked>
+      %49 = math.exp %47 : tensor<8x512xf32, #blocked>
+      %50 = arith.mulf %49, %31 : tensor<8x512xf32, #blocked>
+      %51 = arith.subf %48, %50 : tensor<8x512xf32, #blocked>
+      %52 = arith.addf %42, %51 : tensor<8x512xf32, #blocked>
+      %53 = tt.addptr %32, %38 : tensor<8x512x!tt.ptr<bf16, 1>, #blocked>, tensor<8x512xi64, #blocked>
+      %54 = arith.truncf %52 : tensor<8x512xf32, #blocked> to tensor<8x512xbf16, #blocked>
+      tt.store %53, %54, %40 {cache = 1 : i32, evict = 1 : i32} : tensor<8x512xbf16, #blocked>
+    }
+    tt.return
+  }
+}
diff --git a/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.cubin b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..5bc4202937ae211a89c6f9dcec2625dbda4401e1
Binary files /dev/null and b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.cubin differ
diff --git a/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.llir b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..406e98492740e7a4da4c3783ad188eb9ade14bb3
--- /dev/null
+++ b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.llir
@@ -0,0 +1,1108 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+@global_smem = external addrspace(3) global [0 x i8]
+
+define void @triton__0d1d2d3d4d5d6d7de8(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, ptr addrspace(1) %4, ptr addrspace(1) %5, ptr addrspace(1) %6, i64 %7, i64 %8) local_unnamed_addr !dbg !5 {
+  %10 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !8
+  %11 = and i32 %10, 31, !dbg !8
+  %12 = lshr i32 %10, 6, !dbg !8
+  %13 = and i32 %12, 3, !dbg !8
+  %14 = or i32 %13, 4, !dbg !8
+  %15 = or i32 %13, 8, !dbg !8
+  %16 = or i32 %13, 12, !dbg !8
+  %17 = or i32 %13, 16, !dbg !8
+  %18 = or i32 %13, 20, !dbg !8
+  %19 = or i32 %13, 24, !dbg !8
+  %20 = or i32 %13, 28, !dbg !8
+  %21 = or i32 %13, 32, !dbg !8
+  %22 = or i32 %13, 36, !dbg !8
+  %23 = or i32 %13, 40, !dbg !8
+  %24 = or i32 %13, 44, !dbg !8
+  %25 = or i32 %13, 48, !dbg !8
+  %26 = or i32 %13, 52, !dbg !8
+  %27 = or i32 %13, 56, !dbg !8
+  %28 = or i32 %13, 60, !dbg !8
+  %urem = and i32 %10, 63, !dbg !9
+  %29 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #3, !dbg !10
+  %30 = sext i32 %29 to i64, !dbg !11
+  %31 = shl nsw i64 %30, 6, !dbg !12
+  %32 = zext nneg i32 %13 to i64
+  %33 = zext nneg i32 %14 to i64
+  %34 = zext nneg i32 %15 to i64
+  %35 = zext nneg i32 %16 to i64
+  %36 = zext nneg i32 %17 to i64
+  %37 = zext nneg i32 %18 to i64
+  %38 = zext nneg i32 %19 to i64
+  %39 = zext nneg i32 %20 to i64
+  %40 = zext nneg i32 %21 to i64
+  %41 = zext nneg i32 %22 to i64
+  %42 = zext nneg i32 %23 to i64
+  %43 = zext nneg i32 %24 to i64
+  %44 = zext nneg i32 %25 to i64
+  %45 = zext nneg i32 %26 to i64
+  %46 = zext nneg i32 %27 to i64
+  %47 = zext nneg i32 %28 to i64
+  %48 = or i64 %31, %32, !dbg !13
+  %49 = or i64 %31, %33, !dbg !13
+  %50 = or i64 %31, %34, !dbg !13
+  %51 = or i64 %31, %35, !dbg !13
+  %52 = or i64 %31, %36, !dbg !13
+  %53 = or i64 %31, %37, !dbg !13
+  %54 = or i64 %31, %38, !dbg !13
+  %55 = or i64 %31, %39, !dbg !13
+  %56 = or i64 %31, %40, !dbg !13
+  %57 = or i64 %31, %41, !dbg !13
+  %58 = or i64 %31, %42, !dbg !13
+  %59 = or i64 %31, %43, !dbg !13
+  %60 = or i64 %31, %44, !dbg !13
+  %61 = or i64 %31, %45, !dbg !13
+  %62 = or i64 %31, %46, !dbg !13
+  %63 = or i64 %31, %47, !dbg !13
+  %64 = getelementptr i64, ptr addrspace(1) %1, i64 %48, !dbg !14
+  %65 = getelementptr i64, ptr addrspace(1) %1, i64 %49, !dbg !14
+  %66 = getelementptr i64, ptr addrspace(1) %1, i64 %50, !dbg !14
+  %67 = getelementptr i64, ptr addrspace(1) %1, i64 %51, !dbg !14
+  %68 = getelementptr i64, ptr addrspace(1) %1, i64 %52, !dbg !14
+  %69 = getelementptr i64, ptr addrspace(1) %1, i64 %53, !dbg !14
+  %70 = getelementptr i64, ptr addrspace(1) %1, i64 %54, !dbg !14
+  %71 = getelementptr i64, ptr addrspace(1) %1, i64 %55, !dbg !14
+  %72 = getelementptr i64, ptr addrspace(1) %1, i64 %56, !dbg !14
+  %73 = getelementptr i64, ptr addrspace(1) %1, i64 %57, !dbg !14
+  %74 = getelementptr i64, ptr addrspace(1) %1, i64 %58, !dbg !14
+  %75 = getelementptr i64, ptr addrspace(1) %1, i64 %59, !dbg !14
+  %76 = getelementptr i64, ptr addrspace(1) %1, i64 %60, !dbg !14
+  %77 = getelementptr i64, ptr addrspace(1) %1, i64 %61, !dbg !14
+  %78 = getelementptr i64, ptr addrspace(1) %1, i64 %62, !dbg !14
+  %79 = getelementptr i64, ptr addrspace(1) %1, i64 %63, !dbg !14
+  %80 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %64, i1 true) #3, !dbg !15
+  %81 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %65, i1 true) #3, !dbg !15
+  %82 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %66, i1 true) #3, !dbg !15
+  %83 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %67, i1 true) #3, !dbg !15
+  %84 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %68, i1 true) #3, !dbg !15
+  %85 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %69, i1 true) #3, !dbg !15
+  %86 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %70, i1 true) #3, !dbg !15
+  %87 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %71, i1 true) #3, !dbg !15
+  %88 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %72, i1 true) #3, !dbg !15
+  %89 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %73, i1 true) #3, !dbg !15
+  %90 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %74, i1 true) #3, !dbg !15
+  %91 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %75, i1 true) #3, !dbg !15
+  %92 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %76, i1 true) #3, !dbg !15
+  %93 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %77, i1 true) #3, !dbg !15
+  %94 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %78, i1 true) #3, !dbg !15
+  %95 = tail call i64 asm sideeffect "mov.u64 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b64 { $0 }, [ $1 + 0 ];", "=l,l,b"(ptr addrspace(1) %79, i1 true) #3, !dbg !15
+  %96 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %2, i1 true) #3, !dbg !16
+  %97 = bitcast i32 %96 to float, !dbg !16
+  %98 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %3, i1 true) #3, !dbg !17
+  %99 = bitcast i32 %98 to float, !dbg !17
+  %100 = mul nsw i64 %48, 50257, !dbg !18
+  %101 = mul nsw i64 %49, 50257, !dbg !18
+  %102 = mul nsw i64 %50, 50257, !dbg !18
+  %103 = mul nsw i64 %51, 50257, !dbg !18
+  %104 = mul nsw i64 %52, 50257, !dbg !18
+  %105 = mul nsw i64 %53, 50257, !dbg !18
+  %106 = mul nsw i64 %54, 50257, !dbg !18
+  %107 = mul nsw i64 %55, 50257, !dbg !18
+  %108 = mul nsw i64 %56, 50257, !dbg !18
+  %109 = mul nsw i64 %57, 50257, !dbg !18
+  %110 = mul nsw i64 %58, 50257, !dbg !18
+  %111 = mul nsw i64 %59, 50257, !dbg !18
+  %112 = mul nsw i64 %60, 50257, !dbg !18
+  %113 = mul nsw i64 %61, 50257, !dbg !18
+  %114 = mul nsw i64 %62, 50257, !dbg !18
+  %115 = mul nsw i64 %63, 50257, !dbg !18
+  %116 = insertelement <16 x i64> poison, i64 %80, i64 0, !dbg !19
+  %117 = insertelement <16 x i64> %116, i64 %81, i64 1, !dbg !19
+  %118 = insertelement <16 x i64> %117, i64 %82, i64 2, !dbg !19
+  %119 = insertelement <16 x i64> %118, i64 %83, i64 3, !dbg !19
+  %120 = insertelement <16 x i64> %119, i64 %84, i64 4, !dbg !19
+  %121 = insertelement <16 x i64> %120, i64 %85, i64 5, !dbg !19
+  %122 = insertelement <16 x i64> %121, i64 %86, i64 6, !dbg !19
+  %123 = insertelement <16 x i64> %122, i64 %87, i64 7, !dbg !19
+  %124 = insertelement <16 x i64> %123, i64 %88, i64 8, !dbg !19
+  %125 = insertelement <16 x i64> %124, i64 %89, i64 9, !dbg !19
+  %126 = insertelement <16 x i64> %125, i64 %90, i64 10, !dbg !19
+  %127 = insertelement <16 x i64> %126, i64 %91, i64 11, !dbg !19
+  %128 = insertelement <16 x i64> %127, i64 %92, i64 12, !dbg !19
+  %129 = insertelement <16 x i64> %128, i64 %93, i64 13, !dbg !19
+  %130 = insertelement <16 x i64> %129, i64 %94, i64 14, !dbg !19
+  %131 = insertelement <16 x i64> %130, i64 %95, i64 15, !dbg !19
+  %132 = icmp eq <16 x i64> %131, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, !dbg !19
+  %133 = tail call float asm "div.full.f32 $0, $1, $2;", "=r,r,r"(float %97, float %99) #3, !dbg !20
+  %134 = insertelement <16 x float> poison, float %133, i64 0, !dbg !21
+  %135 = shufflevector <16 x float> %134, <16 x float> poison, <16 x i32> zeroinitializer, !dbg !21
+  %136 = select <16 x i1> %132, <16 x float> zeroinitializer, <16 x float> %135, !dbg !21
+  %137 = getelementptr float, ptr addrspace(1) %0, i64 %100
+  %138 = getelementptr float, ptr addrspace(1) %0, i64 %101
+  %139 = getelementptr float, ptr addrspace(1) %0, i64 %102
+  %140 = getelementptr float, ptr addrspace(1) %0, i64 %103
+  %141 = getelementptr float, ptr addrspace(1) %0, i64 %104
+  %142 = getelementptr float, ptr addrspace(1) %0, i64 %105
+  %143 = getelementptr float, ptr addrspace(1) %0, i64 %106
+  %144 = getelementptr float, ptr addrspace(1) %0, i64 %107
+  %145 = getelementptr float, ptr addrspace(1) %0, i64 %108
+  %146 = getelementptr float, ptr addrspace(1) %0, i64 %109
+  %147 = getelementptr float, ptr addrspace(1) %0, i64 %110
+  %148 = getelementptr float, ptr addrspace(1) %0, i64 %111
+  %149 = getelementptr float, ptr addrspace(1) %0, i64 %112
+  %150 = getelementptr float, ptr addrspace(1) %0, i64 %113
+  %151 = getelementptr float, ptr addrspace(1) %0, i64 %114
+  %152 = getelementptr float, ptr addrspace(1) %0, i64 %115
+  br label %153, !dbg !22
+
+153:                                              ; preds = %9, %153
+  %154 = phi i32 [ 0, %9 ], [ %213, %153 ]
+  %155 = phi <16 x float> [ zeroinitializer, %9 ], [ %212, %153 ]
+  %156 = or i32 %154, %urem, !dbg !23
+  %157 = zext nneg i32 %156 to i64, !dbg !23
+  %158 = icmp ult i32 %156, 50257, !dbg !24
+  %159 = getelementptr float, ptr addrspace(1) %137, i64 %157, !dbg !25
+  %160 = getelementptr float, ptr addrspace(1) %138, i64 %157, !dbg !25
+  %161 = getelementptr float, ptr addrspace(1) %139, i64 %157, !dbg !25
+  %162 = getelementptr float, ptr addrspace(1) %140, i64 %157, !dbg !25
+  %163 = getelementptr float, ptr addrspace(1) %141, i64 %157, !dbg !25
+  %164 = getelementptr float, ptr addrspace(1) %142, i64 %157, !dbg !25
+  %165 = getelementptr float, ptr addrspace(1) %143, i64 %157, !dbg !25
+  %166 = getelementptr float, ptr addrspace(1) %144, i64 %157, !dbg !25
+  %167 = getelementptr float, ptr addrspace(1) %145, i64 %157, !dbg !25
+  %168 = getelementptr float, ptr addrspace(1) %146, i64 %157, !dbg !25
+  %169 = getelementptr float, ptr addrspace(1) %147, i64 %157, !dbg !25
+  %170 = getelementptr float, ptr addrspace(1) %148, i64 %157, !dbg !25
+  %171 = getelementptr float, ptr addrspace(1) %149, i64 %157, !dbg !25
+  %172 = getelementptr float, ptr addrspace(1) %150, i64 %157, !dbg !25
+  %173 = getelementptr float, ptr addrspace(1) %151, i64 %157, !dbg !25
+  %174 = getelementptr float, ptr addrspace(1) %152, i64 %157, !dbg !25
+  %175 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %159, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %176 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %160, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %177 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %161, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %178 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %162, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %179 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %163, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %180 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %164, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %181 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %165, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %182 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %166, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %183 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %167, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %184 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %168, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %185 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %169, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %186 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %170, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %187 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %171, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %188 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %172, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %189 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %173, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %190 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %174, i1 %158, i32 0, i1 %158) #3, !dbg !26
+  %191 = insertelement <16 x i32> poison, i32 %175, i64 0, !dbg !26
+  %192 = insertelement <16 x i32> %191, i32 %176, i64 1, !dbg !26
+  %193 = insertelement <16 x i32> %192, i32 %177, i64 2, !dbg !26
+  %194 = insertelement <16 x i32> %193, i32 %178, i64 3, !dbg !26
+  %195 = insertelement <16 x i32> %194, i32 %179, i64 4, !dbg !26
+  %196 = insertelement <16 x i32> %195, i32 %180, i64 5, !dbg !26
+  %197 = insertelement <16 x i32> %196, i32 %181, i64 6, !dbg !26
+  %198 = insertelement <16 x i32> %197, i32 %182, i64 7, !dbg !26
+  %199 = insertelement <16 x i32> %198, i32 %183, i64 8, !dbg !26
+  %200 = insertelement <16 x i32> %199, i32 %184, i64 9, !dbg !26
+  %201 = insertelement <16 x i32> %200, i32 %185, i64 10, !dbg !26
+  %202 = insertelement <16 x i32> %201, i32 %186, i64 11, !dbg !26
+  %203 = insertelement <16 x i32> %202, i32 %187, i64 12, !dbg !26
+  %204 = insertelement <16 x i32> %203, i32 %188, i64 13, !dbg !26
+  %205 = insertelement <16 x i32> %204, i32 %189, i64 14, !dbg !26
+  %206 = insertelement <16 x i32> %205, i32 %190, i64 15, !dbg !26
+  %207 = bitcast <16 x i32> %206 to <16 x float>, !dbg !26
+  %208 = fmul <16 x float> %136, %207, !dbg !27
+  %209 = insertelement <16 x i1> poison, i1 %158, i64 0, !dbg !28
+  %210 = shufflevector <16 x i1> %209, <16 x i1> poison, <16 x i32> zeroinitializer, !dbg !28
+  %211 = select <16 x i1> %210, <16 x float> %208, <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, !dbg !28
+  %212 = fadd <16 x float> %155, %211, !dbg !28
+  %213 = add nuw nsw i32 %154, 64, !dbg !22
+  %214 = icmp ult i32 %154, 50193, !dbg !22
+  br i1 %214, label %153, label %215, !dbg !22
+
+215:                                              ; preds = %153
+  %216 = lshr i32 %10, 5, !dbg !8
+  %217 = and i32 %216, 1, !dbg !9
+  %218 = extractelement <16 x float> %212, i64 0, !dbg !29
+  %219 = bitcast float %218 to i32, !dbg !29
+  %220 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %219, i32 16, i32 31), !dbg !29
+  %221 = bitcast i32 %220 to float, !dbg !29
+  %222 = fadd float %218, %221, !dbg !33
+  %223 = bitcast float %222 to i32, !dbg !29
+  %224 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %223, i32 8, i32 31), !dbg !29
+  %225 = bitcast i32 %224 to float, !dbg !29
+  %226 = fadd float %222, %225, !dbg !33
+  %227 = bitcast float %226 to i32, !dbg !29
+  %228 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %227, i32 4, i32 31), !dbg !29
+  %229 = bitcast i32 %228 to float, !dbg !29
+  %230 = fadd float %226, %229, !dbg !33
+  %231 = bitcast float %230 to i32, !dbg !29
+  %232 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %231, i32 2, i32 31), !dbg !29
+  %233 = bitcast i32 %232 to float, !dbg !29
+  %234 = fadd float %230, %233, !dbg !33
+  %235 = bitcast float %234 to i32, !dbg !29
+  %236 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %235, i32 1, i32 31), !dbg !29
+  %237 = bitcast i32 %236 to float, !dbg !29
+  %238 = fadd float %234, %237, !dbg !33
+  %239 = extractelement <16 x float> %212, i64 1, !dbg !29
+  %240 = bitcast float %239 to i32, !dbg !29
+  %241 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %240, i32 16, i32 31), !dbg !29
+  %242 = bitcast i32 %241 to float, !dbg !29
+  %243 = fadd float %239, %242, !dbg !33
+  %244 = bitcast float %243 to i32, !dbg !29
+  %245 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %244, i32 8, i32 31), !dbg !29
+  %246 = bitcast i32 %245 to float, !dbg !29
+  %247 = fadd float %243, %246, !dbg !33
+  %248 = bitcast float %247 to i32, !dbg !29
+  %249 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %248, i32 4, i32 31), !dbg !29
+  %250 = bitcast i32 %249 to float, !dbg !29
+  %251 = fadd float %247, %250, !dbg !33
+  %252 = bitcast float %251 to i32, !dbg !29
+  %253 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %252, i32 2, i32 31), !dbg !29
+  %254 = bitcast i32 %253 to float, !dbg !29
+  %255 = fadd float %251, %254, !dbg !33
+  %256 = bitcast float %255 to i32, !dbg !29
+  %257 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %256, i32 1, i32 31), !dbg !29
+  %258 = bitcast i32 %257 to float, !dbg !29
+  %259 = fadd float %255, %258, !dbg !33
+  %260 = extractelement <16 x float> %212, i64 2, !dbg !29
+  %261 = bitcast float %260 to i32, !dbg !29
+  %262 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %261, i32 16, i32 31), !dbg !29
+  %263 = bitcast i32 %262 to float, !dbg !29
+  %264 = fadd float %260, %263, !dbg !33
+  %265 = bitcast float %264 to i32, !dbg !29
+  %266 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %265, i32 8, i32 31), !dbg !29
+  %267 = bitcast i32 %266 to float, !dbg !29
+  %268 = fadd float %264, %267, !dbg !33
+  %269 = bitcast float %268 to i32, !dbg !29
+  %270 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %269, i32 4, i32 31), !dbg !29
+  %271 = bitcast i32 %270 to float, !dbg !29
+  %272 = fadd float %268, %271, !dbg !33
+  %273 = bitcast float %272 to i32, !dbg !29
+  %274 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %273, i32 2, i32 31), !dbg !29
+  %275 = bitcast i32 %274 to float, !dbg !29
+  %276 = fadd float %272, %275, !dbg !33
+  %277 = bitcast float %276 to i32, !dbg !29
+  %278 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %277, i32 1, i32 31), !dbg !29
+  %279 = bitcast i32 %278 to float, !dbg !29
+  %280 = fadd float %276, %279, !dbg !33
+  %281 = extractelement <16 x float> %212, i64 3, !dbg !29
+  %282 = bitcast float %281 to i32, !dbg !29
+  %283 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %282, i32 16, i32 31), !dbg !29
+  %284 = bitcast i32 %283 to float, !dbg !29
+  %285 = fadd float %281, %284, !dbg !33
+  %286 = bitcast float %285 to i32, !dbg !29
+  %287 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %286, i32 8, i32 31), !dbg !29
+  %288 = bitcast i32 %287 to float, !dbg !29
+  %289 = fadd float %285, %288, !dbg !33
+  %290 = bitcast float %289 to i32, !dbg !29
+  %291 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %290, i32 4, i32 31), !dbg !29
+  %292 = bitcast i32 %291 to float, !dbg !29
+  %293 = fadd float %289, %292, !dbg !33
+  %294 = bitcast float %293 to i32, !dbg !29
+  %295 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %294, i32 2, i32 31), !dbg !29
+  %296 = bitcast i32 %295 to float, !dbg !29
+  %297 = fadd float %293, %296, !dbg !33
+  %298 = bitcast float %297 to i32, !dbg !29
+  %299 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %298, i32 1, i32 31), !dbg !29
+  %300 = bitcast i32 %299 to float, !dbg !29
+  %301 = fadd float %297, %300, !dbg !33
+  %302 = extractelement <16 x float> %212, i64 4, !dbg !29
+  %303 = bitcast float %302 to i32, !dbg !29
+  %304 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %303, i32 16, i32 31), !dbg !29
+  %305 = bitcast i32 %304 to float, !dbg !29
+  %306 = fadd float %302, %305, !dbg !33
+  %307 = bitcast float %306 to i32, !dbg !29
+  %308 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %307, i32 8, i32 31), !dbg !29
+  %309 = bitcast i32 %308 to float, !dbg !29
+  %310 = fadd float %306, %309, !dbg !33
+  %311 = bitcast float %310 to i32, !dbg !29
+  %312 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %311, i32 4, i32 31), !dbg !29
+  %313 = bitcast i32 %312 to float, !dbg !29
+  %314 = fadd float %310, %313, !dbg !33
+  %315 = bitcast float %314 to i32, !dbg !29
+  %316 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %315, i32 2, i32 31), !dbg !29
+  %317 = bitcast i32 %316 to float, !dbg !29
+  %318 = fadd float %314, %317, !dbg !33
+  %319 = bitcast float %318 to i32, !dbg !29
+  %320 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %319, i32 1, i32 31), !dbg !29
+  %321 = bitcast i32 %320 to float, !dbg !29
+  %322 = fadd float %318, %321, !dbg !33
+  %323 = extractelement <16 x float> %212, i64 5, !dbg !29
+  %324 = bitcast float %323 to i32, !dbg !29
+  %325 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %324, i32 16, i32 31), !dbg !29
+  %326 = bitcast i32 %325 to float, !dbg !29
+  %327 = fadd float %323, %326, !dbg !33
+  %328 = bitcast float %327 to i32, !dbg !29
+  %329 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %328, i32 8, i32 31), !dbg !29
+  %330 = bitcast i32 %329 to float, !dbg !29
+  %331 = fadd float %327, %330, !dbg !33
+  %332 = bitcast float %331 to i32, !dbg !29
+  %333 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %332, i32 4, i32 31), !dbg !29
+  %334 = bitcast i32 %333 to float, !dbg !29
+  %335 = fadd float %331, %334, !dbg !33
+  %336 = bitcast float %335 to i32, !dbg !29
+  %337 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %336, i32 2, i32 31), !dbg !29
+  %338 = bitcast i32 %337 to float, !dbg !29
+  %339 = fadd float %335, %338, !dbg !33
+  %340 = bitcast float %339 to i32, !dbg !29
+  %341 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %340, i32 1, i32 31), !dbg !29
+  %342 = bitcast i32 %341 to float, !dbg !29
+  %343 = fadd float %339, %342, !dbg !33
+  %344 = extractelement <16 x float> %212, i64 6, !dbg !29
+  %345 = bitcast float %344 to i32, !dbg !29
+  %346 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %345, i32 16, i32 31), !dbg !29
+  %347 = bitcast i32 %346 to float, !dbg !29
+  %348 = fadd float %344, %347, !dbg !33
+  %349 = bitcast float %348 to i32, !dbg !29
+  %350 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %349, i32 8, i32 31), !dbg !29
+  %351 = bitcast i32 %350 to float, !dbg !29
+  %352 = fadd float %348, %351, !dbg !33
+  %353 = bitcast float %352 to i32, !dbg !29
+  %354 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %353, i32 4, i32 31), !dbg !29
+  %355 = bitcast i32 %354 to float, !dbg !29
+  %356 = fadd float %352, %355, !dbg !33
+  %357 = bitcast float %356 to i32, !dbg !29
+  %358 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %357, i32 2, i32 31), !dbg !29
+  %359 = bitcast i32 %358 to float, !dbg !29
+  %360 = fadd float %356, %359, !dbg !33
+  %361 = bitcast float %360 to i32, !dbg !29
+  %362 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %361, i32 1, i32 31), !dbg !29
+  %363 = bitcast i32 %362 to float, !dbg !29
+  %364 = fadd float %360, %363, !dbg !33
+  %365 = extractelement <16 x float> %212, i64 7, !dbg !29
+  %366 = bitcast float %365 to i32, !dbg !29
+  %367 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %366, i32 16, i32 31), !dbg !29
+  %368 = bitcast i32 %367 to float, !dbg !29
+  %369 = fadd float %365, %368, !dbg !33
+  %370 = bitcast float %369 to i32, !dbg !29
+  %371 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %370, i32 8, i32 31), !dbg !29
+  %372 = bitcast i32 %371 to float, !dbg !29
+  %373 = fadd float %369, %372, !dbg !33
+  %374 = bitcast float %373 to i32, !dbg !29
+  %375 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %374, i32 4, i32 31), !dbg !29
+  %376 = bitcast i32 %375 to float, !dbg !29
+  %377 = fadd float %373, %376, !dbg !33
+  %378 = bitcast float %377 to i32, !dbg !29
+  %379 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %378, i32 2, i32 31), !dbg !29
+  %380 = bitcast i32 %379 to float, !dbg !29
+  %381 = fadd float %377, %380, !dbg !33
+  %382 = bitcast float %381 to i32, !dbg !29
+  %383 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %382, i32 1, i32 31), !dbg !29
+  %384 = bitcast i32 %383 to float, !dbg !29
+  %385 = fadd float %381, %384, !dbg !33
+  %386 = extractelement <16 x float> %212, i64 8, !dbg !29
+  %387 = bitcast float %386 to i32, !dbg !29
+  %388 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %387, i32 16, i32 31), !dbg !29
+  %389 = bitcast i32 %388 to float, !dbg !29
+  %390 = fadd float %386, %389, !dbg !33
+  %391 = bitcast float %390 to i32, !dbg !29
+  %392 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %391, i32 8, i32 31), !dbg !29
+  %393 = bitcast i32 %392 to float, !dbg !29
+  %394 = fadd float %390, %393, !dbg !33
+  %395 = bitcast float %394 to i32, !dbg !29
+  %396 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %395, i32 4, i32 31), !dbg !29
+  %397 = bitcast i32 %396 to float, !dbg !29
+  %398 = fadd float %394, %397, !dbg !33
+  %399 = bitcast float %398 to i32, !dbg !29
+  %400 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %399, i32 2, i32 31), !dbg !29
+  %401 = bitcast i32 %400 to float, !dbg !29
+  %402 = fadd float %398, %401, !dbg !33
+  %403 = bitcast float %402 to i32, !dbg !29
+  %404 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %403, i32 1, i32 31), !dbg !29
+  %405 = bitcast i32 %404 to float, !dbg !29
+  %406 = fadd float %402, %405, !dbg !33
+  %407 = extractelement <16 x float> %212, i64 9, !dbg !29
+  %408 = bitcast float %407 to i32, !dbg !29
+  %409 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %408, i32 16, i32 31), !dbg !29
+  %410 = bitcast i32 %409 to float, !dbg !29
+  %411 = fadd float %407, %410, !dbg !33
+  %412 = bitcast float %411 to i32, !dbg !29
+  %413 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %412, i32 8, i32 31), !dbg !29
+  %414 = bitcast i32 %413 to float, !dbg !29
+  %415 = fadd float %411, %414, !dbg !33
+  %416 = bitcast float %415 to i32, !dbg !29
+  %417 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %416, i32 4, i32 31), !dbg !29
+  %418 = bitcast i32 %417 to float, !dbg !29
+  %419 = fadd float %415, %418, !dbg !33
+  %420 = bitcast float %419 to i32, !dbg !29
+  %421 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %420, i32 2, i32 31), !dbg !29
+  %422 = bitcast i32 %421 to float, !dbg !29
+  %423 = fadd float %419, %422, !dbg !33
+  %424 = bitcast float %423 to i32, !dbg !29
+  %425 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %424, i32 1, i32 31), !dbg !29
+  %426 = bitcast i32 %425 to float, !dbg !29
+  %427 = fadd float %423, %426, !dbg !33
+  %428 = extractelement <16 x float> %212, i64 10, !dbg !29
+  %429 = bitcast float %428 to i32, !dbg !29
+  %430 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %429, i32 16, i32 31), !dbg !29
+  %431 = bitcast i32 %430 to float, !dbg !29
+  %432 = fadd float %428, %431, !dbg !33
+  %433 = bitcast float %432 to i32, !dbg !29
+  %434 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %433, i32 8, i32 31), !dbg !29
+  %435 = bitcast i32 %434 to float, !dbg !29
+  %436 = fadd float %432, %435, !dbg !33
+  %437 = bitcast float %436 to i32, !dbg !29
+  %438 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %437, i32 4, i32 31), !dbg !29
+  %439 = bitcast i32 %438 to float, !dbg !29
+  %440 = fadd float %436, %439, !dbg !33
+  %441 = bitcast float %440 to i32, !dbg !29
+  %442 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %441, i32 2, i32 31), !dbg !29
+  %443 = bitcast i32 %442 to float, !dbg !29
+  %444 = fadd float %440, %443, !dbg !33
+  %445 = bitcast float %444 to i32, !dbg !29
+  %446 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %445, i32 1, i32 31), !dbg !29
+  %447 = bitcast i32 %446 to float, !dbg !29
+  %448 = fadd float %444, %447, !dbg !33
+  %449 = extractelement <16 x float> %212, i64 11, !dbg !29
+  %450 = bitcast float %449 to i32, !dbg !29
+  %451 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %450, i32 16, i32 31), !dbg !29
+  %452 = bitcast i32 %451 to float, !dbg !29
+  %453 = fadd float %449, %452, !dbg !33
+  %454 = bitcast float %453 to i32, !dbg !29
+  %455 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %454, i32 8, i32 31), !dbg !29
+  %456 = bitcast i32 %455 to float, !dbg !29
+  %457 = fadd float %453, %456, !dbg !33
+  %458 = bitcast float %457 to i32, !dbg !29
+  %459 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %458, i32 4, i32 31), !dbg !29
+  %460 = bitcast i32 %459 to float, !dbg !29
+  %461 = fadd float %457, %460, !dbg !33
+  %462 = bitcast float %461 to i32, !dbg !29
+  %463 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %462, i32 2, i32 31), !dbg !29
+  %464 = bitcast i32 %463 to float, !dbg !29
+  %465 = fadd float %461, %464, !dbg !33
+  %466 = bitcast float %465 to i32, !dbg !29
+  %467 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %466, i32 1, i32 31), !dbg !29
+  %468 = bitcast i32 %467 to float, !dbg !29
+  %469 = fadd float %465, %468, !dbg !33
+  %470 = extractelement <16 x float> %212, i64 12, !dbg !29
+  %471 = bitcast float %470 to i32, !dbg !29
+  %472 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %471, i32 16, i32 31), !dbg !29
+  %473 = bitcast i32 %472 to float, !dbg !29
+  %474 = fadd float %470, %473, !dbg !33
+  %475 = bitcast float %474 to i32, !dbg !29
+  %476 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %475, i32 8, i32 31), !dbg !29
+  %477 = bitcast i32 %476 to float, !dbg !29
+  %478 = fadd float %474, %477, !dbg !33
+  %479 = bitcast float %478 to i32, !dbg !29
+  %480 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %479, i32 4, i32 31), !dbg !29
+  %481 = bitcast i32 %480 to float, !dbg !29
+  %482 = fadd float %478, %481, !dbg !33
+  %483 = bitcast float %482 to i32, !dbg !29
+  %484 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %483, i32 2, i32 31), !dbg !29
+  %485 = bitcast i32 %484 to float, !dbg !29
+  %486 = fadd float %482, %485, !dbg !33
+  %487 = bitcast float %486 to i32, !dbg !29
+  %488 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %487, i32 1, i32 31), !dbg !29
+  %489 = bitcast i32 %488 to float, !dbg !29
+  %490 = fadd float %486, %489, !dbg !33
+  %491 = extractelement <16 x float> %212, i64 13, !dbg !29
+  %492 = bitcast float %491 to i32, !dbg !29
+  %493 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %492, i32 16, i32 31), !dbg !29
+  %494 = bitcast i32 %493 to float, !dbg !29
+  %495 = fadd float %491, %494, !dbg !33
+  %496 = bitcast float %495 to i32, !dbg !29
+  %497 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %496, i32 8, i32 31), !dbg !29
+  %498 = bitcast i32 %497 to float, !dbg !29
+  %499 = fadd float %495, %498, !dbg !33
+  %500 = bitcast float %499 to i32, !dbg !29
+  %501 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %500, i32 4, i32 31), !dbg !29
+  %502 = bitcast i32 %501 to float, !dbg !29
+  %503 = fadd float %499, %502, !dbg !33
+  %504 = bitcast float %503 to i32, !dbg !29
+  %505 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %504, i32 2, i32 31), !dbg !29
+  %506 = bitcast i32 %505 to float, !dbg !29
+  %507 = fadd float %503, %506, !dbg !33
+  %508 = bitcast float %507 to i32, !dbg !29
+  %509 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %508, i32 1, i32 31), !dbg !29
+  %510 = bitcast i32 %509 to float, !dbg !29
+  %511 = fadd float %507, %510, !dbg !33
+  %512 = extractelement <16 x float> %212, i64 14, !dbg !29
+  %513 = bitcast float %512 to i32, !dbg !29
+  %514 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %513, i32 16, i32 31), !dbg !29
+  %515 = bitcast i32 %514 to float, !dbg !29
+  %516 = fadd float %512, %515, !dbg !33
+  %517 = bitcast float %516 to i32, !dbg !29
+  %518 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %517, i32 8, i32 31), !dbg !29
+  %519 = bitcast i32 %518 to float, !dbg !29
+  %520 = fadd float %516, %519, !dbg !33
+  %521 = bitcast float %520 to i32, !dbg !29
+  %522 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %521, i32 4, i32 31), !dbg !29
+  %523 = bitcast i32 %522 to float, !dbg !29
+  %524 = fadd float %520, %523, !dbg !33
+  %525 = bitcast float %524 to i32, !dbg !29
+  %526 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %525, i32 2, i32 31), !dbg !29
+  %527 = bitcast i32 %526 to float, !dbg !29
+  %528 = fadd float %524, %527, !dbg !33
+  %529 = bitcast float %528 to i32, !dbg !29
+  %530 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %529, i32 1, i32 31), !dbg !29
+  %531 = bitcast i32 %530 to float, !dbg !29
+  %532 = fadd float %528, %531, !dbg !33
+  %533 = extractelement <16 x float> %212, i64 15, !dbg !29
+  %534 = bitcast float %533 to i32, !dbg !29
+  %535 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %534, i32 16, i32 31), !dbg !29
+  %536 = bitcast i32 %535 to float, !dbg !29
+  %537 = fadd float %533, %536, !dbg !33
+  %538 = bitcast float %537 to i32, !dbg !29
+  %539 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %538, i32 8, i32 31), !dbg !29
+  %540 = bitcast i32 %539 to float, !dbg !29
+  %541 = fadd float %537, %540, !dbg !33
+  %542 = bitcast float %541 to i32, !dbg !29
+  %543 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %542, i32 4, i32 31), !dbg !29
+  %544 = bitcast i32 %543 to float, !dbg !29
+  %545 = fadd float %541, %544, !dbg !33
+  %546 = bitcast float %545 to i32, !dbg !29
+  %547 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %546, i32 2, i32 31), !dbg !29
+  %548 = bitcast i32 %547 to float, !dbg !29
+  %549 = fadd float %545, %548, !dbg !33
+  %550 = bitcast float %549 to i32, !dbg !29
+  %551 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %550, i32 1, i32 31), !dbg !29
+  %552 = bitcast i32 %551 to float, !dbg !29
+  %553 = fadd float %549, %552, !dbg !33
+  %554 = icmp eq i32 %11, 0, !dbg !29
+  %555 = shl nuw nsw i32 %13, 1, !dbg !29
+  %556 = or i32 %555, %217, !dbg !29
+  %557 = zext nneg i32 %556 to i64, !dbg !29
+  %558 = getelementptr float, ptr addrspace(3) @global_smem, i64 %557, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %558, float %238, i1 %554) #3, !dbg !29
+  %559 = shl nuw nsw i32 %14, 1, !dbg !29
+  %560 = or i32 %559, %217, !dbg !29
+  %561 = zext nneg i32 %560 to i64, !dbg !29
+  %562 = getelementptr float, ptr addrspace(3) @global_smem, i64 %561, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %562, float %259, i1 %554) #3, !dbg !29
+  %563 = shl nuw nsw i32 %15, 1, !dbg !29
+  %564 = or i32 %563, %217, !dbg !29
+  %565 = zext nneg i32 %564 to i64, !dbg !29
+  %566 = getelementptr float, ptr addrspace(3) @global_smem, i64 %565, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %566, float %280, i1 %554) #3, !dbg !29
+  %567 = shl nuw nsw i32 %16, 1, !dbg !29
+  %568 = or i32 %567, %217, !dbg !29
+  %569 = zext nneg i32 %568 to i64, !dbg !29
+  %570 = getelementptr float, ptr addrspace(3) @global_smem, i64 %569, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %570, float %301, i1 %554) #3, !dbg !29
+  %571 = shl nuw nsw i32 %17, 1, !dbg !29
+  %572 = or i32 %571, %217, !dbg !29
+  %573 = zext nneg i32 %572 to i64, !dbg !29
+  %574 = getelementptr float, ptr addrspace(3) @global_smem, i64 %573, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %574, float %322, i1 %554) #3, !dbg !29
+  %575 = shl nuw nsw i32 %18, 1, !dbg !29
+  %576 = or i32 %575, %217, !dbg !29
+  %577 = zext nneg i32 %576 to i64, !dbg !29
+  %578 = getelementptr float, ptr addrspace(3) @global_smem, i64 %577, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %578, float %343, i1 %554) #3, !dbg !29
+  %579 = shl nuw nsw i32 %19, 1, !dbg !29
+  %580 = or i32 %579, %217, !dbg !29
+  %581 = zext nneg i32 %580 to i64, !dbg !29
+  %582 = getelementptr float, ptr addrspace(3) @global_smem, i64 %581, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %582, float %364, i1 %554) #3, !dbg !29
+  %583 = shl nuw nsw i32 %20, 1, !dbg !29
+  %584 = or i32 %583, %217, !dbg !29
+  %585 = zext nneg i32 %584 to i64, !dbg !29
+  %586 = getelementptr float, ptr addrspace(3) @global_smem, i64 %585, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %586, float %385, i1 %554) #3, !dbg !29
+  %587 = shl nuw nsw i32 %21, 1, !dbg !29
+  %588 = or i32 %587, %217, !dbg !29
+  %589 = zext nneg i32 %588 to i64, !dbg !29
+  %590 = getelementptr float, ptr addrspace(3) @global_smem, i64 %589, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %590, float %406, i1 %554) #3, !dbg !29
+  %591 = shl nuw nsw i32 %22, 1, !dbg !29
+  %592 = or i32 %591, %217, !dbg !29
+  %593 = zext nneg i32 %592 to i64, !dbg !29
+  %594 = getelementptr float, ptr addrspace(3) @global_smem, i64 %593, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %594, float %427, i1 %554) #3, !dbg !29
+  %595 = shl nuw nsw i32 %23, 1, !dbg !29
+  %596 = or i32 %595, %217, !dbg !29
+  %597 = zext nneg i32 %596 to i64, !dbg !29
+  %598 = getelementptr float, ptr addrspace(3) @global_smem, i64 %597, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %598, float %448, i1 %554) #3, !dbg !29
+  %599 = shl nuw nsw i32 %24, 1, !dbg !29
+  %600 = or i32 %599, %217, !dbg !29
+  %601 = zext nneg i32 %600 to i64, !dbg !29
+  %602 = getelementptr float, ptr addrspace(3) @global_smem, i64 %601, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %602, float %469, i1 %554) #3, !dbg !29
+  %603 = shl nuw nsw i32 %25, 1, !dbg !29
+  %604 = or i32 %603, %217, !dbg !29
+  %605 = zext nneg i32 %604 to i64, !dbg !29
+  %606 = getelementptr float, ptr addrspace(3) @global_smem, i64 %605, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %606, float %490, i1 %554) #3, !dbg !29
+  %607 = shl nuw nsw i32 %26, 1, !dbg !29
+  %608 = or i32 %607, %217, !dbg !29
+  %609 = zext nneg i32 %608 to i64, !dbg !29
+  %610 = getelementptr float, ptr addrspace(3) @global_smem, i64 %609, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %610, float %511, i1 %554) #3, !dbg !29
+  %611 = shl nuw nsw i32 %27, 1, !dbg !29
+  %612 = or i32 %611, %217, !dbg !29
+  %613 = zext nneg i32 %612 to i64, !dbg !29
+  %614 = getelementptr float, ptr addrspace(3) @global_smem, i64 %613, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %614, float %532, i1 %554) #3, !dbg !29
+  %615 = shl nuw nsw i32 %28, 1, !dbg !29
+  %616 = or i32 %615, %217, !dbg !29
+  %617 = zext nneg i32 %616 to i64, !dbg !29
+  %618 = getelementptr float, ptr addrspace(3) @global_smem, i64 %617, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %618, float %553, i1 %554) #3, !dbg !29
+  tail call void @llvm.nvvm.barrier0(), !dbg !29
+  %619 = icmp slt i32 %10, 128, !dbg !29
+  %620 = sext i32 %10 to i64, !dbg !29
+  %621 = getelementptr float, ptr addrspace(3) @global_smem, i64 %620, !dbg !29
+  %622 = tail call float asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %621, i1 %619) #3, !dbg !29
+  %623 = bitcast float %622 to i32, !dbg !29
+  %624 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %623, i32 1, i32 31), !dbg !29
+  %625 = bitcast i32 %624 to float, !dbg !29
+  %626 = fadd float %622, %625, !dbg !33
+  %627 = and i32 %10, 1, !dbg !29
+  %628 = icmp eq i32 %627, 0, !dbg !29
+  %629 = and i1 %619, %628, !dbg !29
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %621, float %626, i1 %629) #3, !dbg !29
+  tail call void @llvm.nvvm.barrier0(), !dbg !29
+  %630 = zext nneg i32 %555 to i64, !dbg !29
+  %631 = getelementptr float, ptr addrspace(3) @global_smem, i64 %630, !dbg !29
+  %632 = load float, ptr addrspace(3) %631, align 4, !dbg !29
+  %633 = zext nneg i32 %559 to i64, !dbg !29
+  %634 = getelementptr float, ptr addrspace(3) @global_smem, i64 %633, !dbg !29
+  %635 = load float, ptr addrspace(3) %634, align 4, !dbg !29
+  %636 = zext nneg i32 %563 to i64, !dbg !29
+  %637 = getelementptr float, ptr addrspace(3) @global_smem, i64 %636, !dbg !29
+  %638 = load float, ptr addrspace(3) %637, align 4, !dbg !29
+  %639 = zext nneg i32 %567 to i64, !dbg !29
+  %640 = getelementptr float, ptr addrspace(3) @global_smem, i64 %639, !dbg !29
+  %641 = load float, ptr addrspace(3) %640, align 4, !dbg !29
+  %642 = zext nneg i32 %571 to i64, !dbg !29
+  %643 = getelementptr float, ptr addrspace(3) @global_smem, i64 %642, !dbg !29
+  %644 = load float, ptr addrspace(3) %643, align 4, !dbg !29
+  %645 = zext nneg i32 %575 to i64, !dbg !29
+  %646 = getelementptr float, ptr addrspace(3) @global_smem, i64 %645, !dbg !29
+  %647 = load float, ptr addrspace(3) %646, align 4, !dbg !29
+  %648 = zext nneg i32 %579 to i64, !dbg !29
+  %649 = getelementptr float, ptr addrspace(3) @global_smem, i64 %648, !dbg !29
+  %650 = load float, ptr addrspace(3) %649, align 4, !dbg !29
+  %651 = zext nneg i32 %583 to i64, !dbg !29
+  %652 = getelementptr float, ptr addrspace(3) @global_smem, i64 %651, !dbg !29
+  %653 = load float, ptr addrspace(3) %652, align 4, !dbg !29
+  %654 = zext nneg i32 %587 to i64, !dbg !29
+  %655 = getelementptr float, ptr addrspace(3) @global_smem, i64 %654, !dbg !29
+  %656 = load float, ptr addrspace(3) %655, align 4, !dbg !29
+  %657 = zext nneg i32 %591 to i64, !dbg !29
+  %658 = getelementptr float, ptr addrspace(3) @global_smem, i64 %657, !dbg !29
+  %659 = load float, ptr addrspace(3) %658, align 4, !dbg !29
+  %660 = zext nneg i32 %595 to i64, !dbg !29
+  %661 = getelementptr float, ptr addrspace(3) @global_smem, i64 %660, !dbg !29
+  %662 = load float, ptr addrspace(3) %661, align 4, !dbg !29
+  %663 = zext nneg i32 %599 to i64, !dbg !29
+  %664 = getelementptr float, ptr addrspace(3) @global_smem, i64 %663, !dbg !29
+  %665 = load float, ptr addrspace(3) %664, align 4, !dbg !29
+  %666 = zext nneg i32 %603 to i64, !dbg !29
+  %667 = getelementptr float, ptr addrspace(3) @global_smem, i64 %666, !dbg !29
+  %668 = load float, ptr addrspace(3) %667, align 4, !dbg !29
+  %669 = zext nneg i32 %607 to i64, !dbg !29
+  %670 = getelementptr float, ptr addrspace(3) @global_smem, i64 %669, !dbg !29
+  %671 = load float, ptr addrspace(3) %670, align 4, !dbg !29
+  %672 = zext nneg i32 %611 to i64, !dbg !29
+  %673 = getelementptr float, ptr addrspace(3) @global_smem, i64 %672, !dbg !29
+  %674 = load float, ptr addrspace(3) %673, align 4, !dbg !29
+  %675 = zext nneg i32 %615 to i64, !dbg !29
+  %676 = getelementptr float, ptr addrspace(3) @global_smem, i64 %675, !dbg !29
+  %677 = load float, ptr addrspace(3) %676, align 4, !dbg !29
+  %678 = extractelement <16 x float> %136, i64 0, !dbg !37
+  %679 = extractelement <16 x float> %136, i64 1, !dbg !37
+  %680 = extractelement <16 x float> %136, i64 2, !dbg !37
+  %681 = extractelement <16 x float> %136, i64 3, !dbg !37
+  %682 = extractelement <16 x float> %136, i64 4, !dbg !37
+  %683 = extractelement <16 x float> %136, i64 5, !dbg !37
+  %684 = extractelement <16 x float> %136, i64 6, !dbg !37
+  %685 = extractelement <16 x float> %136, i64 7, !dbg !37
+  %686 = extractelement <16 x float> %136, i64 8, !dbg !37
+  %687 = extractelement <16 x float> %136, i64 9, !dbg !37
+  %688 = extractelement <16 x float> %136, i64 10, !dbg !37
+  %689 = extractelement <16 x float> %136, i64 11, !dbg !37
+  %690 = extractelement <16 x float> %136, i64 12, !dbg !37
+  %691 = extractelement <16 x float> %136, i64 13, !dbg !37
+  %692 = extractelement <16 x float> %136, i64 14, !dbg !37
+  %693 = extractelement <16 x float> %136, i64 15, !dbg !37
+  br label %694, !dbg !38
+
+694:                                              ; preds = %215, %694
+  %695 = phi i32 [ 0, %215 ], [ %987, %694 ]
+  %696 = or i32 %695, %urem, !dbg !39
+  %697 = zext nneg i32 %696 to i64, !dbg !39
+  %698 = icmp ult i32 %696, 50257, !dbg !40
+  %699 = add nsw i64 %100, %697, !dbg !41
+  %700 = add nsw i64 %101, %697, !dbg !41
+  %701 = add nsw i64 %102, %697, !dbg !41
+  %702 = add nsw i64 %103, %697, !dbg !41
+  %703 = add nsw i64 %104, %697, !dbg !41
+  %704 = add nsw i64 %105, %697, !dbg !41
+  %705 = add nsw i64 %106, %697, !dbg !41
+  %706 = add nsw i64 %107, %697, !dbg !41
+  %707 = add nsw i64 %108, %697, !dbg !41
+  %708 = add nsw i64 %109, %697, !dbg !41
+  %709 = add nsw i64 %110, %697, !dbg !41
+  %710 = add nsw i64 %111, %697, !dbg !41
+  %711 = add nsw i64 %112, %697, !dbg !41
+  %712 = add nsw i64 %113, %697, !dbg !41
+  %713 = add nsw i64 %114, %697, !dbg !41
+  %714 = add nsw i64 %115, %697, !dbg !41
+  %715 = getelementptr i16, ptr addrspace(1) %4, i64 %699, !dbg !42
+  %716 = getelementptr i16, ptr addrspace(1) %4, i64 %700, !dbg !42
+  %717 = getelementptr i16, ptr addrspace(1) %4, i64 %701, !dbg !42
+  %718 = getelementptr i16, ptr addrspace(1) %4, i64 %702, !dbg !42
+  %719 = getelementptr i16, ptr addrspace(1) %4, i64 %703, !dbg !42
+  %720 = getelementptr i16, ptr addrspace(1) %4, i64 %704, !dbg !42
+  %721 = getelementptr i16, ptr addrspace(1) %4, i64 %705, !dbg !42
+  %722 = getelementptr i16, ptr addrspace(1) %4, i64 %706, !dbg !42
+  %723 = getelementptr i16, ptr addrspace(1) %4, i64 %707, !dbg !42
+  %724 = getelementptr i16, ptr addrspace(1) %4, i64 %708, !dbg !42
+  %725 = getelementptr i16, ptr addrspace(1) %4, i64 %709, !dbg !42
+  %726 = getelementptr i16, ptr addrspace(1) %4, i64 %710, !dbg !42
+  %727 = getelementptr i16, ptr addrspace(1) %4, i64 %711, !dbg !42
+  %728 = getelementptr i16, ptr addrspace(1) %4, i64 %712, !dbg !42
+  %729 = getelementptr i16, ptr addrspace(1) %4, i64 %713, !dbg !42
+  %730 = getelementptr i16, ptr addrspace(1) %4, i64 %714, !dbg !42
+  %731 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %715, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %732 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %716, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %733 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %717, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %734 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %718, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %735 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %719, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %736 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %720, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %737 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %721, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %738 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %722, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %739 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %723, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %740 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %724, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %741 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %725, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %742 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %726, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %743 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %727, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %744 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %728, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %745 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %729, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %746 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %730, i1 %698, i16 0, i1 %698) #3, !dbg !43
+  %747 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %731) #3, !dbg !44
+  %748 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %732) #3, !dbg !44
+  %749 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %733) #3, !dbg !44
+  %750 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %734) #3, !dbg !44
+  %751 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %735) #3, !dbg !44
+  %752 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %736) #3, !dbg !44
+  %753 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %737) #3, !dbg !44
+  %754 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %738) #3, !dbg !44
+  %755 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %739) #3, !dbg !44
+  %756 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %740) #3, !dbg !44
+  %757 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %741) #3, !dbg !44
+  %758 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %742) #3, !dbg !44
+  %759 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %743) #3, !dbg !44
+  %760 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %744) #3, !dbg !44
+  %761 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %745) #3, !dbg !44
+  %762 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %746) #3, !dbg !44
+  %763 = getelementptr float, ptr addrspace(1) %0, i64 %699, !dbg !45
+  %764 = getelementptr float, ptr addrspace(1) %0, i64 %700, !dbg !45
+  %765 = getelementptr float, ptr addrspace(1) %0, i64 %701, !dbg !45
+  %766 = getelementptr float, ptr addrspace(1) %0, i64 %702, !dbg !45
+  %767 = getelementptr float, ptr addrspace(1) %0, i64 %703, !dbg !45
+  %768 = getelementptr float, ptr addrspace(1) %0, i64 %704, !dbg !45
+  %769 = getelementptr float, ptr addrspace(1) %0, i64 %705, !dbg !45
+  %770 = getelementptr float, ptr addrspace(1) %0, i64 %706, !dbg !45
+  %771 = getelementptr float, ptr addrspace(1) %0, i64 %707, !dbg !45
+  %772 = getelementptr float, ptr addrspace(1) %0, i64 %708, !dbg !45
+  %773 = getelementptr float, ptr addrspace(1) %0, i64 %709, !dbg !45
+  %774 = getelementptr float, ptr addrspace(1) %0, i64 %710, !dbg !45
+  %775 = getelementptr float, ptr addrspace(1) %0, i64 %711, !dbg !45
+  %776 = getelementptr float, ptr addrspace(1) %0, i64 %712, !dbg !45
+  %777 = getelementptr float, ptr addrspace(1) %0, i64 %713, !dbg !45
+  %778 = getelementptr float, ptr addrspace(1) %0, i64 %714, !dbg !45
+  %779 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %763, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %780 = bitcast i32 %779 to float, !dbg !46
+  %781 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %764, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %782 = bitcast i32 %781 to float, !dbg !46
+  %783 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %765, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %784 = bitcast i32 %783 to float, !dbg !46
+  %785 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %766, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %786 = bitcast i32 %785 to float, !dbg !46
+  %787 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %767, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %788 = bitcast i32 %787 to float, !dbg !46
+  %789 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %768, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %790 = bitcast i32 %789 to float, !dbg !46
+  %791 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %769, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %792 = bitcast i32 %791 to float, !dbg !46
+  %793 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %770, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %794 = bitcast i32 %793 to float, !dbg !46
+  %795 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %771, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %796 = bitcast i32 %795 to float, !dbg !46
+  %797 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %772, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %798 = bitcast i32 %797 to float, !dbg !46
+  %799 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %773, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %800 = bitcast i32 %799 to float, !dbg !46
+  %801 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %774, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %802 = bitcast i32 %801 to float, !dbg !46
+  %803 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %775, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %804 = bitcast i32 %803 to float, !dbg !46
+  %805 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %776, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %806 = bitcast i32 %805 to float, !dbg !46
+  %807 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %777, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %808 = bitcast i32 %807 to float, !dbg !46
+  %809 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b32 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u32 $0, $3;", "=r,l,b,r,b"(ptr addrspace(1) %778, i1 %698, i32 0, i1 %698) #3, !dbg !46
+  %810 = bitcast i32 %809 to float, !dbg !46
+  %811 = getelementptr i16, ptr addrspace(1) %5, i64 %699, !dbg !47
+  %812 = getelementptr i16, ptr addrspace(1) %5, i64 %700, !dbg !47
+  %813 = getelementptr i16, ptr addrspace(1) %5, i64 %701, !dbg !47
+  %814 = getelementptr i16, ptr addrspace(1) %5, i64 %702, !dbg !47
+  %815 = getelementptr i16, ptr addrspace(1) %5, i64 %703, !dbg !47
+  %816 = getelementptr i16, ptr addrspace(1) %5, i64 %704, !dbg !47
+  %817 = getelementptr i16, ptr addrspace(1) %5, i64 %705, !dbg !47
+  %818 = getelementptr i16, ptr addrspace(1) %5, i64 %706, !dbg !47
+  %819 = getelementptr i16, ptr addrspace(1) %5, i64 %707, !dbg !47
+  %820 = getelementptr i16, ptr addrspace(1) %5, i64 %708, !dbg !47
+  %821 = getelementptr i16, ptr addrspace(1) %5, i64 %709, !dbg !47
+  %822 = getelementptr i16, ptr addrspace(1) %5, i64 %710, !dbg !47
+  %823 = getelementptr i16, ptr addrspace(1) %5, i64 %711, !dbg !47
+  %824 = getelementptr i16, ptr addrspace(1) %5, i64 %712, !dbg !47
+  %825 = getelementptr i16, ptr addrspace(1) %5, i64 %713, !dbg !47
+  %826 = getelementptr i16, ptr addrspace(1) %5, i64 %714, !dbg !47
+  %827 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %811, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %828 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %812, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %829 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %813, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %830 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %814, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %831 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %815, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %832 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %816, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %833 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %817, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %834 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %818, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %835 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %819, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %836 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %820, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %837 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %821, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %838 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %822, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %839 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %823, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %840 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %824, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %841 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %825, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %842 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %826, i1 %698, i16 0, i1 %698) #3, !dbg !48
+  %843 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %827) #3, !dbg !49
+  %844 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %828) #3, !dbg !49
+  %845 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %829) #3, !dbg !49
+  %846 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %830) #3, !dbg !49
+  %847 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %831) #3, !dbg !49
+  %848 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %832) #3, !dbg !49
+  %849 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %833) #3, !dbg !49
+  %850 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %834) #3, !dbg !49
+  %851 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %835) #3, !dbg !49
+  %852 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %836) #3, !dbg !49
+  %853 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %837) #3, !dbg !49
+  %854 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %838) #3, !dbg !49
+  %855 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %839) #3, !dbg !49
+  %856 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %840) #3, !dbg !49
+  %857 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %841) #3, !dbg !49
+  %858 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %842) #3, !dbg !49
+  %859 = fmul float %678, %780, !dbg !37
+  %860 = fmul float %679, %782, !dbg !37
+  %861 = fmul float %680, %784, !dbg !37
+  %862 = fmul float %681, %786, !dbg !37
+  %863 = fmul float %682, %788, !dbg !37
+  %864 = fmul float %683, %790, !dbg !37
+  %865 = fmul float %684, %792, !dbg !37
+  %866 = fmul float %685, %794, !dbg !37
+  %867 = fmul float %686, %796, !dbg !37
+  %868 = fmul float %687, %798, !dbg !37
+  %869 = fmul float %688, %800, !dbg !37
+  %870 = fmul float %689, %802, !dbg !37
+  %871 = fmul float %690, %804, !dbg !37
+  %872 = fmul float %691, %806, !dbg !37
+  %873 = fmul float %692, %808, !dbg !37
+  %874 = fmul float %693, %810, !dbg !37
+  %875 = fmul float %843, 0x3FF7154760000000, !dbg !50
+  %876 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %875) #3, !dbg !50
+  %877 = fmul float %844, 0x3FF7154760000000, !dbg !50
+  %878 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %877) #3, !dbg !50
+  %879 = fmul float %845, 0x3FF7154760000000, !dbg !50
+  %880 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %879) #3, !dbg !50
+  %881 = fmul float %846, 0x3FF7154760000000, !dbg !50
+  %882 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %881) #3, !dbg !50
+  %883 = fmul float %847, 0x3FF7154760000000, !dbg !50
+  %884 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %883) #3, !dbg !50
+  %885 = fmul float %848, 0x3FF7154760000000, !dbg !50
+  %886 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %885) #3, !dbg !50
+  %887 = fmul float %849, 0x3FF7154760000000, !dbg !50
+  %888 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %887) #3, !dbg !50
+  %889 = fmul float %850, 0x3FF7154760000000, !dbg !50
+  %890 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %889) #3, !dbg !50
+  %891 = fmul float %851, 0x3FF7154760000000, !dbg !50
+  %892 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %891) #3, !dbg !50
+  %893 = fmul float %852, 0x3FF7154760000000, !dbg !50
+  %894 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %893) #3, !dbg !50
+  %895 = fmul float %853, 0x3FF7154760000000, !dbg !50
+  %896 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %895) #3, !dbg !50
+  %897 = fmul float %854, 0x3FF7154760000000, !dbg !50
+  %898 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %897) #3, !dbg !50
+  %899 = fmul float %855, 0x3FF7154760000000, !dbg !50
+  %900 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %899) #3, !dbg !50
+  %901 = fmul float %856, 0x3FF7154760000000, !dbg !50
+  %902 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %901) #3, !dbg !50
+  %903 = fmul float %857, 0x3FF7154760000000, !dbg !50
+  %904 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %903) #3, !dbg !50
+  %905 = fmul float %858, 0x3FF7154760000000, !dbg !50
+  %906 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %905) #3, !dbg !50
+  %907 = fmul float %632, %876, !dbg !51
+  %908 = fmul float %635, %878, !dbg !51
+  %909 = fmul float %638, %880, !dbg !51
+  %910 = fmul float %641, %882, !dbg !51
+  %911 = fmul float %644, %884, !dbg !51
+  %912 = fmul float %647, %886, !dbg !51
+  %913 = fmul float %650, %888, !dbg !51
+  %914 = fmul float %653, %890, !dbg !51
+  %915 = fmul float %656, %892, !dbg !51
+  %916 = fmul float %659, %894, !dbg !51
+  %917 = fmul float %662, %896, !dbg !51
+  %918 = fmul float %665, %898, !dbg !51
+  %919 = fmul float %668, %900, !dbg !51
+  %920 = fmul float %671, %902, !dbg !51
+  %921 = fmul float %674, %904, !dbg !51
+  %922 = fmul float %677, %906, !dbg !51
+  %923 = fsub float %859, %907, !dbg !52
+  %924 = fsub float %860, %908, !dbg !52
+  %925 = fsub float %861, %909, !dbg !52
+  %926 = fsub float %862, %910, !dbg !52
+  %927 = fsub float %863, %911, !dbg !52
+  %928 = fsub float %864, %912, !dbg !52
+  %929 = fsub float %865, %913, !dbg !52
+  %930 = fsub float %866, %914, !dbg !52
+  %931 = fsub float %867, %915, !dbg !52
+  %932 = fsub float %868, %916, !dbg !52
+  %933 = fsub float %869, %917, !dbg !52
+  %934 = fsub float %870, %918, !dbg !52
+  %935 = fsub float %871, %919, !dbg !52
+  %936 = fsub float %872, %920, !dbg !52
+  %937 = fsub float %873, %921, !dbg !52
+  %938 = fsub float %874, %922, !dbg !52
+  %939 = fadd float %747, %923, !dbg !53
+  %940 = fadd float %748, %924, !dbg !53
+  %941 = fadd float %749, %925, !dbg !53
+  %942 = fadd float %750, %926, !dbg !53
+  %943 = fadd float %751, %927, !dbg !53
+  %944 = fadd float %752, %928, !dbg !53
+  %945 = fadd float %753, %929, !dbg !53
+  %946 = fadd float %754, %930, !dbg !53
+  %947 = fadd float %755, %931, !dbg !53
+  %948 = fadd float %756, %932, !dbg !53
+  %949 = fadd float %757, %933, !dbg !53
+  %950 = fadd float %758, %934, !dbg !53
+  %951 = fadd float %759, %935, !dbg !53
+  %952 = fadd float %760, %936, !dbg !53
+  %953 = fadd float %761, %937, !dbg !53
+  %954 = fadd float %762, %938, !dbg !53
+  %955 = getelementptr i16, ptr addrspace(1) %6, i64 %699, !dbg !54
+  %956 = getelementptr i16, ptr addrspace(1) %6, i64 %700, !dbg !54
+  %957 = getelementptr i16, ptr addrspace(1) %6, i64 %701, !dbg !54
+  %958 = getelementptr i16, ptr addrspace(1) %6, i64 %702, !dbg !54
+  %959 = getelementptr i16, ptr addrspace(1) %6, i64 %703, !dbg !54
+  %960 = getelementptr i16, ptr addrspace(1) %6, i64 %704, !dbg !54
+  %961 = getelementptr i16, ptr addrspace(1) %6, i64 %705, !dbg !54
+  %962 = getelementptr i16, ptr addrspace(1) %6, i64 %706, !dbg !54
+  %963 = getelementptr i16, ptr addrspace(1) %6, i64 %707, !dbg !54
+  %964 = getelementptr i16, ptr addrspace(1) %6, i64 %708, !dbg !54
+  %965 = getelementptr i16, ptr addrspace(1) %6, i64 %709, !dbg !54
+  %966 = getelementptr i16, ptr addrspace(1) %6, i64 %710, !dbg !54
+  %967 = getelementptr i16, ptr addrspace(1) %6, i64 %711, !dbg !54
+  %968 = getelementptr i16, ptr addrspace(1) %6, i64 %712, !dbg !54
+  %969 = getelementptr i16, ptr addrspace(1) %6, i64 %713, !dbg !54
+  %970 = getelementptr i16, ptr addrspace(1) %6, i64 %714, !dbg !54
+  %971 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %939) #3, !dbg !55
+  %972 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %940) #3, !dbg !55
+  %973 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %941) #3, !dbg !55
+  %974 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %942) #3, !dbg !55
+  %975 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %943) #3, !dbg !55
+  %976 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %944) #3, !dbg !55
+  %977 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %945) #3, !dbg !55
+  %978 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %946) #3, !dbg !55
+  %979 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %947) #3, !dbg !55
+  %980 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %948) #3, !dbg !55
+  %981 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %949) #3, !dbg !55
+  %982 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %950) #3, !dbg !55
+  %983 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %951) #3, !dbg !55
+  %984 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %952) #3, !dbg !55
+  %985 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %953) #3, !dbg !55
+  %986 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %954) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %971, ptr addrspace(1) %955, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %972, ptr addrspace(1) %956, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %973, ptr addrspace(1) %957, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %974, ptr addrspace(1) %958, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %975, ptr addrspace(1) %959, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %976, ptr addrspace(1) %960, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %977, ptr addrspace(1) %961, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %978, ptr addrspace(1) %962, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %979, ptr addrspace(1) %963, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %980, ptr addrspace(1) %964, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %981, ptr addrspace(1) %965, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %982, ptr addrspace(1) %966, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %983, ptr addrspace(1) %967, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %984, ptr addrspace(1) %968, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %985, ptr addrspace(1) %969, i1 %698) #3, !dbg !55
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %986, ptr addrspace(1) %970, i1 %698) #3, !dbg !55
+  %987 = add nuw nsw i32 %695, 64, !dbg !38
+  %988 = icmp ult i32 %695, 50193, !dbg !38
+  br i1 %988, label %694, label %989, !dbg !38
+
+989:                                              ; preds = %694
+  ret void, !dbg !56
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #2
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+!nvvm.annotations = !{!3, !4, !4, !3}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_C, file: !2, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!2 = !DIFile(filename: "ckzgl7thb4xdfkfnd2tidks6mt5f3hauwfyjflbtzyepo5oxkvhk.py", directory: "/tmp/torchinductor_root/kz")
+!3 = !{ptr @triton__0d1d2d3d4d5d6d7de8, !"kernel", i32 1}
+!4 = !{ptr @triton__0d1d2d3d4d5d6d7de8, !"maxntidx", i32 256}
+!5 = distinct !DISubprogram(name: "triton__0d1d2d3d4d5d6d7de8", linkageName: "triton__0d1d2d3d4d5d6d7de8", scope: !2, file: !2, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !1)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 22, column: 44, scope: !5)
+!9 = !DILocation(line: 24, column: 33, scope: !5)
+!10 = !DILocation(line: 21, column: 28, scope: !5)
+!11 = !DILocation(line: 21, column: 34, scope: !5)
+!12 = !DILocation(line: 21, column: 46, scope: !5)
+!13 = !DILocation(line: 22, column: 23, scope: !5)
+!14 = !DILocation(line: 26, column: 30, scope: !5)
+!15 = !DILocation(line: 26, column: 35, scope: !5)
+!16 = !DILocation(line: 27, column: 19, scope: !5)
+!17 = !DILocation(line: 29, column: 19, scope: !5)
+!18 = !DILocation(line: 36, column: 46, scope: !5)
+!19 = !DILocation(line: 38, column: 23, scope: !5)
+!20 = !DILocation(line: 39, column: 22, scope: !5)
+!21 = !DILocation(line: 41, column: 37, scope: !5)
+!22 = !DILocation(line: 32, column: 36, scope: !5)
+!23 = !DILocation(line: 33, column: 27, scope: !5)
+!24 = !DILocation(line: 34, column: 25, scope: !5)
+!25 = !DILocation(line: 36, column: 34, scope: !5)
+!26 = !DILocation(line: 36, column: 52, scope: !5)
+!27 = !DILocation(line: 42, column: 23, scope: !5)
+!28 = !DILocation(line: 45, column: 40, scope: !5)
+!29 = !DILocation(line: 243, column: 36, scope: !30, inlinedAt: !32)
+!30 = distinct !DILexicalBlockFile(scope: !5, file: !31, discriminator: 0)
+!31 = !DIFile(filename: "standard.py", directory: "/usr/local/lib/python3.10/dist-packages/triton/language")
+!32 = !DILocation(line: 46, column: 27, scope: !30)
+!33 = !DILocation(line: 233, column: 15, scope: !34, inlinedAt: !35)
+!34 = distinct !DILexicalBlockFile(scope: !30, file: !31, discriminator: 0)
+!35 = !DILocation(line: 243, column: 36, scope: !34, inlinedAt: !36)
+!36 = !DILocation(line: 46, column: 27, scope: !34)
+!37 = !DILocation(line: 63, column: 24, scope: !5)
+!38 = !DILocation(line: 51, column: 36, scope: !5)
+!39 = !DILocation(line: 52, column: 27, scope: !5)
+!40 = !DILocation(line: 53, column: 25, scope: !5)
+!41 = !DILocation(line: 55, column: 41, scope: !5)
+!42 = !DILocation(line: 55, column: 35, scope: !5)
+!43 = !DILocation(line: 55, column: 53, scope: !5)
+!44 = !DILocation(line: 55, column: 105, scope: !5)
+!45 = !DILocation(line: 56, column: 35, scope: !5)
+!46 = !DILocation(line: 56, column: 53, scope: !5)
+!47 = !DILocation(line: 57, column: 35, scope: !5)
+!48 = !DILocation(line: 57, column: 53, scope: !5)
+!49 = !DILocation(line: 57, column: 105, scope: !5)
+!50 = !DILocation(line: 65, column: 23, scope: !5)
+!51 = !DILocation(line: 66, column: 24, scope: !5)
+!52 = !DILocation(line: 67, column: 24, scope: !5)
+!53 = !DILocation(line: 69, column: 24, scope: !5)
+!54 = !DILocation(line: 70, column: 29, scope: !5)
+!55 = !DILocation(line: 70, column: 54, scope: !5)
+!56 = !DILocation(line: 51, column: 4, scope: !5)
diff --git a/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.ptx b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..a47caa9fc4d5c0bbb3760a39941532642ea924b9
--- /dev/null
+++ b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.ptx
@@ -0,0 +1,1927 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2d3d4d5d6d7de8
+.extern .shared .align 1 .b8 global_smem[];
+
+.visible .entry triton__0d1d2d3d4d5d6d7de8(
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_0,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_1,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_2,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_3,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_4,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_5,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_6,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_7,
+	.param .u64 triton__0d1d2d3d4d5d6d7de8_param_8
+)
+.maxntid 256, 1, 1
+{
+	.reg .pred 	%p<201>;
+	.reg .b16 	%rs<129>;
+	.reg .b32 	%r<399>;
+	.reg .f32 	%f<469>;
+	.reg .b64 	%rd<150>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd17, [triton__0d1d2d3d4d5d6d7de8_param_6];
+	ld.param.u64 	%rd16, [triton__0d1d2d3d4d5d6d7de8_param_5];
+	ld.param.u64 	%rd15, [triton__0d1d2d3d4d5d6d7de8_param_4];
+	ld.param.u64 	%rd52, [triton__0d1d2d3d4d5d6d7de8_param_0];
+$L__tmp0:
+	.loc	1 22 44
+	mov.u32 	%r1, %tid.x;
+	ld.param.u64 	%rd53, [triton__0d1d2d3d4d5d6d7de8_param_1];
+	and.b32  	%r2, %r1, 31;
+	ld.param.u64 	%rd50, [triton__0d1d2d3d4d5d6d7de8_param_2];
+	ld.param.u64 	%rd51, [triton__0d1d2d3d4d5d6d7de8_param_3];
+	bfe.u32 	%r30, %r1, 6, 2;
+	or.b32  	%r3, %r30, 4;
+	or.b32  	%r4, %r30, 8;
+	or.b32  	%r5, %r30, 12;
+	or.b32  	%r6, %r30, 16;
+	or.b32  	%r7, %r30, 20;
+	or.b32  	%r8, %r30, 24;
+	or.b32  	%r9, %r30, 28;
+	or.b32  	%r10, %r30, 32;
+	or.b32  	%r11, %r30, 36;
+	or.b32  	%r12, %r30, 40;
+	or.b32  	%r13, %r30, 44;
+	or.b32  	%r14, %r30, 48;
+	or.b32  	%r15, %r30, 52;
+	or.b32  	%r16, %r30, 56;
+	or.b32  	%r17, %r30, 60;
+	.loc	1 24 33
+	and.b32  	%r18, %r1, 63;
+	.loc	1 21 28
+	mov.u32 %r23, %ctaid.x;
+	.loc	1 21 34
+	cvt.s64.s32 	%rd1, %r23;
+	.loc	1 21 46
+	mul.wide.s32 	%rd54, %r23, 64;
+	cvt.u64.u32 	%rd2, %r30;
+	.loc	1 22 23
+	or.b64  	%rd55, %rd54, %rd2;
+	.loc	1 26 30
+	shl.b64 	%rd56, %rd55, 3;
+	add.s64 	%rd19, %rd53, %rd56;
+	add.s64 	%rd21, %rd19, 32;
+	add.s64 	%rd23, %rd19, 64;
+	add.s64 	%rd25, %rd19, 96;
+	add.s64 	%rd27, %rd19, 128;
+	add.s64 	%rd29, %rd19, 160;
+	add.s64 	%rd31, %rd19, 192;
+	add.s64 	%rd33, %rd19, 224;
+	add.s64 	%rd35, %rd19, 256;
+	add.s64 	%rd37, %rd19, 288;
+	add.s64 	%rd39, %rd19, 320;
+	add.s64 	%rd41, %rd19, 352;
+	add.s64 	%rd43, %rd19, 384;
+	add.s64 	%rd45, %rd19, 416;
+	add.s64 	%rd47, %rd19, 448;
+	add.s64 	%rd49, %rd19, 480;
+	mov.pred 	%p1, -1;
+	.loc	1 26 35
+	mov.u64 %rd18, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd18 }, [ %rd19 + 0 ];
+	mov.u64 %rd20, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd20 }, [ %rd21 + 0 ];
+	mov.u64 %rd22, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd22 }, [ %rd23 + 0 ];
+	mov.u64 %rd24, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd24 }, [ %rd25 + 0 ];
+	mov.u64 %rd26, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd26 }, [ %rd27 + 0 ];
+	mov.u64 %rd28, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd28 }, [ %rd29 + 0 ];
+	mov.u64 %rd30, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd30 }, [ %rd31 + 0 ];
+	mov.u64 %rd32, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd32 }, [ %rd33 + 0 ];
+	mov.u64 %rd34, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd34 }, [ %rd35 + 0 ];
+	mov.u64 %rd36, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd36 }, [ %rd37 + 0 ];
+	mov.u64 %rd38, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd38 }, [ %rd39 + 0 ];
+	mov.u64 %rd40, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd40 }, [ %rd41 + 0 ];
+	mov.u64 %rd42, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd42 }, [ %rd43 + 0 ];
+	mov.u64 %rd44, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd44 }, [ %rd45 + 0 ];
+	mov.u64 %rd46, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd46 }, [ %rd47 + 0 ];
+	mov.u64 %rd48, 0x0;
+	@%p1 ld.global.L1::evict_last.b64 { %rd48 }, [ %rd49 + 0 ];
+	.loc	1 27 19
+	mov.u32 %r27, 0x0;
+	@%p1 ld.global.b32 { %r27 }, [ %rd50 + 0 ];
+	.loc	1 29 19
+	mov.u32 %r28, 0x0;
+	@%p1 ld.global.b32 { %r28 }, [ %rd51 + 0 ];
+	.loc	1 38 23
+	setp.eq.s64 	%p19, %rd18, -1;
+	setp.eq.s64 	%p20, %rd20, -1;
+	setp.eq.s64 	%p21, %rd22, -1;
+	setp.eq.s64 	%p22, %rd24, -1;
+	setp.eq.s64 	%p23, %rd26, -1;
+	setp.eq.s64 	%p24, %rd28, -1;
+	setp.eq.s64 	%p25, %rd30, -1;
+	setp.eq.s64 	%p26, %rd32, -1;
+	setp.eq.s64 	%p27, %rd34, -1;
+	setp.eq.s64 	%p28, %rd36, -1;
+	setp.eq.s64 	%p29, %rd38, -1;
+	setp.eq.s64 	%p30, %rd40, -1;
+	setp.eq.s64 	%p31, %rd42, -1;
+	setp.eq.s64 	%p32, %rd44, -1;
+	setp.eq.s64 	%p33, %rd46, -1;
+	setp.eq.s64 	%p34, %rd48, -1;
+	.loc	1 39 22
+	div.full.f32 %r26, %r27, %r28;
+	mov.b32 	%f97, %r26;
+	.loc	1 41 37
+	selp.f32 	%f16, 0f00000000, %f97, %p34;
+	selp.f32 	%f15, 0f00000000, %f97, %p33;
+	selp.f32 	%f14, 0f00000000, %f97, %p32;
+	selp.f32 	%f13, 0f00000000, %f97, %p31;
+	selp.f32 	%f12, 0f00000000, %f97, %p30;
+	selp.f32 	%f11, 0f00000000, %f97, %p29;
+	selp.f32 	%f10, 0f00000000, %f97, %p28;
+	selp.f32 	%f9, 0f00000000, %f97, %p27;
+	selp.f32 	%f8, 0f00000000, %f97, %p26;
+	selp.f32 	%f7, 0f00000000, %f97, %p25;
+	selp.f32 	%f6, 0f00000000, %f97, %p24;
+	selp.f32 	%f5, 0f00000000, %f97, %p23;
+	selp.f32 	%f4, 0f00000000, %f97, %p22;
+	selp.f32 	%f3, 0f00000000, %f97, %p21;
+	selp.f32 	%f2, 0f00000000, %f97, %p20;
+	selp.f32 	%f1, 0f00000000, %f97, %p19;
+	.loc	1 32 36
+	mul.wide.s32 	%rd57, %r23, 12865792;
+	mul.wide.u32 	%rd58, %r30, 201028;
+	add.s64 	%rd59, %rd57, %rd58;
+	cvt.u64.u32 	%rd60, %r1;
+	and.b64  	%rd3, %rd60, 63;
+	mul.wide.u32 	%rd61, %r18, 4;
+	add.s64 	%rd62, %rd59, %rd61;
+	add.s64 	%rd63, %rd62, %rd52;
+	add.s64 	%rd149, %rd63, 12061680;
+	mov.f32 	%f453, 0f00000000;
+	mov.b32 	%r397, -64;
+	mov.u64 	%rd147, %rd149;
+	mov.f32 	%f454, %f453;
+	mov.f32 	%f455, %f453;
+	mov.f32 	%f456, %f453;
+	mov.f32 	%f457, %f453;
+	mov.f32 	%f458, %f453;
+	mov.f32 	%f459, %f453;
+	mov.f32 	%f460, %f453;
+	mov.f32 	%f461, %f453;
+	mov.f32 	%f462, %f453;
+	mov.f32 	%f463, %f453;
+	mov.f32 	%f464, %f453;
+	mov.f32 	%f465, %f453;
+	mov.f32 	%f466, %f453;
+	mov.f32 	%f467, %f453;
+	mov.f32 	%f468, %f453;
+$L__BB0_1:
+	add.s32 	%r397, %r397, 64;
+	.loc	1 33 27
+	add.s32 	%r63, %r397, %r18;
+	.loc	1 34 25
+	setp.lt.u32 	%p35, %r63, 50257;
+	.loc	1 36 34
+	add.s64 	%rd64, %rd147, -12061680;
+	add.s64 	%rd65, %rd147, -11257568;
+	add.s64 	%rd66, %rd147, -10453456;
+	add.s64 	%rd67, %rd147, -9649344;
+	add.s64 	%rd68, %rd147, -8845232;
+	add.s64 	%rd69, %rd147, -8041120;
+	add.s64 	%rd70, %rd147, -7237008;
+	add.s64 	%rd71, %rd147, -6432896;
+	add.s64 	%rd72, %rd147, -5628784;
+	add.s64 	%rd73, %rd147, -4824672;
+	add.s64 	%rd74, %rd147, -4020560;
+	add.s64 	%rd75, %rd147, -3216448;
+	add.s64 	%rd76, %rd147, -2412336;
+	add.s64 	%rd77, %rd147, -1608224;
+	add.s64 	%rd78, %rd147, -804112;
+	mov.b32 	%r333, 0;
+	.loc	1 36 52
+	mov.u32 %r31, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r31 }, [ %rd64 + 0 ];
+	@!%p35 mov.u32 %r31, %r333;
+	mov.u32 %r33, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r33 }, [ %rd65 + 0 ];
+	@!%p35 mov.u32 %r33, %r333;
+	mov.u32 %r35, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r35 }, [ %rd66 + 0 ];
+	@!%p35 mov.u32 %r35, %r333;
+	mov.u32 %r37, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r37 }, [ %rd67 + 0 ];
+	@!%p35 mov.u32 %r37, %r333;
+	mov.u32 %r39, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r39 }, [ %rd68 + 0 ];
+	@!%p35 mov.u32 %r39, %r333;
+	mov.u32 %r41, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r41 }, [ %rd69 + 0 ];
+	@!%p35 mov.u32 %r41, %r333;
+	mov.u32 %r43, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r43 }, [ %rd70 + 0 ];
+	@!%p35 mov.u32 %r43, %r333;
+	mov.u32 %r45, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r45 }, [ %rd71 + 0 ];
+	@!%p35 mov.u32 %r45, %r333;
+	mov.u32 %r47, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r47 }, [ %rd72 + 0 ];
+	@!%p35 mov.u32 %r47, %r333;
+	mov.u32 %r49, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r49 }, [ %rd73 + 0 ];
+	@!%p35 mov.u32 %r49, %r333;
+	mov.u32 %r51, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r51 }, [ %rd74 + 0 ];
+	@!%p35 mov.u32 %r51, %r333;
+	mov.u32 %r53, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r53 }, [ %rd75 + 0 ];
+	@!%p35 mov.u32 %r53, %r333;
+	mov.u32 %r55, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r55 }, [ %rd76 + 0 ];
+	@!%p35 mov.u32 %r55, %r333;
+	mov.u32 %r57, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r57 }, [ %rd77 + 0 ];
+	@!%p35 mov.u32 %r57, %r333;
+	mov.u32 %r59, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r59 }, [ %rd78 + 0 ];
+	@!%p35 mov.u32 %r59, %r333;
+	mov.u32 %r61, 0x0;
+	@%p35 ld.global.L1::evict_last.b32 { %r61 }, [ %rd147 + 0 ];
+	@!%p35 mov.u32 %r61, %r333;
+	mov.b32 	%f98, %r61;
+	mov.b32 	%f99, %r59;
+	mov.b32 	%f100, %r57;
+	mov.b32 	%f101, %r55;
+	mov.b32 	%f102, %r53;
+	mov.b32 	%f103, %r51;
+	mov.b32 	%f104, %r49;
+	mov.b32 	%f105, %r47;
+	mov.b32 	%f106, %r45;
+	mov.b32 	%f107, %r43;
+	mov.b32 	%f108, %r41;
+	mov.b32 	%f109, %r39;
+	mov.b32 	%f110, %r37;
+	mov.b32 	%f111, %r35;
+	mov.b32 	%f112, %r33;
+	mov.b32 	%f113, %r31;
+	.loc	1 42 23
+	mul.f32 	%f114, %f1, %f113;
+	mul.f32 	%f115, %f2, %f112;
+	mul.f32 	%f116, %f3, %f111;
+	mul.f32 	%f117, %f4, %f110;
+	mul.f32 	%f118, %f5, %f109;
+	mul.f32 	%f119, %f6, %f108;
+	mul.f32 	%f120, %f7, %f107;
+	mul.f32 	%f121, %f8, %f106;
+	mul.f32 	%f122, %f9, %f105;
+	mul.f32 	%f123, %f10, %f104;
+	mul.f32 	%f124, %f11, %f103;
+	mul.f32 	%f125, %f12, %f102;
+	mul.f32 	%f126, %f13, %f101;
+	mul.f32 	%f127, %f14, %f100;
+	mul.f32 	%f128, %f15, %f99;
+	mul.f32 	%f129, %f16, %f98;
+	.loc	1 45 40
+	selp.f32 	%f130, %f129, 0f80000000, %p35;
+	selp.f32 	%f131, %f128, 0f80000000, %p35;
+	selp.f32 	%f132, %f127, 0f80000000, %p35;
+	selp.f32 	%f133, %f126, 0f80000000, %p35;
+	selp.f32 	%f134, %f125, 0f80000000, %p35;
+	selp.f32 	%f135, %f124, 0f80000000, %p35;
+	selp.f32 	%f136, %f123, 0f80000000, %p35;
+	selp.f32 	%f137, %f122, 0f80000000, %p35;
+	selp.f32 	%f138, %f121, 0f80000000, %p35;
+	selp.f32 	%f139, %f120, 0f80000000, %p35;
+	selp.f32 	%f140, %f119, 0f80000000, %p35;
+	selp.f32 	%f141, %f118, 0f80000000, %p35;
+	selp.f32 	%f142, %f117, 0f80000000, %p35;
+	selp.f32 	%f143, %f116, 0f80000000, %p35;
+	selp.f32 	%f144, %f115, 0f80000000, %p35;
+	selp.f32 	%f145, %f114, 0f80000000, %p35;
+	add.f32 	%f453, %f453, %f145;
+	add.f32 	%f454, %f454, %f144;
+	add.f32 	%f455, %f455, %f143;
+	add.f32 	%f456, %f456, %f142;
+	add.f32 	%f457, %f457, %f141;
+	add.f32 	%f458, %f458, %f140;
+	add.f32 	%f459, %f459, %f139;
+	add.f32 	%f460, %f460, %f138;
+	add.f32 	%f461, %f461, %f137;
+	add.f32 	%f462, %f462, %f136;
+	add.f32 	%f463, %f463, %f135;
+	add.f32 	%f464, %f464, %f134;
+	add.f32 	%f465, %f465, %f133;
+	add.f32 	%f466, %f466, %f132;
+	add.f32 	%f467, %f467, %f131;
+	add.f32 	%f468, %f468, %f130;
+	.loc	1 32 36
+	add.s64 	%rd147, %rd147, 256;
+	setp.lt.u32 	%p67, %r397, 50193;
+	@%p67 bra 	$L__BB0_1;
+	.loc	1 0 36
+	cvt.u32.u64 	%r101, %rd2;
+$L__tmp1:
+	.loc	2 243 36
+	mov.b32 	%r102, %f453;
+	shfl.sync.bfly.b32	%r103, %r102, 16, 31, -1;
+	mov.b32 	%f146, %r103;
+$L__tmp2:
+	.loc	2 233 15
+	add.f32 	%f147, %f453, %f146;
+$L__tmp3:
+	.loc	2 243 36
+	mov.b32 	%r104, %f147;
+	shfl.sync.bfly.b32	%r105, %r104, 8, 31, -1;
+	mov.b32 	%f148, %r105;
+$L__tmp4:
+	.loc	2 233 15
+	add.f32 	%f149, %f147, %f148;
+$L__tmp5:
+	.loc	2 243 36
+	mov.b32 	%r106, %f149;
+	shfl.sync.bfly.b32	%r107, %r106, 4, 31, -1;
+	mov.b32 	%f150, %r107;
+$L__tmp6:
+	.loc	2 233 15
+	add.f32 	%f151, %f149, %f150;
+$L__tmp7:
+	.loc	2 243 36
+	mov.b32 	%r108, %f151;
+	shfl.sync.bfly.b32	%r109, %r108, 2, 31, -1;
+	mov.b32 	%f152, %r109;
+$L__tmp8:
+	.loc	2 233 15
+	add.f32 	%f153, %f151, %f152;
+$L__tmp9:
+	.loc	2 243 36
+	mov.b32 	%r110, %f153;
+	shfl.sync.bfly.b32	%r111, %r110, 1, 31, -1;
+	mov.b32 	%f154, %r111;
+$L__tmp10:
+	.loc	2 233 15
+	add.f32 	%f155, %f153, %f154;
+$L__tmp11:
+	.loc	2 243 36
+	mov.b32 	%r112, %f454;
+	shfl.sync.bfly.b32	%r113, %r112, 16, 31, -1;
+	mov.b32 	%f156, %r113;
+$L__tmp12:
+	.loc	2 233 15
+	add.f32 	%f157, %f454, %f156;
+$L__tmp13:
+	.loc	2 243 36
+	mov.b32 	%r114, %f157;
+	shfl.sync.bfly.b32	%r115, %r114, 8, 31, -1;
+	mov.b32 	%f158, %r115;
+$L__tmp14:
+	.loc	2 233 15
+	add.f32 	%f159, %f157, %f158;
+$L__tmp15:
+	.loc	2 243 36
+	mov.b32 	%r116, %f159;
+	shfl.sync.bfly.b32	%r117, %r116, 4, 31, -1;
+	mov.b32 	%f160, %r117;
+$L__tmp16:
+	.loc	2 233 15
+	add.f32 	%f161, %f159, %f160;
+$L__tmp17:
+	.loc	2 243 36
+	mov.b32 	%r118, %f161;
+	shfl.sync.bfly.b32	%r119, %r118, 2, 31, -1;
+	mov.b32 	%f162, %r119;
+$L__tmp18:
+	.loc	2 233 15
+	add.f32 	%f163, %f161, %f162;
+$L__tmp19:
+	.loc	2 243 36
+	mov.b32 	%r120, %f163;
+	shfl.sync.bfly.b32	%r121, %r120, 1, 31, -1;
+	mov.b32 	%f164, %r121;
+$L__tmp20:
+	.loc	2 233 15
+	add.f32 	%f165, %f163, %f164;
+$L__tmp21:
+	.loc	2 243 36
+	mov.b32 	%r122, %f455;
+	shfl.sync.bfly.b32	%r123, %r122, 16, 31, -1;
+	mov.b32 	%f166, %r123;
+$L__tmp22:
+	.loc	2 233 15
+	add.f32 	%f167, %f455, %f166;
+$L__tmp23:
+	.loc	2 243 36
+	mov.b32 	%r124, %f167;
+	shfl.sync.bfly.b32	%r125, %r124, 8, 31, -1;
+	mov.b32 	%f168, %r125;
+$L__tmp24:
+	.loc	2 233 15
+	add.f32 	%f169, %f167, %f168;
+$L__tmp25:
+	.loc	2 243 36
+	mov.b32 	%r126, %f169;
+	shfl.sync.bfly.b32	%r127, %r126, 4, 31, -1;
+	mov.b32 	%f170, %r127;
+$L__tmp26:
+	.loc	2 233 15
+	add.f32 	%f171, %f169, %f170;
+$L__tmp27:
+	.loc	2 243 36
+	mov.b32 	%r128, %f171;
+	shfl.sync.bfly.b32	%r129, %r128, 2, 31, -1;
+	mov.b32 	%f172, %r129;
+$L__tmp28:
+	.loc	2 233 15
+	add.f32 	%f173, %f171, %f172;
+$L__tmp29:
+	.loc	2 243 36
+	mov.b32 	%r130, %f173;
+	shfl.sync.bfly.b32	%r131, %r130, 1, 31, -1;
+	mov.b32 	%f174, %r131;
+$L__tmp30:
+	.loc	2 233 15
+	add.f32 	%f175, %f173, %f174;
+$L__tmp31:
+	.loc	2 243 36
+	mov.b32 	%r132, %f456;
+	shfl.sync.bfly.b32	%r133, %r132, 16, 31, -1;
+	mov.b32 	%f176, %r133;
+$L__tmp32:
+	.loc	2 233 15
+	add.f32 	%f177, %f456, %f176;
+$L__tmp33:
+	.loc	2 243 36
+	mov.b32 	%r134, %f177;
+	shfl.sync.bfly.b32	%r135, %r134, 8, 31, -1;
+	mov.b32 	%f178, %r135;
+$L__tmp34:
+	.loc	2 233 15
+	add.f32 	%f179, %f177, %f178;
+$L__tmp35:
+	.loc	2 243 36
+	mov.b32 	%r136, %f179;
+	shfl.sync.bfly.b32	%r137, %r136, 4, 31, -1;
+	mov.b32 	%f180, %r137;
+$L__tmp36:
+	.loc	2 233 15
+	add.f32 	%f181, %f179, %f180;
+$L__tmp37:
+	.loc	2 243 36
+	mov.b32 	%r138, %f181;
+	shfl.sync.bfly.b32	%r139, %r138, 2, 31, -1;
+	mov.b32 	%f182, %r139;
+$L__tmp38:
+	.loc	2 233 15
+	add.f32 	%f183, %f181, %f182;
+$L__tmp39:
+	.loc	2 243 36
+	mov.b32 	%r140, %f183;
+	shfl.sync.bfly.b32	%r141, %r140, 1, 31, -1;
+	mov.b32 	%f184, %r141;
+$L__tmp40:
+	.loc	2 233 15
+	add.f32 	%f185, %f183, %f184;
+$L__tmp41:
+	.loc	2 243 36
+	mov.b32 	%r142, %f457;
+	shfl.sync.bfly.b32	%r143, %r142, 16, 31, -1;
+	mov.b32 	%f186, %r143;
+$L__tmp42:
+	.loc	2 233 15
+	add.f32 	%f187, %f457, %f186;
+$L__tmp43:
+	.loc	2 243 36
+	mov.b32 	%r144, %f187;
+	shfl.sync.bfly.b32	%r145, %r144, 8, 31, -1;
+	mov.b32 	%f188, %r145;
+$L__tmp44:
+	.loc	2 233 15
+	add.f32 	%f189, %f187, %f188;
+$L__tmp45:
+	.loc	2 243 36
+	mov.b32 	%r146, %f189;
+	shfl.sync.bfly.b32	%r147, %r146, 4, 31, -1;
+	mov.b32 	%f190, %r147;
+$L__tmp46:
+	.loc	2 233 15
+	add.f32 	%f191, %f189, %f190;
+$L__tmp47:
+	.loc	2 243 36
+	mov.b32 	%r148, %f191;
+	shfl.sync.bfly.b32	%r149, %r148, 2, 31, -1;
+	mov.b32 	%f192, %r149;
+$L__tmp48:
+	.loc	2 233 15
+	add.f32 	%f193, %f191, %f192;
+$L__tmp49:
+	.loc	2 243 36
+	mov.b32 	%r150, %f193;
+	shfl.sync.bfly.b32	%r151, %r150, 1, 31, -1;
+	mov.b32 	%f194, %r151;
+$L__tmp50:
+	.loc	2 233 15
+	add.f32 	%f195, %f193, %f194;
+$L__tmp51:
+	.loc	2 243 36
+	mov.b32 	%r152, %f458;
+	shfl.sync.bfly.b32	%r153, %r152, 16, 31, -1;
+	mov.b32 	%f196, %r153;
+$L__tmp52:
+	.loc	2 233 15
+	add.f32 	%f197, %f458, %f196;
+$L__tmp53:
+	.loc	2 243 36
+	mov.b32 	%r154, %f197;
+	shfl.sync.bfly.b32	%r155, %r154, 8, 31, -1;
+	mov.b32 	%f198, %r155;
+$L__tmp54:
+	.loc	2 233 15
+	add.f32 	%f199, %f197, %f198;
+$L__tmp55:
+	.loc	2 243 36
+	mov.b32 	%r156, %f199;
+	shfl.sync.bfly.b32	%r157, %r156, 4, 31, -1;
+	mov.b32 	%f200, %r157;
+$L__tmp56:
+	.loc	2 233 15
+	add.f32 	%f201, %f199, %f200;
+$L__tmp57:
+	.loc	2 243 36
+	mov.b32 	%r158, %f201;
+	shfl.sync.bfly.b32	%r159, %r158, 2, 31, -1;
+	mov.b32 	%f202, %r159;
+$L__tmp58:
+	.loc	2 233 15
+	add.f32 	%f203, %f201, %f202;
+$L__tmp59:
+	.loc	2 243 36
+	mov.b32 	%r160, %f203;
+	shfl.sync.bfly.b32	%r161, %r160, 1, 31, -1;
+	mov.b32 	%f204, %r161;
+$L__tmp60:
+	.loc	2 233 15
+	add.f32 	%f205, %f203, %f204;
+$L__tmp61:
+	.loc	2 243 36
+	mov.b32 	%r162, %f459;
+	shfl.sync.bfly.b32	%r163, %r162, 16, 31, -1;
+	mov.b32 	%f206, %r163;
+$L__tmp62:
+	.loc	2 233 15
+	add.f32 	%f207, %f459, %f206;
+$L__tmp63:
+	.loc	2 243 36
+	mov.b32 	%r164, %f207;
+	shfl.sync.bfly.b32	%r165, %r164, 8, 31, -1;
+	mov.b32 	%f208, %r165;
+$L__tmp64:
+	.loc	2 233 15
+	add.f32 	%f209, %f207, %f208;
+$L__tmp65:
+	.loc	2 243 36
+	mov.b32 	%r166, %f209;
+	shfl.sync.bfly.b32	%r167, %r166, 4, 31, -1;
+	mov.b32 	%f210, %r167;
+$L__tmp66:
+	.loc	2 233 15
+	add.f32 	%f211, %f209, %f210;
+$L__tmp67:
+	.loc	2 243 36
+	mov.b32 	%r168, %f211;
+	shfl.sync.bfly.b32	%r169, %r168, 2, 31, -1;
+	mov.b32 	%f212, %r169;
+$L__tmp68:
+	.loc	2 233 15
+	add.f32 	%f213, %f211, %f212;
+$L__tmp69:
+	.loc	2 243 36
+	mov.b32 	%r170, %f213;
+	shfl.sync.bfly.b32	%r171, %r170, 1, 31, -1;
+	mov.b32 	%f214, %r171;
+$L__tmp70:
+	.loc	2 233 15
+	add.f32 	%f215, %f213, %f214;
+$L__tmp71:
+	.loc	2 243 36
+	mov.b32 	%r172, %f460;
+	shfl.sync.bfly.b32	%r173, %r172, 16, 31, -1;
+	mov.b32 	%f216, %r173;
+$L__tmp72:
+	.loc	2 233 15
+	add.f32 	%f217, %f460, %f216;
+$L__tmp73:
+	.loc	2 243 36
+	mov.b32 	%r174, %f217;
+	shfl.sync.bfly.b32	%r175, %r174, 8, 31, -1;
+	mov.b32 	%f218, %r175;
+$L__tmp74:
+	.loc	2 233 15
+	add.f32 	%f219, %f217, %f218;
+$L__tmp75:
+	.loc	2 243 36
+	mov.b32 	%r176, %f219;
+	shfl.sync.bfly.b32	%r177, %r176, 4, 31, -1;
+	mov.b32 	%f220, %r177;
+$L__tmp76:
+	.loc	2 233 15
+	add.f32 	%f221, %f219, %f220;
+$L__tmp77:
+	.loc	2 243 36
+	mov.b32 	%r178, %f221;
+	shfl.sync.bfly.b32	%r179, %r178, 2, 31, -1;
+	mov.b32 	%f222, %r179;
+$L__tmp78:
+	.loc	2 233 15
+	add.f32 	%f223, %f221, %f222;
+$L__tmp79:
+	.loc	2 243 36
+	mov.b32 	%r180, %f223;
+	shfl.sync.bfly.b32	%r181, %r180, 1, 31, -1;
+	mov.b32 	%f224, %r181;
+$L__tmp80:
+	.loc	2 233 15
+	add.f32 	%f225, %f223, %f224;
+$L__tmp81:
+	.loc	2 243 36
+	mov.b32 	%r182, %f461;
+	shfl.sync.bfly.b32	%r183, %r182, 16, 31, -1;
+	mov.b32 	%f226, %r183;
+$L__tmp82:
+	.loc	2 233 15
+	add.f32 	%f227, %f461, %f226;
+$L__tmp83:
+	.loc	2 243 36
+	mov.b32 	%r184, %f227;
+	shfl.sync.bfly.b32	%r185, %r184, 8, 31, -1;
+	mov.b32 	%f228, %r185;
+$L__tmp84:
+	.loc	2 233 15
+	add.f32 	%f229, %f227, %f228;
+$L__tmp85:
+	.loc	2 243 36
+	mov.b32 	%r186, %f229;
+	shfl.sync.bfly.b32	%r187, %r186, 4, 31, -1;
+	mov.b32 	%f230, %r187;
+$L__tmp86:
+	.loc	2 233 15
+	add.f32 	%f231, %f229, %f230;
+$L__tmp87:
+	.loc	2 243 36
+	mov.b32 	%r188, %f231;
+	shfl.sync.bfly.b32	%r189, %r188, 2, 31, -1;
+	mov.b32 	%f232, %r189;
+$L__tmp88:
+	.loc	2 233 15
+	add.f32 	%f233, %f231, %f232;
+$L__tmp89:
+	.loc	2 243 36
+	mov.b32 	%r190, %f233;
+	shfl.sync.bfly.b32	%r191, %r190, 1, 31, -1;
+	mov.b32 	%f234, %r191;
+$L__tmp90:
+	.loc	2 233 15
+	add.f32 	%f235, %f233, %f234;
+$L__tmp91:
+	.loc	2 243 36
+	mov.b32 	%r192, %f462;
+	shfl.sync.bfly.b32	%r193, %r192, 16, 31, -1;
+	mov.b32 	%f236, %r193;
+$L__tmp92:
+	.loc	2 233 15
+	add.f32 	%f237, %f462, %f236;
+$L__tmp93:
+	.loc	2 243 36
+	mov.b32 	%r194, %f237;
+	shfl.sync.bfly.b32	%r195, %r194, 8, 31, -1;
+	mov.b32 	%f238, %r195;
+$L__tmp94:
+	.loc	2 233 15
+	add.f32 	%f239, %f237, %f238;
+$L__tmp95:
+	.loc	2 243 36
+	mov.b32 	%r196, %f239;
+	shfl.sync.bfly.b32	%r197, %r196, 4, 31, -1;
+	mov.b32 	%f240, %r197;
+$L__tmp96:
+	.loc	2 233 15
+	add.f32 	%f241, %f239, %f240;
+$L__tmp97:
+	.loc	2 243 36
+	mov.b32 	%r198, %f241;
+	shfl.sync.bfly.b32	%r199, %r198, 2, 31, -1;
+	mov.b32 	%f242, %r199;
+$L__tmp98:
+	.loc	2 233 15
+	add.f32 	%f243, %f241, %f242;
+$L__tmp99:
+	.loc	2 243 36
+	mov.b32 	%r200, %f243;
+	shfl.sync.bfly.b32	%r201, %r200, 1, 31, -1;
+	mov.b32 	%f244, %r201;
+$L__tmp100:
+	.loc	2 233 15
+	add.f32 	%f245, %f243, %f244;
+$L__tmp101:
+	.loc	2 243 36
+	mov.b32 	%r202, %f463;
+	shfl.sync.bfly.b32	%r203, %r202, 16, 31, -1;
+	mov.b32 	%f246, %r203;
+$L__tmp102:
+	.loc	2 233 15
+	add.f32 	%f247, %f463, %f246;
+$L__tmp103:
+	.loc	2 243 36
+	mov.b32 	%r204, %f247;
+	shfl.sync.bfly.b32	%r205, %r204, 8, 31, -1;
+	mov.b32 	%f248, %r205;
+$L__tmp104:
+	.loc	2 233 15
+	add.f32 	%f249, %f247, %f248;
+$L__tmp105:
+	.loc	2 243 36
+	mov.b32 	%r206, %f249;
+	shfl.sync.bfly.b32	%r207, %r206, 4, 31, -1;
+	mov.b32 	%f250, %r207;
+$L__tmp106:
+	.loc	2 233 15
+	add.f32 	%f251, %f249, %f250;
+$L__tmp107:
+	.loc	2 243 36
+	mov.b32 	%r208, %f251;
+	shfl.sync.bfly.b32	%r209, %r208, 2, 31, -1;
+	mov.b32 	%f252, %r209;
+$L__tmp108:
+	.loc	2 233 15
+	add.f32 	%f253, %f251, %f252;
+$L__tmp109:
+	.loc	2 243 36
+	mov.b32 	%r210, %f253;
+	shfl.sync.bfly.b32	%r211, %r210, 1, 31, -1;
+	mov.b32 	%f254, %r211;
+$L__tmp110:
+	.loc	2 233 15
+	add.f32 	%f255, %f253, %f254;
+$L__tmp111:
+	.loc	2 243 36
+	mov.b32 	%r212, %f464;
+	shfl.sync.bfly.b32	%r213, %r212, 16, 31, -1;
+	mov.b32 	%f256, %r213;
+$L__tmp112:
+	.loc	2 233 15
+	add.f32 	%f257, %f464, %f256;
+$L__tmp113:
+	.loc	2 243 36
+	mov.b32 	%r214, %f257;
+	shfl.sync.bfly.b32	%r215, %r214, 8, 31, -1;
+	mov.b32 	%f258, %r215;
+$L__tmp114:
+	.loc	2 233 15
+	add.f32 	%f259, %f257, %f258;
+$L__tmp115:
+	.loc	2 243 36
+	mov.b32 	%r216, %f259;
+	shfl.sync.bfly.b32	%r217, %r216, 4, 31, -1;
+	mov.b32 	%f260, %r217;
+$L__tmp116:
+	.loc	2 233 15
+	add.f32 	%f261, %f259, %f260;
+$L__tmp117:
+	.loc	2 243 36
+	mov.b32 	%r218, %f261;
+	shfl.sync.bfly.b32	%r219, %r218, 2, 31, -1;
+	mov.b32 	%f262, %r219;
+$L__tmp118:
+	.loc	2 233 15
+	add.f32 	%f263, %f261, %f262;
+$L__tmp119:
+	.loc	2 243 36
+	mov.b32 	%r220, %f263;
+	shfl.sync.bfly.b32	%r221, %r220, 1, 31, -1;
+	mov.b32 	%f264, %r221;
+$L__tmp120:
+	.loc	2 233 15
+	add.f32 	%f265, %f263, %f264;
+$L__tmp121:
+	.loc	2 243 36
+	mov.b32 	%r222, %f465;
+	shfl.sync.bfly.b32	%r223, %r222, 16, 31, -1;
+	mov.b32 	%f266, %r223;
+$L__tmp122:
+	.loc	2 233 15
+	add.f32 	%f267, %f465, %f266;
+$L__tmp123:
+	.loc	2 243 36
+	mov.b32 	%r224, %f267;
+	shfl.sync.bfly.b32	%r225, %r224, 8, 31, -1;
+	mov.b32 	%f268, %r225;
+$L__tmp124:
+	.loc	2 233 15
+	add.f32 	%f269, %f267, %f268;
+$L__tmp125:
+	.loc	2 243 36
+	mov.b32 	%r226, %f269;
+	shfl.sync.bfly.b32	%r227, %r226, 4, 31, -1;
+	mov.b32 	%f270, %r227;
+$L__tmp126:
+	.loc	2 233 15
+	add.f32 	%f271, %f269, %f270;
+$L__tmp127:
+	.loc	2 243 36
+	mov.b32 	%r228, %f271;
+	shfl.sync.bfly.b32	%r229, %r228, 2, 31, -1;
+	mov.b32 	%f272, %r229;
+$L__tmp128:
+	.loc	2 233 15
+	add.f32 	%f273, %f271, %f272;
+$L__tmp129:
+	.loc	2 243 36
+	mov.b32 	%r230, %f273;
+	shfl.sync.bfly.b32	%r231, %r230, 1, 31, -1;
+	mov.b32 	%f274, %r231;
+$L__tmp130:
+	.loc	2 233 15
+	add.f32 	%f275, %f273, %f274;
+$L__tmp131:
+	.loc	2 243 36
+	mov.b32 	%r232, %f466;
+	shfl.sync.bfly.b32	%r233, %r232, 16, 31, -1;
+	mov.b32 	%f276, %r233;
+$L__tmp132:
+	.loc	2 233 15
+	add.f32 	%f277, %f466, %f276;
+$L__tmp133:
+	.loc	2 243 36
+	mov.b32 	%r234, %f277;
+	shfl.sync.bfly.b32	%r235, %r234, 8, 31, -1;
+	mov.b32 	%f278, %r235;
+$L__tmp134:
+	.loc	2 233 15
+	add.f32 	%f279, %f277, %f278;
+$L__tmp135:
+	.loc	2 243 36
+	mov.b32 	%r236, %f279;
+	shfl.sync.bfly.b32	%r237, %r236, 4, 31, -1;
+	mov.b32 	%f280, %r237;
+$L__tmp136:
+	.loc	2 233 15
+	add.f32 	%f281, %f279, %f280;
+$L__tmp137:
+	.loc	2 243 36
+	mov.b32 	%r238, %f281;
+	shfl.sync.bfly.b32	%r239, %r238, 2, 31, -1;
+	mov.b32 	%f282, %r239;
+$L__tmp138:
+	.loc	2 233 15
+	add.f32 	%f283, %f281, %f282;
+$L__tmp139:
+	.loc	2 243 36
+	mov.b32 	%r240, %f283;
+	shfl.sync.bfly.b32	%r241, %r240, 1, 31, -1;
+	mov.b32 	%f284, %r241;
+$L__tmp140:
+	.loc	2 233 15
+	add.f32 	%f285, %f283, %f284;
+$L__tmp141:
+	.loc	2 243 36
+	mov.b32 	%r242, %f467;
+	shfl.sync.bfly.b32	%r243, %r242, 16, 31, -1;
+	mov.b32 	%f286, %r243;
+$L__tmp142:
+	.loc	2 233 15
+	add.f32 	%f287, %f467, %f286;
+$L__tmp143:
+	.loc	2 243 36
+	mov.b32 	%r244, %f287;
+	shfl.sync.bfly.b32	%r245, %r244, 8, 31, -1;
+	mov.b32 	%f288, %r245;
+$L__tmp144:
+	.loc	2 233 15
+	add.f32 	%f289, %f287, %f288;
+$L__tmp145:
+	.loc	2 243 36
+	mov.b32 	%r246, %f289;
+	shfl.sync.bfly.b32	%r247, %r246, 4, 31, -1;
+	mov.b32 	%f290, %r247;
+$L__tmp146:
+	.loc	2 233 15
+	add.f32 	%f291, %f289, %f290;
+$L__tmp147:
+	.loc	2 243 36
+	mov.b32 	%r248, %f291;
+	shfl.sync.bfly.b32	%r249, %r248, 2, 31, -1;
+	mov.b32 	%f292, %r249;
+$L__tmp148:
+	.loc	2 233 15
+	add.f32 	%f293, %f291, %f292;
+$L__tmp149:
+	.loc	2 243 36
+	mov.b32 	%r250, %f293;
+	shfl.sync.bfly.b32	%r251, %r250, 1, 31, -1;
+	mov.b32 	%f294, %r251;
+$L__tmp150:
+	.loc	2 233 15
+	add.f32 	%f295, %f293, %f294;
+$L__tmp151:
+	.loc	2 243 36
+	mov.b32 	%r252, %f468;
+	shfl.sync.bfly.b32	%r253, %r252, 16, 31, -1;
+	mov.b32 	%f296, %r253;
+$L__tmp152:
+	.loc	2 233 15
+	add.f32 	%f297, %f468, %f296;
+$L__tmp153:
+	.loc	2 243 36
+	mov.b32 	%r254, %f297;
+	shfl.sync.bfly.b32	%r255, %r254, 8, 31, -1;
+	mov.b32 	%f298, %r255;
+$L__tmp154:
+	.loc	2 233 15
+	add.f32 	%f299, %f297, %f298;
+$L__tmp155:
+	.loc	2 243 36
+	mov.b32 	%r256, %f299;
+	shfl.sync.bfly.b32	%r257, %r256, 4, 31, -1;
+	mov.b32 	%f300, %r257;
+$L__tmp156:
+	.loc	2 233 15
+	add.f32 	%f301, %f299, %f300;
+$L__tmp157:
+	.loc	2 243 36
+	mov.b32 	%r258, %f301;
+	shfl.sync.bfly.b32	%r259, %r258, 2, 31, -1;
+	mov.b32 	%f302, %r259;
+$L__tmp158:
+	.loc	2 233 15
+	add.f32 	%f303, %f301, %f302;
+$L__tmp159:
+	.loc	2 243 36
+	mov.b32 	%r260, %f303;
+	shfl.sync.bfly.b32	%r261, %r260, 1, 31, -1;
+	mov.b32 	%f304, %r261;
+$L__tmp160:
+	.loc	2 233 15
+	add.f32 	%f305, %f303, %f304;
+$L__tmp161:
+	.loc	2 243 36
+	setp.eq.s32 	%p68, %r2, 0;
+	shr.u32 	%r262, %r1, 3;
+	and.b32  	%r263, %r262, 4;
+	shl.b32 	%r264, %r101, 3;
+	or.b32  	%r265, %r264, %r263;
+	mov.u32 	%r266, global_smem;
+	add.s32 	%r64, %r266, %r265;
+	mov.b32 	%r65, %f155;
+	@%p68 st.shared.b32 [ %r64 + 0 ], %r65;
+	shl.b32 	%r267, %r3, 3;
+	or.b32  	%r268, %r267, %r263;
+	add.s32 	%r66, %r266, %r268;
+	mov.b32 	%r67, %f165;
+	@%p68 st.shared.b32 [ %r66 + 0 ], %r67;
+	shl.b32 	%r269, %r4, 3;
+	or.b32  	%r270, %r269, %r263;
+	add.s32 	%r68, %r266, %r270;
+	mov.b32 	%r69, %f175;
+	@%p68 st.shared.b32 [ %r68 + 0 ], %r69;
+	shl.b32 	%r271, %r5, 3;
+	or.b32  	%r272, %r271, %r263;
+	add.s32 	%r70, %r266, %r272;
+	mov.b32 	%r71, %f185;
+	@%p68 st.shared.b32 [ %r70 + 0 ], %r71;
+	shl.b32 	%r273, %r6, 3;
+	or.b32  	%r274, %r273, %r263;
+	add.s32 	%r72, %r266, %r274;
+	mov.b32 	%r73, %f195;
+	@%p68 st.shared.b32 [ %r72 + 0 ], %r73;
+	shl.b32 	%r275, %r7, 3;
+	or.b32  	%r276, %r275, %r263;
+	add.s32 	%r74, %r266, %r276;
+	mov.b32 	%r75, %f205;
+	@%p68 st.shared.b32 [ %r74 + 0 ], %r75;
+	shl.b32 	%r277, %r8, 3;
+	or.b32  	%r278, %r277, %r263;
+	add.s32 	%r76, %r266, %r278;
+	mov.b32 	%r77, %f215;
+	@%p68 st.shared.b32 [ %r76 + 0 ], %r77;
+	shl.b32 	%r279, %r9, 3;
+	or.b32  	%r280, %r279, %r263;
+	add.s32 	%r78, %r266, %r280;
+	mov.b32 	%r79, %f225;
+	@%p68 st.shared.b32 [ %r78 + 0 ], %r79;
+	shl.b32 	%r281, %r10, 3;
+	or.b32  	%r282, %r281, %r263;
+	add.s32 	%r80, %r266, %r282;
+	mov.b32 	%r81, %f235;
+	@%p68 st.shared.b32 [ %r80 + 0 ], %r81;
+	shl.b32 	%r283, %r11, 3;
+	or.b32  	%r284, %r283, %r263;
+	add.s32 	%r82, %r266, %r284;
+	mov.b32 	%r83, %f245;
+	@%p68 st.shared.b32 [ %r82 + 0 ], %r83;
+	shl.b32 	%r285, %r12, 3;
+	or.b32  	%r286, %r285, %r263;
+	add.s32 	%r84, %r266, %r286;
+	mov.b32 	%r85, %f255;
+	@%p68 st.shared.b32 [ %r84 + 0 ], %r85;
+	shl.b32 	%r287, %r13, 3;
+	or.b32  	%r288, %r287, %r263;
+	add.s32 	%r86, %r266, %r288;
+	mov.b32 	%r87, %f265;
+	@%p68 st.shared.b32 [ %r86 + 0 ], %r87;
+	shl.b32 	%r289, %r14, 3;
+	or.b32  	%r290, %r289, %r263;
+	add.s32 	%r88, %r266, %r290;
+	mov.b32 	%r89, %f275;
+	@%p68 st.shared.b32 [ %r88 + 0 ], %r89;
+	shl.b32 	%r291, %r15, 3;
+	or.b32  	%r292, %r291, %r263;
+	add.s32 	%r90, %r266, %r292;
+	mov.b32 	%r91, %f285;
+	@%p68 st.shared.b32 [ %r90 + 0 ], %r91;
+	shl.b32 	%r293, %r16, 3;
+	or.b32  	%r294, %r293, %r263;
+	add.s32 	%r92, %r266, %r294;
+	mov.b32 	%r93, %f295;
+	@%p68 st.shared.b32 [ %r92 + 0 ], %r93;
+	shl.b32 	%r295, %r17, 3;
+	or.b32  	%r296, %r295, %r263;
+	add.s32 	%r94, %r266, %r296;
+	mov.b32 	%r95, %f305;
+	@%p68 st.shared.b32 [ %r94 + 0 ], %r95;
+	bar.sync 	0;
+	setp.lt.s32 	%p84, %r1, 128;
+	shl.b32 	%r297, %r1, 2;
+	add.s32 	%r97, %r266, %r297;
+	@%p84 ld.shared.b32 %r96, [ %r97 + 0 ];
+	mov.b32 	%f306, %r96;
+	shfl.sync.bfly.b32	%r298, %r96, 1, 31, -1;
+	mov.b32 	%f307, %r298;
+$L__tmp162:
+	.loc	2 233 15
+	add.f32 	%f308, %f306, %f307;
+$L__tmp163:
+	.loc	2 243 36
+	and.b32  	%r299, %r1, 1;
+	setp.eq.b32 	%p86, %r299, 1;
+	not.pred 	%p87, %p86;
+	and.pred  	%p85, %p84, %p87;
+	mov.b32 	%r99, %f308;
+	@%p85 st.shared.b32 [ %r97 + 0 ], %r99;
+	bar.sync 	0;
+	add.s32 	%r300, %r266, %r264;
+	ld.shared.f32 	%f49, [%r300];
+	add.s32 	%r301, %r266, %r267;
+	ld.shared.f32 	%f50, [%r301];
+	add.s32 	%r302, %r266, %r269;
+	ld.shared.f32 	%f51, [%r302];
+	add.s32 	%r303, %r266, %r271;
+	ld.shared.f32 	%f52, [%r303];
+	add.s32 	%r304, %r266, %r273;
+	ld.shared.f32 	%f53, [%r304];
+	add.s32 	%r305, %r266, %r275;
+	ld.shared.f32 	%f54, [%r305];
+	add.s32 	%r306, %r266, %r277;
+	ld.shared.f32 	%f55, [%r306];
+	add.s32 	%r307, %r266, %r279;
+	ld.shared.f32 	%f56, [%r307];
+	add.s32 	%r308, %r266, %r281;
+	ld.shared.f32 	%f57, [%r308];
+	add.s32 	%r309, %r266, %r283;
+	ld.shared.f32 	%f58, [%r309];
+	add.s32 	%r310, %r266, %r285;
+	ld.shared.f32 	%f59, [%r310];
+	add.s32 	%r311, %r266, %r287;
+	ld.shared.f32 	%f60, [%r311];
+	add.s32 	%r312, %r266, %r289;
+	ld.shared.f32 	%f61, [%r312];
+	add.s32 	%r313, %r266, %r291;
+	ld.shared.f32 	%f62, [%r313];
+	add.s32 	%r314, %r266, %r293;
+	ld.shared.f32 	%f63, [%r314];
+	add.s32 	%r315, %r266, %r295;
+	ld.shared.f32 	%f64, [%r315];
+$L__tmp164:
+	.loc	1 51 36
+	shl.b64 	%rd80, %rd3, 1;
+	add.s64 	%rd7, %rd17, %rd80;
+	mul.lo.s64 	%rd81, %rd1, 6432896;
+	mul.lo.s64 	%rd82, %rd2, 100514;
+	add.s64 	%rd148, %rd81, %rd82;
+	add.s64 	%rd9, %rd16, %rd80;
+	add.s64 	%rd10, %rd15, %rd80;
+	mov.b32 	%r398, -64;
+	mov.u16 	%rs2, 0;
+$L__BB0_3:
+	add.s32 	%r398, %r398, 64;
+	.loc	1 52 27
+	add.s32 	%r396, %r398, %r18;
+	.loc	1 53 25
+	setp.lt.u32 	%p88, %r396, 50257;
+	.loc	1 55 35
+	add.s64 	%rd83, %rd10, %rd148;
+	add.s64 	%rd84, %rd83, 402056;
+	add.s64 	%rd85, %rd83, 804112;
+	add.s64 	%rd86, %rd83, 1206168;
+	add.s64 	%rd87, %rd83, 1608224;
+	add.s64 	%rd88, %rd83, 2010280;
+	add.s64 	%rd89, %rd83, 2412336;
+	add.s64 	%rd90, %rd83, 2814392;
+	add.s64 	%rd91, %rd83, 3216448;
+	add.s64 	%rd92, %rd83, 3618504;
+	add.s64 	%rd93, %rd83, 4020560;
+	add.s64 	%rd94, %rd83, 4422616;
+	add.s64 	%rd95, %rd83, 4824672;
+	add.s64 	%rd96, %rd83, 5226728;
+	add.s64 	%rd97, %rd83, 5628784;
+	.loc	1 55 53
+	add.s64 	%rd98, %rd83, 6030840;
+	mov.u16 %rs1, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs1 }, [ %rd83 + 0 ];
+	@!%p88 mov.u16 %rs1, %rs2;
+	mov.u16 %rs3, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs3 }, [ %rd84 + 0 ];
+	@!%p88 mov.u16 %rs3, %rs2;
+	mov.u16 %rs5, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs5 }, [ %rd85 + 0 ];
+	@!%p88 mov.u16 %rs5, %rs2;
+	mov.u16 %rs7, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs7 }, [ %rd86 + 0 ];
+	@!%p88 mov.u16 %rs7, %rs2;
+	mov.u16 %rs9, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs9 }, [ %rd87 + 0 ];
+	@!%p88 mov.u16 %rs9, %rs2;
+	mov.u16 %rs11, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs11 }, [ %rd88 + 0 ];
+	@!%p88 mov.u16 %rs11, %rs2;
+	mov.u16 %rs13, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs13 }, [ %rd89 + 0 ];
+	@!%p88 mov.u16 %rs13, %rs2;
+	mov.u16 %rs15, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs15 }, [ %rd90 + 0 ];
+	@!%p88 mov.u16 %rs15, %rs2;
+	mov.u16 %rs17, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs17 }, [ %rd91 + 0 ];
+	@!%p88 mov.u16 %rs17, %rs2;
+	mov.u16 %rs19, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs19 }, [ %rd92 + 0 ];
+	@!%p88 mov.u16 %rs19, %rs2;
+	mov.u16 %rs21, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs21 }, [ %rd93 + 0 ];
+	@!%p88 mov.u16 %rs21, %rs2;
+	mov.u16 %rs23, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs23 }, [ %rd94 + 0 ];
+	@!%p88 mov.u16 %rs23, %rs2;
+	mov.u16 %rs25, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs25 }, [ %rd95 + 0 ];
+	@!%p88 mov.u16 %rs25, %rs2;
+	mov.u16 %rs27, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs27 }, [ %rd96 + 0 ];
+	@!%p88 mov.u16 %rs27, %rs2;
+	mov.u16 %rs29, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs29 }, [ %rd97 + 0 ];
+	@!%p88 mov.u16 %rs29, %rs2;
+	mov.u16 %rs31, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs31 }, [ %rd98 + 0 ];
+	@!%p88 mov.u16 %rs31, %rs2;
+	.loc	1 55 105
+	cvt.f32.bf16 %r316, %rs1;
+	mov.b32 	%f341, %r316;
+	cvt.f32.bf16 %r317, %rs3;
+	mov.b32 	%f342, %r317;
+	cvt.f32.bf16 %r318, %rs5;
+	mov.b32 	%f343, %r318;
+	cvt.f32.bf16 %r319, %rs7;
+	mov.b32 	%f344, %r319;
+	cvt.f32.bf16 %r320, %rs9;
+	mov.b32 	%f345, %r320;
+	cvt.f32.bf16 %r321, %rs11;
+	mov.b32 	%f346, %r321;
+	cvt.f32.bf16 %r322, %rs13;
+	mov.b32 	%f347, %r322;
+	cvt.f32.bf16 %r323, %rs15;
+	mov.b32 	%f348, %r323;
+	cvt.f32.bf16 %r324, %rs17;
+	mov.b32 	%f349, %r324;
+	cvt.f32.bf16 %r325, %rs19;
+	mov.b32 	%f350, %r325;
+	cvt.f32.bf16 %r326, %rs21;
+	mov.b32 	%f351, %r326;
+	cvt.f32.bf16 %r327, %rs23;
+	mov.b32 	%f352, %r327;
+	cvt.f32.bf16 %r328, %rs25;
+	mov.b32 	%f353, %r328;
+	cvt.f32.bf16 %r329, %rs27;
+	mov.b32 	%f354, %r329;
+	cvt.f32.bf16 %r330, %rs29;
+	mov.b32 	%f355, %r330;
+	cvt.f32.bf16 %r331, %rs31;
+	mov.b32 	%f356, %r331;
+	.loc	1 56 35
+	add.s64 	%rd99, %rd149, -12061680;
+	add.s64 	%rd100, %rd149, -11257568;
+	add.s64 	%rd101, %rd149, -10453456;
+	add.s64 	%rd102, %rd149, -9649344;
+	add.s64 	%rd103, %rd149, -8845232;
+	add.s64 	%rd104, %rd149, -8041120;
+	add.s64 	%rd105, %rd149, -7237008;
+	add.s64 	%rd106, %rd149, -6432896;
+	add.s64 	%rd107, %rd149, -5628784;
+	add.s64 	%rd108, %rd149, -4824672;
+	add.s64 	%rd109, %rd149, -4020560;
+	add.s64 	%rd110, %rd149, -3216448;
+	add.s64 	%rd111, %rd149, -2412336;
+	add.s64 	%rd112, %rd149, -1608224;
+	add.s64 	%rd113, %rd149, -804112;
+	.loc	1 56 53
+	mov.u32 %r332, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r332 }, [ %rd99 + 0 ];
+	@!%p88 mov.u32 %r332, %r333;
+	mov.b32 	%f357, %r332;
+	mov.u32 %r334, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r334 }, [ %rd100 + 0 ];
+	@!%p88 mov.u32 %r334, %r333;
+	mov.b32 	%f358, %r334;
+	mov.u32 %r336, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r336 }, [ %rd101 + 0 ];
+	@!%p88 mov.u32 %r336, %r333;
+	mov.b32 	%f359, %r336;
+	mov.u32 %r338, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r338 }, [ %rd102 + 0 ];
+	@!%p88 mov.u32 %r338, %r333;
+	mov.b32 	%f360, %r338;
+	mov.u32 %r340, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r340 }, [ %rd103 + 0 ];
+	@!%p88 mov.u32 %r340, %r333;
+	mov.b32 	%f361, %r340;
+	mov.u32 %r342, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r342 }, [ %rd104 + 0 ];
+	@!%p88 mov.u32 %r342, %r333;
+	mov.b32 	%f362, %r342;
+	mov.u32 %r344, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r344 }, [ %rd105 + 0 ];
+	@!%p88 mov.u32 %r344, %r333;
+	mov.b32 	%f363, %r344;
+	mov.u32 %r346, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r346 }, [ %rd106 + 0 ];
+	@!%p88 mov.u32 %r346, %r333;
+	mov.b32 	%f364, %r346;
+	mov.u32 %r348, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r348 }, [ %rd107 + 0 ];
+	@!%p88 mov.u32 %r348, %r333;
+	mov.b32 	%f365, %r348;
+	mov.u32 %r350, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r350 }, [ %rd108 + 0 ];
+	@!%p88 mov.u32 %r350, %r333;
+	mov.b32 	%f366, %r350;
+	mov.u32 %r352, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r352 }, [ %rd109 + 0 ];
+	@!%p88 mov.u32 %r352, %r333;
+	mov.b32 	%f367, %r352;
+	mov.u32 %r354, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r354 }, [ %rd110 + 0 ];
+	@!%p88 mov.u32 %r354, %r333;
+	mov.b32 	%f368, %r354;
+	mov.u32 %r356, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r356 }, [ %rd111 + 0 ];
+	@!%p88 mov.u32 %r356, %r333;
+	mov.b32 	%f369, %r356;
+	mov.u32 %r358, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r358 }, [ %rd112 + 0 ];
+	@!%p88 mov.u32 %r358, %r333;
+	mov.b32 	%f370, %r358;
+	mov.u32 %r360, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r360 }, [ %rd113 + 0 ];
+	@!%p88 mov.u32 %r360, %r333;
+	mov.b32 	%f371, %r360;
+	mov.u32 %r362, 0x0;
+	@%p88 ld.global.L1::evict_first.b32 { %r362 }, [ %rd149 + 0 ];
+	@!%p88 mov.u32 %r362, %r333;
+	mov.b32 	%f372, %r362;
+	.loc	1 57 35
+	add.s64 	%rd115, %rd9, %rd148;
+	add.s64 	%rd116, %rd115, 402056;
+	add.s64 	%rd117, %rd115, 804112;
+	add.s64 	%rd118, %rd115, 1206168;
+	add.s64 	%rd119, %rd115, 1608224;
+	add.s64 	%rd120, %rd115, 2010280;
+	add.s64 	%rd121, %rd115, 2412336;
+	add.s64 	%rd122, %rd115, 2814392;
+	add.s64 	%rd123, %rd115, 3216448;
+	add.s64 	%rd124, %rd115, 3618504;
+	add.s64 	%rd125, %rd115, 4020560;
+	add.s64 	%rd126, %rd115, 4422616;
+	add.s64 	%rd127, %rd115, 4824672;
+	add.s64 	%rd128, %rd115, 5226728;
+	add.s64 	%rd129, %rd115, 5628784;
+	.loc	1 57 53
+	add.s64 	%rd130, %rd115, 6030840;
+	mov.u16 %rs49, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs49 }, [ %rd115 + 0 ];
+	@!%p88 mov.u16 %rs49, %rs2;
+	mov.u16 %rs51, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs51 }, [ %rd116 + 0 ];
+	@!%p88 mov.u16 %rs51, %rs2;
+	mov.u16 %rs53, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs53 }, [ %rd117 + 0 ];
+	@!%p88 mov.u16 %rs53, %rs2;
+	mov.u16 %rs55, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs55 }, [ %rd118 + 0 ];
+	@!%p88 mov.u16 %rs55, %rs2;
+	mov.u16 %rs57, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs57 }, [ %rd119 + 0 ];
+	@!%p88 mov.u16 %rs57, %rs2;
+	mov.u16 %rs59, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs59 }, [ %rd120 + 0 ];
+	@!%p88 mov.u16 %rs59, %rs2;
+	mov.u16 %rs61, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs61 }, [ %rd121 + 0 ];
+	@!%p88 mov.u16 %rs61, %rs2;
+	mov.u16 %rs63, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs63 }, [ %rd122 + 0 ];
+	@!%p88 mov.u16 %rs63, %rs2;
+	mov.u16 %rs65, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs65 }, [ %rd123 + 0 ];
+	@!%p88 mov.u16 %rs65, %rs2;
+	mov.u16 %rs67, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs67 }, [ %rd124 + 0 ];
+	@!%p88 mov.u16 %rs67, %rs2;
+	mov.u16 %rs69, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs69 }, [ %rd125 + 0 ];
+	@!%p88 mov.u16 %rs69, %rs2;
+	mov.u16 %rs71, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs71 }, [ %rd126 + 0 ];
+	@!%p88 mov.u16 %rs71, %rs2;
+	mov.u16 %rs73, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs73 }, [ %rd127 + 0 ];
+	@!%p88 mov.u16 %rs73, %rs2;
+	mov.u16 %rs75, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs75 }, [ %rd128 + 0 ];
+	@!%p88 mov.u16 %rs75, %rs2;
+	mov.u16 %rs77, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs77 }, [ %rd129 + 0 ];
+	@!%p88 mov.u16 %rs77, %rs2;
+	mov.u16 %rs79, 0x0;
+	@%p88 ld.global.L1::evict_first.b16 { %rs79 }, [ %rd130 + 0 ];
+	@!%p88 mov.u16 %rs79, %rs2;
+	.loc	1 57 105
+	cvt.f32.bf16 %r364, %rs49;
+	mov.b32 	%f373, %r364;
+	cvt.f32.bf16 %r365, %rs51;
+	mov.b32 	%f374, %r365;
+	cvt.f32.bf16 %r366, %rs53;
+	mov.b32 	%f375, %r366;
+	cvt.f32.bf16 %r367, %rs55;
+	mov.b32 	%f376, %r367;
+	cvt.f32.bf16 %r368, %rs57;
+	mov.b32 	%f377, %r368;
+	cvt.f32.bf16 %r369, %rs59;
+	mov.b32 	%f378, %r369;
+	cvt.f32.bf16 %r370, %rs61;
+	mov.b32 	%f379, %r370;
+	cvt.f32.bf16 %r371, %rs63;
+	mov.b32 	%f380, %r371;
+	cvt.f32.bf16 %r372, %rs65;
+	mov.b32 	%f381, %r372;
+	cvt.f32.bf16 %r373, %rs67;
+	mov.b32 	%f382, %r373;
+	cvt.f32.bf16 %r374, %rs69;
+	mov.b32 	%f383, %r374;
+	cvt.f32.bf16 %r375, %rs71;
+	mov.b32 	%f384, %r375;
+	cvt.f32.bf16 %r376, %rs73;
+	mov.b32 	%f385, %r376;
+	cvt.f32.bf16 %r377, %rs75;
+	mov.b32 	%f386, %r377;
+	cvt.f32.bf16 %r378, %rs77;
+	mov.b32 	%f387, %r378;
+	cvt.f32.bf16 %r379, %rs79;
+	mov.b32 	%f388, %r379;
+	.loc	1 65 23
+	mul.f32 	%f310, %f373, 0f3FB8AA3B;
+	ex2.approx.f32 %f309, %f310;
+	mul.f32 	%f312, %f374, 0f3FB8AA3B;
+	ex2.approx.f32 %f311, %f312;
+	mul.f32 	%f314, %f375, 0f3FB8AA3B;
+	ex2.approx.f32 %f313, %f314;
+	mul.f32 	%f316, %f376, 0f3FB8AA3B;
+	ex2.approx.f32 %f315, %f316;
+	mul.f32 	%f318, %f377, 0f3FB8AA3B;
+	ex2.approx.f32 %f317, %f318;
+	mul.f32 	%f320, %f378, 0f3FB8AA3B;
+	ex2.approx.f32 %f319, %f320;
+	mul.f32 	%f322, %f379, 0f3FB8AA3B;
+	ex2.approx.f32 %f321, %f322;
+	mul.f32 	%f324, %f380, 0f3FB8AA3B;
+	ex2.approx.f32 %f323, %f324;
+	mul.f32 	%f326, %f381, 0f3FB8AA3B;
+	ex2.approx.f32 %f325, %f326;
+	mul.f32 	%f328, %f382, 0f3FB8AA3B;
+	ex2.approx.f32 %f327, %f328;
+	mul.f32 	%f330, %f383, 0f3FB8AA3B;
+	ex2.approx.f32 %f329, %f330;
+	mul.f32 	%f332, %f384, 0f3FB8AA3B;
+	ex2.approx.f32 %f331, %f332;
+	mul.f32 	%f334, %f385, 0f3FB8AA3B;
+	ex2.approx.f32 %f333, %f334;
+	mul.f32 	%f336, %f386, 0f3FB8AA3B;
+	ex2.approx.f32 %f335, %f336;
+	mul.f32 	%f338, %f387, 0f3FB8AA3B;
+	ex2.approx.f32 %f337, %f338;
+	mul.f32 	%f340, %f388, 0f3FB8AA3B;
+	ex2.approx.f32 %f339, %f340;
+	.loc	1 66 24
+	mul.f32 	%f389, %f49, %f309;
+	mul.f32 	%f390, %f50, %f311;
+	mul.f32 	%f391, %f51, %f313;
+	mul.f32 	%f392, %f52, %f315;
+	mul.f32 	%f393, %f53, %f317;
+	mul.f32 	%f394, %f54, %f319;
+	mul.f32 	%f395, %f55, %f321;
+	mul.f32 	%f396, %f56, %f323;
+	mul.f32 	%f397, %f57, %f325;
+	mul.f32 	%f398, %f58, %f327;
+	mul.f32 	%f399, %f59, %f329;
+	mul.f32 	%f400, %f60, %f331;
+	mul.f32 	%f401, %f61, %f333;
+	mul.f32 	%f402, %f62, %f335;
+	mul.f32 	%f403, %f63, %f337;
+	mul.f32 	%f404, %f64, %f339;
+	.loc	1 67 24
+	neg.f32 	%f405, %f389;
+	fma.rn.f32 	%f406, %f1, %f357, %f405;
+	neg.f32 	%f407, %f390;
+	fma.rn.f32 	%f408, %f2, %f358, %f407;
+	neg.f32 	%f409, %f391;
+	fma.rn.f32 	%f410, %f3, %f359, %f409;
+	neg.f32 	%f411, %f392;
+	fma.rn.f32 	%f412, %f4, %f360, %f411;
+	neg.f32 	%f413, %f393;
+	fma.rn.f32 	%f414, %f5, %f361, %f413;
+	neg.f32 	%f415, %f394;
+	fma.rn.f32 	%f416, %f6, %f362, %f415;
+	neg.f32 	%f417, %f395;
+	fma.rn.f32 	%f418, %f7, %f363, %f417;
+	neg.f32 	%f419, %f396;
+	fma.rn.f32 	%f420, %f8, %f364, %f419;
+	neg.f32 	%f421, %f397;
+	fma.rn.f32 	%f422, %f9, %f365, %f421;
+	neg.f32 	%f423, %f398;
+	fma.rn.f32 	%f424, %f10, %f366, %f423;
+	neg.f32 	%f425, %f399;
+	fma.rn.f32 	%f426, %f11, %f367, %f425;
+	neg.f32 	%f427, %f400;
+	fma.rn.f32 	%f428, %f12, %f368, %f427;
+	neg.f32 	%f429, %f401;
+	fma.rn.f32 	%f430, %f13, %f369, %f429;
+	neg.f32 	%f431, %f402;
+	fma.rn.f32 	%f432, %f14, %f370, %f431;
+	neg.f32 	%f433, %f403;
+	fma.rn.f32 	%f434, %f15, %f371, %f433;
+	neg.f32 	%f435, %f404;
+	fma.rn.f32 	%f436, %f16, %f372, %f435;
+	.loc	1 69 24
+	add.f32 	%f437, %f341, %f406;
+	add.f32 	%f438, %f342, %f408;
+	add.f32 	%f439, %f343, %f410;
+	add.f32 	%f440, %f344, %f412;
+	add.f32 	%f441, %f345, %f414;
+	add.f32 	%f442, %f346, %f416;
+	add.f32 	%f443, %f347, %f418;
+	add.f32 	%f444, %f348, %f420;
+	add.f32 	%f445, %f349, %f422;
+	add.f32 	%f446, %f350, %f424;
+	add.f32 	%f447, %f351, %f426;
+	add.f32 	%f448, %f352, %f428;
+	add.f32 	%f449, %f353, %f430;
+	add.f32 	%f450, %f354, %f432;
+	add.f32 	%f451, %f355, %f434;
+	add.f32 	%f452, %f356, %f436;
+	.loc	1 70 29
+	add.s64 	%rd131, %rd7, %rd148;
+	add.s64 	%rd132, %rd131, 402056;
+	add.s64 	%rd133, %rd131, 804112;
+	add.s64 	%rd134, %rd131, 1206168;
+	add.s64 	%rd135, %rd131, 1608224;
+	add.s64 	%rd136, %rd131, 2010280;
+	add.s64 	%rd137, %rd131, 2412336;
+	add.s64 	%rd138, %rd131, 2814392;
+	add.s64 	%rd139, %rd131, 3216448;
+	add.s64 	%rd140, %rd131, 3618504;
+	add.s64 	%rd141, %rd131, 4020560;
+	add.s64 	%rd142, %rd131, 4422616;
+	add.s64 	%rd143, %rd131, 4824672;
+	add.s64 	%rd144, %rd131, 5226728;
+	add.s64 	%rd145, %rd131, 5628784;
+	.loc	1 70 54
+	add.s64 	%rd146, %rd131, 6030840;
+	mov.b32 	%r380, %f437;
+	cvt.rn.bf16.f32 %rs97, %r380;
+	mov.b32 	%r381, %f438;
+	cvt.rn.bf16.f32 %rs98, %r381;
+	mov.b32 	%r382, %f439;
+	cvt.rn.bf16.f32 %rs99, %r382;
+	mov.b32 	%r383, %f440;
+	cvt.rn.bf16.f32 %rs100, %r383;
+	mov.b32 	%r384, %f441;
+	cvt.rn.bf16.f32 %rs101, %r384;
+	mov.b32 	%r385, %f442;
+	cvt.rn.bf16.f32 %rs102, %r385;
+	mov.b32 	%r386, %f443;
+	cvt.rn.bf16.f32 %rs103, %r386;
+	mov.b32 	%r387, %f444;
+	cvt.rn.bf16.f32 %rs104, %r387;
+	mov.b32 	%r388, %f445;
+	cvt.rn.bf16.f32 %rs105, %r388;
+	mov.b32 	%r389, %f446;
+	cvt.rn.bf16.f32 %rs106, %r389;
+	mov.b32 	%r390, %f447;
+	cvt.rn.bf16.f32 %rs107, %r390;
+	mov.b32 	%r391, %f448;
+	cvt.rn.bf16.f32 %rs108, %r391;
+	mov.b32 	%r392, %f449;
+	cvt.rn.bf16.f32 %rs109, %r392;
+	mov.b32 	%r393, %f450;
+	cvt.rn.bf16.f32 %rs110, %r393;
+	mov.b32 	%r394, %f451;
+	cvt.rn.bf16.f32 %rs111, %r394;
+	mov.b32 	%r395, %f452;
+	cvt.rn.bf16.f32 %rs112, %r395;
+	@%p88 st.global.b16 [ %rd131 + 0 ], { %rs97 };
+	@%p88 st.global.b16 [ %rd132 + 0 ], { %rs98 };
+	@%p88 st.global.b16 [ %rd133 + 0 ], { %rs99 };
+	@%p88 st.global.b16 [ %rd134 + 0 ], { %rs100 };
+	@%p88 st.global.b16 [ %rd135 + 0 ], { %rs101 };
+	@%p88 st.global.b16 [ %rd136 + 0 ], { %rs102 };
+	@%p88 st.global.b16 [ %rd137 + 0 ], { %rs103 };
+	@%p88 st.global.b16 [ %rd138 + 0 ], { %rs104 };
+	@%p88 st.global.b16 [ %rd139 + 0 ], { %rs105 };
+	@%p88 st.global.b16 [ %rd140 + 0 ], { %rs106 };
+	@%p88 st.global.b16 [ %rd141 + 0 ], { %rs107 };
+	@%p88 st.global.b16 [ %rd142 + 0 ], { %rs108 };
+	@%p88 st.global.b16 [ %rd143 + 0 ], { %rs109 };
+	@%p88 st.global.b16 [ %rd144 + 0 ], { %rs110 };
+	@%p88 st.global.b16 [ %rd145 + 0 ], { %rs111 };
+	@%p88 st.global.b16 [ %rd146 + 0 ], { %rs112 };
+	.loc	1 51 36
+	add.s64 	%rd149, %rd149, 256;
+	add.s64 	%rd148, %rd148, 128;
+	setp.lt.u32 	%p200, %r398, 50193;
+	@%p200 bra 	$L__BB0_3;
+	.loc	1 51 4
+	ret;
+$L__tmp165:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/kz/ckzgl7thb4xdfkfnd2tidks6mt5f3hauwfyjflbtzyepo5oxkvhk.py"
+	.file	2 "/usr/local/lib/python3.10/dist-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
+.b8 6
+.b8 27
+.b8 8
+.b8 180
+.b8 66
+.b8 12
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+.b8 0
+.b8 2
+.b8 46
+.b8 0
+.b8 135
+.b8 64
+.b8 8
+.b8 3
+.b8 8
+.b8 58
+.b8 11
+.b8 59
+.b8 11
+.b8 63
+.b8 12
+.b8 32
+.b8 11
+.b8 0
+.b8 0
+.b8 3
+.b8 46
+.b8 1
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 64
+.b8 10
+.b8 49
+.b8 19
+.b8 0
+.b8 0
+.b8 4
+.b8 29
+.b8 0
+.b8 49
+.b8 19
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 5
+.b8 29
+.b8 1
+.b8 49
+.b8 19
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 278
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2
+.b8 0
+.b8 99
+.b8 107
+.b8 122
+.b8 103
+.b8 108
+.b8 55
+.b8 116
+.b8 104
+.b8 98
+.b8 52
+.b8 120
+.b8 100
+.b8 102
+.b8 107
+.b8 102
+.b8 110
+.b8 100
+.b8 50
+.b8 116
+.b8 105
+.b8 100
+.b8 107
+.b8 115
+.b8 54
+.b8 109
+.b8 116
+.b8 53
+.b8 102
+.b8 51
+.b8 104
+.b8 97
+.b8 117
+.b8 119
+.b8 102
+.b8 121
+.b8 106
+.b8 102
+.b8 108
+.b8 98
+.b8 116
+.b8 122
+.b8 121
+.b8 101
+.b8 112
+.b8 111
+.b8 53
+.b8 111
+.b8 120
+.b8 107
+.b8 118
+.b8 104
+.b8 107
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 107
+.b8 122
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 53
+.b8 100
+.b8 54
+.b8 100
+.b8 55
+.b8 100
+.b8 101
+.b8 56
+.b8 0
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 53
+.b8 100
+.b8 54
+.b8 100
+.b8 55
+.b8 100
+.b8 101
+.b8 56
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 1
+.b8 3
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b32 125
+.b8 4
+.b32 125
+.b64 $L__tmp1
+.b64 $L__tmp164
+.b8 2
+.b8 46
+.b8 27
+.b8 5
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp163
+.b8 2
+.b8 46
+.b8 27
+.b8 4
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp163
+.b8 2
+.b8 243
+.b8 36
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 282
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 53
+.b8 100
+.b8 54
+.b8 100
+.b8 55
+.b8 100
+.b8 101
+.b8 56
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 282
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.ttgir b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..c96415498315d1a8e88080ce92b693fc3675b8a5
--- /dev/null
+++ b/.triton/dump/3a1c03243d4f9adf7326739f5f7e7c9b/triton_.ttgir
@@ -0,0 +1,92 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [4, 2], order = [1, 0], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2d3d4d5d6d7de8(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg6: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg7: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}, %arg8: i64) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<64x1xf32, #blocked>
+    %cst_0 = arith.constant dense<50257> : tensor<64x1xi64, #blocked>
+    %cst_1 = arith.constant dense<-1> : tensor<64x1xi64, #blocked>
+    %cst_2 = arith.constant dense<0.000000e+00> : tensor<64x64xf32, #blocked>
+    %c64_i64 = arith.constant 64 : i64
+    %cst_3 = arith.constant dense<50257> : tensor<1x64xi64, #blocked>
+    %c0_i32 = arith.constant 0 : i32
+    %c64_i32 = arith.constant 64 : i32
+    %c50257_i32 = arith.constant 50257 : i32
+    %cst_4 = arith.constant dense<0.000000e+00> : tensor<64x64xbf16, #blocked>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c64_i64 : i64
+    %3 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %4 = tt.expand_dims %3 {axis = 1 : i32} : (tensor<64xi32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<64x1xi32, #blocked>
+    %5 = arith.extsi %4 : tensor<64x1xi32, #blocked> to tensor<64x1xi64, #blocked>
+    %6 = tt.splat %2 : (i64) -> tensor<64x1xi64, #blocked>
+    %7 = arith.addi %6, %5 : tensor<64x1xi64, #blocked>
+    %8 = tt.make_range {end = 64 : i32, start = 0 : i32} : tensor<64xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>
+    %9 = tt.expand_dims %8 {axis = 0 : i32} : (tensor<64xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>) -> tensor<1x64xi32, #blocked>
+    %10 = arith.extsi %9 : tensor<1x64xi32, #blocked> to tensor<1x64xi64, #blocked>
+    %11 = tt.splat %arg1 : (!tt.ptr<i64, 1>) -> tensor<64x1x!tt.ptr<i64, 1>, #blocked>
+    %12 = tt.addptr %11, %7 : tensor<64x1x!tt.ptr<i64, 1>, #blocked>, tensor<64x1xi64, #blocked>
+    %13 = tt.load %12 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<64x1xi64, #blocked>
+    %14 = tt.addptr %arg2, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %15 = tt.load %14 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %16 = tt.addptr %arg3, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %17 = tt.load %16 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : f32
+    %18 = arith.muli %7, %cst_0 : tensor<64x1xi64, #blocked>
+    %19 = tt.broadcast %18 : (tensor<64x1xi64, #blocked>) -> tensor<64x64xi64, #blocked>
+    %20 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<64x64x!tt.ptr<f32, 1>, #blocked>
+    %21 = arith.cmpi ne, %13, %cst_1 : tensor<64x1xi64, #blocked>
+    %22 = arith.divf %15, %17 : f32
+    %23 = tt.splat %22 : (f32) -> tensor<64x1xf32, #blocked>
+    %24 = arith.select %21, %23, %cst : tensor<64x1xi1, #blocked>, tensor<64x1xf32, #blocked>
+    %25 = tt.broadcast %24 : (tensor<64x1xf32, #blocked>) -> tensor<64x64xf32, #blocked>
+    %26 = scf.for %arg9 = %c0_i32 to %c50257_i32 step %c64_i32 iter_args(%arg10 = %cst_2) -> (tensor<64x64xf32, #blocked>)  : i32 {
+      %33 = arith.extsi %arg9 : i32 to i64
+      %34 = tt.splat %33 : (i64) -> tensor<1x64xi64, #blocked>
+      %35 = arith.addi %34, %10 : tensor<1x64xi64, #blocked>
+      %36 = arith.cmpi slt, %35, %cst_3 : tensor<1x64xi64, #blocked>
+      %37 = tt.broadcast %35 : (tensor<1x64xi64, #blocked>) -> tensor<64x64xi64, #blocked>
+      %38 = arith.addi %37, %19 : tensor<64x64xi64, #blocked>
+      %39 = tt.addptr %20, %38 : tensor<64x64x!tt.ptr<f32, 1>, #blocked>, tensor<64x64xi64, #blocked>
+      %40 = tt.broadcast %36 : (tensor<1x64xi1, #blocked>) -> tensor<64x64xi1, #blocked>
+      %41 = tt.load %39, %40, %cst_2 {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<64x64xf32, #blocked>
+      %42 = arith.mulf %41, %25 : tensor<64x64xf32, #blocked>
+      %43 = arith.addf %arg10, %42 : tensor<64x64xf32, #blocked>
+      %44 = arith.select %40, %43, %arg10 : tensor<64x64xi1, #blocked>, tensor<64x64xf32, #blocked>
+      scf.yield %44 : tensor<64x64xf32, #blocked>
+    }
+    %27 = "tt.reduce"(%26) <{axis = 1 : i32}> ({
+    ^bb0(%arg9: f32, %arg10: f32):
+      %33 = arith.addf %arg9, %arg10 : f32
+      tt.reduce.return %33 : f32
+    }) : (tensor<64x64xf32, #blocked>) -> tensor<64xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %28 = tt.expand_dims %27 {axis = 1 : i32} : (tensor<64xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<64x1xf32, #blocked>
+    %29 = tt.splat %arg4 : (!tt.ptr<bf16, 1>) -> tensor<64x64x!tt.ptr<bf16, 1>, #blocked>
+    %30 = tt.splat %arg5 : (!tt.ptr<bf16, 1>) -> tensor<64x64x!tt.ptr<bf16, 1>, #blocked>
+    %31 = tt.broadcast %28 : (tensor<64x1xf32, #blocked>) -> tensor<64x64xf32, #blocked>
+    %32 = tt.splat %arg6 : (!tt.ptr<bf16, 1>) -> tensor<64x64x!tt.ptr<bf16, 1>, #blocked>
+    scf.for %arg9 = %c0_i32 to %c50257_i32 step %c64_i32  : i32 {
+      %33 = arith.extsi %arg9 : i32 to i64
+      %34 = tt.splat %33 : (i64) -> tensor<1x64xi64, #blocked>
+      %35 = arith.addi %34, %10 : tensor<1x64xi64, #blocked>
+      %36 = arith.cmpi slt, %35, %cst_3 : tensor<1x64xi64, #blocked>
+      %37 = tt.broadcast %35 : (tensor<1x64xi64, #blocked>) -> tensor<64x64xi64, #blocked>
+      %38 = arith.addi %37, %19 : tensor<64x64xi64, #blocked>
+      %39 = tt.addptr %29, %38 : tensor<64x64x!tt.ptr<bf16, 1>, #blocked>, tensor<64x64xi64, #blocked>
+      %40 = tt.broadcast %36 : (tensor<1x64xi1, #blocked>) -> tensor<64x64xi1, #blocked>
+      %41 = tt.load %39, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x64xbf16, #blocked>
+      %42 = arith.extf %41 : tensor<64x64xbf16, #blocked> to tensor<64x64xf32, #blocked>
+      %43 = tt.addptr %20, %38 : tensor<64x64x!tt.ptr<f32, 1>, #blocked>, tensor<64x64xi64, #blocked>
+      %44 = tt.load %43, %40, %cst_2 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x64xf32, #blocked>
+      %45 = tt.addptr %30, %38 : tensor<64x64x!tt.ptr<bf16, 1>, #blocked>, tensor<64x64xi64, #blocked>
+      %46 = tt.load %45, %40, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<64x64xbf16, #blocked>
+      %47 = arith.extf %46 : tensor<64x64xbf16, #blocked> to tensor<64x64xf32, #blocked>
+      %48 = arith.mulf %44, %25 : tensor<64x64xf32, #blocked>
+      %49 = math.exp %47 : tensor<64x64xf32, #blocked>
+      %50 = arith.mulf %49, %31 : tensor<64x64xf32, #blocked>
+      %51 = arith.subf %48, %50 : tensor<64x64xf32, #blocked>
+      %52 = arith.addf %42, %51 : tensor<64x64xf32, #blocked>
+      %53 = tt.addptr %32, %38 : tensor<64x64x!tt.ptr<bf16, 1>, #blocked>, tensor<64x64xi64, #blocked>
+      %54 = arith.truncf %52 : tensor<64x64xf32, #blocked> to tensor<64x64xbf16, #blocked>
+      tt.store %53, %54, %40 {cache = 1 : i32, evict = 1 : i32} : tensor<64x64xbf16, #blocked>
+    }
+    tt.return
+  }
+}
diff --git a/.triton/dump/4993935f9a0e5939755cfb42600362cf/triton_.ptx b/.triton/dump/4993935f9a0e5939755cfb42600362cf/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..5729819ee17a665869bc23fab0ff3cdcb9cfc760
--- /dev/null
+++ b/.triton/dump/4993935f9a0e5939755cfb42600362cf/triton_.ptx
@@ -0,0 +1,295 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2de
+
+.visible .entry triton__0d1d2de(
+	.param .u64 triton__0d1d2de_param_0,
+	.param .u64 triton__0d1d2de_param_1,
+	.param .u32 triton__0d1d2de_param_2
+)
+.maxntid 256, 1, 1
+{
+	.reg .pred 	%p<3>;
+	.reg .b16 	%rs<3>;
+	.reg .b32 	%r<13>;
+	.reg .b64 	%rd<7>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd3, [triton__0d1d2de_param_0];
+	ld.param.u64 	%rd4, [triton__0d1d2de_param_1];
+$L__tmp0:
+	.loc	1 21 36
+	mov.u32 	%r7, %tid.x;
+	shl.b32 	%r8, %r7, 1;
+	and.b32  	%r9, %r8, 510;
+	.loc	1 20 28
+	mov.u32 %r1, %ctaid.x;
+	.loc	1 20 33
+	shl.b32 	%r10, %r1, 9;
+	.loc	1 21 23
+	or.b32  	%r11, %r10, %r9;
+	.loc	1 24 30
+	mul.wide.s32 	%rd5, %r11, 4;
+	add.s64 	%rd1, %rd3, %rd5;
+	mov.pred 	%p1, -1;
+	.loc	1 24 35
+	mov.u32 %r4, 0x0;
+	mov.u32 %r5, 0x0;
+	@%p1 ld.global.v2.b32 { %r4, %r5 }, [ %rd1 + 0 ];
+	.loc	1 26 25
+	mul.wide.s32 	%rd6, %r11, 2;
+	add.s64 	%rd2, %rd4, %rd6;
+	.loc	1 26 36
+	cvt.rn.bf16.f32 %rs1, %r4;
+	cvt.rn.bf16.f32 %rs2, %r5;
+	mov.b32 	%r12, {%rs1, %rs2};
+	@%p1 st.global.b32 [ %rd2 + 0 ], { %r12 };
+	.loc	1 26 4
+	ret;
+$L__tmp1:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/zj/czjxjqxojsyyr4zmce6q6twysnucw6p4l5ujgp6ts2ecrm3ue3ex.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
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+.b8 8
+.b8 58
+.b8 11
+.b8 59
+.b8 11
+.b8 63
+.b8 12
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 176
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
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+.b8 101
+.b8 51
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+.b8 120
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
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+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 122
+.b8 106
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b8 116
+.b8 114
+.b8 105
+.b8 116
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+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/4993935f9a0e5939755cfb42600362cf/triton_.ttir b/.triton/dump/4993935f9a0e5939755cfb42600362cf/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..de8871dcaba54cb7d1b997f9009d0eeab54d091f
--- /dev/null
+++ b/.triton/dump/4993935f9a0e5939755cfb42600362cf/triton_.ttir
@@ -0,0 +1,18 @@
+module {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: i32 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %c512_i32 = arith.constant 512 : i32
+    %0 = tt.get_program_id x : i32
+    %1 = arith.muli %0, %c512_i32 : i32
+    %2 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32>
+    %3 = tt.splat %1 : (i32) -> tensor<512xi32>
+    %4 = arith.addi %3, %2 : tensor<512xi32>
+    %5 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<512x!tt.ptr<f32, 1>>
+    %6 = tt.addptr %5, %4 : tensor<512x!tt.ptr<f32, 1>>, tensor<512xi32>
+    %7 = tt.load %6 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<512xf32>
+    %8 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<512x!tt.ptr<bf16, 1>>
+    %9 = tt.addptr %8, %4 : tensor<512x!tt.ptr<bf16, 1>>, tensor<512xi32>
+    %10 = arith.truncf %7 : tensor<512xf32> to tensor<512xbf16>
+    tt.store %9, %10 {cache = 1 : i32, evict = 1 : i32} : tensor<512xbf16>
+    tt.return
+  }
+}
diff --git a/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.cubin b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..9e8ab81703edd8b858fd7dacbba10b56d385ae49
Binary files /dev/null and b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.cubin differ
diff --git a/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.llir b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..37628c07aa96ffb222dc0242b0276e52eff428c4
--- /dev/null
+++ b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.llir
@@ -0,0 +1,334 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+@.str = private unnamed_addr constant [11 x i8] c"__CUDA_FTZ\00", align 1
+
+define void @triton__0d1d2de(ptr addrspace(1) %0, ptr addrspace(1) %1, i32 %2) local_unnamed_addr !dbg !7 {
+  %4 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !10
+  %5 = shl i32 %4, 1, !dbg !10
+  %6 = and i32 %5, 510, !dbg !10
+  %7 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #4, !dbg !11
+  %8 = shl i32 %7, 9, !dbg !12
+  %9 = or i32 %8, %6, !dbg !13
+  %10 = sext i32 %9 to i64, !dbg !14
+  %11 = getelementptr i16, ptr addrspace(1) %0, i64 %10, !dbg !14
+  %12 = tail call i32 asm sideeffect "mov.u32 $0, 0x0;\0A\09@$2 ld.global.b32 { $0 }, [ $1 + 0 ];", "=r,l,b"(ptr addrspace(1) %11, i1 true) #4, !dbg !15
+  %13 = trunc i32 %12 to i16, !dbg !15
+  %extelt.offset = lshr i32 %12, 16, !dbg !15
+  %14 = trunc i32 %extelt.offset to i16, !dbg !15
+  %15 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %13) #4, !dbg !16
+  %16 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %14) #4, !dbg !16
+  %17 = fmul float %15, 0x3FE6A09E60000000, !dbg !17
+  %18 = fmul float %16, 0x3FE6A09E60000000, !dbg !17
+  %19 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not.i = icmp eq i32 %19, 0, !dbg !18
+  %20 = tail call float @llvm.nvvm.fabs.ftz.f(float %17) #4, !dbg !18
+  %21 = tail call float @llvm.nvvm.fabs.f(float %17) #4, !dbg !18
+  %.0.i = select i1 %.not.i, float %21, float %20, !dbg !18
+  %22 = fcmp oge float %.0.i, 0x3FF00C1FC0000000, !dbg !18
+  br i1 %22, label %__nv_fabsf.exit1.i, label %24, !dbg !18
+
+__nv_fabsf.exit1.i:                               ; preds = %3
+  %23 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not1.i = icmp eq i32 %23, 0, !dbg !18
+  %.01.i = select i1 %.not1.i, float %21, float %20, !dbg !18
+  br label %__internal_fmad.exit.i, !dbg !18
+
+24:                                               ; preds = %3
+  %25 = fmul float %17, %17, !dbg !18
+  br label %__internal_fmad.exit.i, !dbg !18
+
+__internal_fmad.exit.i:                           ; preds = %24, %__nv_fabsf.exit1.i
+  %26 = phi float [ 0x3FE41B0840000000, %__nv_fabsf.exit1.i ], [ 0x3FC06EBA60000000, %24 ], !dbg !18
+  %27 = phi float [ 0x3FED526FC0000000, %__nv_fabsf.exit1.i ], [ 0xBFD8127580000000, %24 ], !dbg !18
+  %28 = phi float [ 0x3FC39F20C0000000, %__nv_fabsf.exit1.i ], [ 0x3FBCE315E0000000, %24 ], !dbg !18
+  %29 = phi float [ 0xBFA1902C40000000, %__nv_fabsf.exit1.i ], [ 0xBF9B837CE0000000, %24 ], !dbg !18
+  %30 = phi float [ 0x3F75908160000000, %__nv_fabsf.exit1.i ], [ 0x3F755ABD40000000, %24 ], !dbg !18
+  %31 = phi float [ 0xBF3EAC1720000000, %__nv_fabsf.exit1.i ], [ 0xBF4AE9A400000000, %24 ], !dbg !18
+  %32 = phi float [ 0x3EF1394780000000, %__nv_fabsf.exit1.i ], [ 0x3F163D2D40000000, %24 ], !dbg !18
+  %33 = phi float [ %.01.i, %__nv_fabsf.exit1.i ], [ %25, %24 ], !dbg !18
+  %34 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not2.i = icmp eq i32 %34, 0, !dbg !18
+  %35 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %32, float %33, float %31) #4, !dbg !18
+  %36 = tail call float @llvm.nvvm.fma.rn.f(float %32, float %33, float %31) #4, !dbg !18
+  %.02.i = select i1 %.not2.i, float %36, float %35, !dbg !18
+  %37 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not3.i = icmp eq i32 %37, 0, !dbg !18
+  %38 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i, float %33, float %30) #4, !dbg !18
+  %39 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i, float %33, float %30) #4, !dbg !18
+  %.03.i = select i1 %.not3.i, float %39, float %38, !dbg !18
+  %40 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not4.i = icmp eq i32 %40, 0, !dbg !18
+  %41 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.03.i, float %33, float %29) #4, !dbg !18
+  %42 = tail call float @llvm.nvvm.fma.rn.f(float %.03.i, float %33, float %29) #4, !dbg !18
+  %.04.i = select i1 %.not4.i, float %42, float %41, !dbg !18
+  %43 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not5.i = icmp eq i32 %43, 0, !dbg !18
+  %44 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.04.i, float %33, float %28) #4, !dbg !18
+  %45 = tail call float @llvm.nvvm.fma.rn.f(float %.04.i, float %33, float %28) #4, !dbg !18
+  %.05.i = select i1 %.not5.i, float %45, float %44, !dbg !18
+  %46 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not6.i = icmp eq i32 %46, 0, !dbg !18
+  %47 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i, float %33, float %27) #4, !dbg !18
+  %48 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i, float %33, float %27) #4, !dbg !18
+  %.06.i = select i1 %.not6.i, float %48, float %47, !dbg !18
+  %49 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not7.i = icmp eq i32 %49, 0, !dbg !18
+  %50 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.06.i, float %33, float %26) #4, !dbg !18
+  %51 = tail call float @llvm.nvvm.fma.rn.f(float %.06.i, float %33, float %26) #4, !dbg !18
+  %.07.i = select i1 %.not7.i, float %51, float %50, !dbg !18
+  %52 = fneg float %33, !dbg !18
+  %53 = select i1 %22, float %52, float %17, !dbg !18
+  %54 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not8.i = icmp eq i32 %54, 0, !dbg !18
+  %55 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i, float %53, float %53) #4, !dbg !18
+  %56 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i, float %53, float %53) #4, !dbg !18
+  %.08.i = select i1 %.not8.i, float %56, float %55, !dbg !18
+  br i1 %22, label %57, label %__nv_erff.exit, !dbg !18
+
+57:                                               ; preds = %__internal_fmad.exit.i
+  %58 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %.08.i) #4, !dbg !18
+  %59 = fsub float 1.000000e+00, %58, !dbg !18
+  %60 = bitcast float %59 to i32, !dbg !18
+  %61 = bitcast float %17 to i32, !dbg !18
+  %62 = and i32 %61, -2147483648, !dbg !18
+  %63 = or i32 %62, %60, !dbg !18
+  %64 = bitcast i32 %63 to float, !dbg !18
+  br label %__nv_erff.exit, !dbg !18
+
+__nv_erff.exit:                                   ; preds = %__internal_fmad.exit.i, %57
+  %r.0.i = phi float [ %64, %57 ], [ %.08.i, %__internal_fmad.exit.i ], !dbg !18
+  %65 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not.i1 = icmp eq i32 %65, 0, !dbg !18
+  %66 = tail call float @llvm.nvvm.fabs.ftz.f(float %18) #4, !dbg !18
+  %67 = tail call float @llvm.nvvm.fabs.f(float %18) #4, !dbg !18
+  %.0.i2 = select i1 %.not.i1, float %67, float %66, !dbg !18
+  %68 = fcmp oge float %.0.i2, 0x3FF00C1FC0000000, !dbg !18
+  br i1 %68, label %__nv_fabsf.exit1.i19, label %70, !dbg !18
+
+__nv_fabsf.exit1.i19:                             ; preds = %__nv_erff.exit
+  %69 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not1.i20 = icmp eq i32 %69, 0, !dbg !18
+  %.01.i21 = select i1 %.not1.i20, float %67, float %66, !dbg !18
+  br label %__internal_fmad.exit.i3, !dbg !18
+
+70:                                               ; preds = %__nv_erff.exit
+  %71 = fmul float %18, %18, !dbg !18
+  br label %__internal_fmad.exit.i3, !dbg !18
+
+__internal_fmad.exit.i3:                          ; preds = %70, %__nv_fabsf.exit1.i19
+  %72 = phi float [ 0x3FE41B0840000000, %__nv_fabsf.exit1.i19 ], [ 0x3FC06EBA60000000, %70 ], !dbg !18
+  %73 = phi float [ 0x3FED526FC0000000, %__nv_fabsf.exit1.i19 ], [ 0xBFD8127580000000, %70 ], !dbg !18
+  %74 = phi float [ 0x3FC39F20C0000000, %__nv_fabsf.exit1.i19 ], [ 0x3FBCE315E0000000, %70 ], !dbg !18
+  %75 = phi float [ 0xBFA1902C40000000, %__nv_fabsf.exit1.i19 ], [ 0xBF9B837CE0000000, %70 ], !dbg !18
+  %76 = phi float [ 0x3F75908160000000, %__nv_fabsf.exit1.i19 ], [ 0x3F755ABD40000000, %70 ], !dbg !18
+  %77 = phi float [ 0xBF3EAC1720000000, %__nv_fabsf.exit1.i19 ], [ 0xBF4AE9A400000000, %70 ], !dbg !18
+  %78 = phi float [ 0x3EF1394780000000, %__nv_fabsf.exit1.i19 ], [ 0x3F163D2D40000000, %70 ], !dbg !18
+  %79 = phi float [ %.01.i21, %__nv_fabsf.exit1.i19 ], [ %71, %70 ], !dbg !18
+  %80 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not2.i4 = icmp eq i32 %80, 0, !dbg !18
+  %81 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %78, float %79, float %77) #4, !dbg !18
+  %82 = tail call float @llvm.nvvm.fma.rn.f(float %78, float %79, float %77) #4, !dbg !18
+  %.02.i5 = select i1 %.not2.i4, float %82, float %81, !dbg !18
+  %83 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not3.i6 = icmp eq i32 %83, 0, !dbg !18
+  %84 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i5, float %79, float %76) #4, !dbg !18
+  %85 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i5, float %79, float %76) #4, !dbg !18
+  %.03.i7 = select i1 %.not3.i6, float %85, float %84, !dbg !18
+  %86 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not4.i8 = icmp eq i32 %86, 0, !dbg !18
+  %87 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.03.i7, float %79, float %75) #4, !dbg !18
+  %88 = tail call float @llvm.nvvm.fma.rn.f(float %.03.i7, float %79, float %75) #4, !dbg !18
+  %.04.i9 = select i1 %.not4.i8, float %88, float %87, !dbg !18
+  %89 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not5.i10 = icmp eq i32 %89, 0, !dbg !18
+  %90 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.04.i9, float %79, float %74) #4, !dbg !18
+  %91 = tail call float @llvm.nvvm.fma.rn.f(float %.04.i9, float %79, float %74) #4, !dbg !18
+  %.05.i11 = select i1 %.not5.i10, float %91, float %90, !dbg !18
+  %92 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not6.i12 = icmp eq i32 %92, 0, !dbg !18
+  %93 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i11, float %79, float %73) #4, !dbg !18
+  %94 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i11, float %79, float %73) #4, !dbg !18
+  %.06.i13 = select i1 %.not6.i12, float %94, float %93, !dbg !18
+  %95 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not7.i14 = icmp eq i32 %95, 0, !dbg !18
+  %96 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.06.i13, float %79, float %72) #4, !dbg !18
+  %97 = tail call float @llvm.nvvm.fma.rn.f(float %.06.i13, float %79, float %72) #4, !dbg !18
+  %.07.i15 = select i1 %.not7.i14, float %97, float %96, !dbg !18
+  %98 = fneg float %79, !dbg !18
+  %99 = select i1 %68, float %98, float %18, !dbg !18
+  %100 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4, !dbg !18
+  %.not8.i16 = icmp eq i32 %100, 0, !dbg !18
+  %101 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07.i15, float %99, float %99) #4, !dbg !18
+  %102 = tail call float @llvm.nvvm.fma.rn.f(float %.07.i15, float %99, float %99) #4, !dbg !18
+  %.08.i17 = select i1 %.not8.i16, float %102, float %101, !dbg !18
+  br i1 %68, label %103, label %__nv_erff.exit22, !dbg !18
+
+103:                                              ; preds = %__internal_fmad.exit.i3
+  %104 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %.08.i17) #4, !dbg !18
+  %105 = fsub float 1.000000e+00, %104, !dbg !18
+  %106 = bitcast float %105 to i32, !dbg !18
+  %107 = bitcast float %18 to i32, !dbg !18
+  %108 = and i32 %107, -2147483648, !dbg !18
+  %109 = or i32 %108, %106, !dbg !18
+  %110 = bitcast i32 %109 to float, !dbg !18
+  br label %__nv_erff.exit22, !dbg !18
+
+__nv_erff.exit22:                                 ; preds = %__internal_fmad.exit.i3, %103
+  %r.0.i18 = phi float [ %110, %103 ], [ %.08.i17, %__internal_fmad.exit.i3 ], !dbg !18
+  %111 = fmul float %16, 5.000000e-01, !dbg !19
+  %112 = fmul float %15, 5.000000e-01, !dbg !19
+  %113 = fadd float %r.0.i, 1.000000e+00, !dbg !20
+  %114 = fadd float %r.0.i18, 1.000000e+00, !dbg !20
+  %115 = fmul float %112, %113, !dbg !21
+  %116 = fmul float %111, %114, !dbg !21
+  %117 = getelementptr i16, ptr addrspace(1) %1, i64 %10, !dbg !22
+  %118 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %115) #4, !dbg !23
+  %119 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %116) #4, !dbg !23
+  %120 = insertelement <2 x i16> undef, i16 %118, i64 0, !dbg !23
+  %121 = insertelement <2 x i16> %120, i16 %119, i64 1, !dbg !23
+  %122 = bitcast <2 x i16> %121 to i32, !dbg !23
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %122, ptr addrspace(1) %117, i1 true) #4, !dbg !23
+  ret void, !dbg !24
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: alwaysinline nounwind
+define float @__nv_erff(float %a) local_unnamed_addr #1 {
+__nv_fabsf.exit:
+  %0 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not = icmp eq i32 %0, 0
+  %1 = tail call float @llvm.nvvm.fabs.ftz.f(float %a) #4
+  %2 = tail call float @llvm.nvvm.fabs.f(float %a) #4
+  %.0 = select i1 %.not, float %2, float %1
+  %3 = fcmp oge float %.0, 0x3FF00C1FC0000000
+  br i1 %3, label %__nv_fabsf.exit1, label %5
+
+__nv_fabsf.exit1:                                 ; preds = %__nv_fabsf.exit
+  %4 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not1 = icmp eq i32 %4, 0
+  %.01 = select i1 %.not1, float %2, float %1
+  br label %__internal_fmad.exit
+
+5:                                                ; preds = %__nv_fabsf.exit
+  %6 = fmul float %a, %a
+  br label %__internal_fmad.exit
+
+__internal_fmad.exit:                             ; preds = %5, %__nv_fabsf.exit1
+  %7 = phi float [ 0x3FE41B0840000000, %__nv_fabsf.exit1 ], [ 0x3FC06EBA60000000, %5 ]
+  %8 = phi float [ 0x3FED526FC0000000, %__nv_fabsf.exit1 ], [ 0xBFD8127580000000, %5 ]
+  %9 = phi float [ 0x3FC39F20C0000000, %__nv_fabsf.exit1 ], [ 0x3FBCE315E0000000, %5 ]
+  %10 = phi float [ 0xBFA1902C40000000, %__nv_fabsf.exit1 ], [ 0xBF9B837CE0000000, %5 ]
+  %11 = phi float [ 0x3F75908160000000, %__nv_fabsf.exit1 ], [ 0x3F755ABD40000000, %5 ]
+  %12 = phi float [ 0xBF3EAC1720000000, %__nv_fabsf.exit1 ], [ 0xBF4AE9A400000000, %5 ]
+  %13 = phi float [ 0x3EF1394780000000, %__nv_fabsf.exit1 ], [ 0x3F163D2D40000000, %5 ]
+  %14 = phi float [ %.01, %__nv_fabsf.exit1 ], [ %6, %5 ]
+  %15 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not2 = icmp eq i32 %15, 0
+  %16 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %13, float %14, float %12) #4
+  %17 = tail call float @llvm.nvvm.fma.rn.f(float %13, float %14, float %12) #4
+  %.02 = select i1 %.not2, float %17, float %16
+  %18 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not3 = icmp eq i32 %18, 0
+  %19 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02, float %14, float %11) #4
+  %20 = tail call float @llvm.nvvm.fma.rn.f(float %.02, float %14, float %11) #4
+  %.03 = select i1 %.not3, float %20, float %19
+  %21 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not4 = icmp eq i32 %21, 0
+  %22 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.03, float %14, float %10) #4
+  %23 = tail call float @llvm.nvvm.fma.rn.f(float %.03, float %14, float %10) #4
+  %.04 = select i1 %.not4, float %23, float %22
+  %24 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not5 = icmp eq i32 %24, 0
+  %25 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.04, float %14, float %9) #4
+  %26 = tail call float @llvm.nvvm.fma.rn.f(float %.04, float %14, float %9) #4
+  %.05 = select i1 %.not5, float %26, float %25
+  %27 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not6 = icmp eq i32 %27, 0
+  %28 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05, float %14, float %8) #4
+  %29 = tail call float @llvm.nvvm.fma.rn.f(float %.05, float %14, float %8) #4
+  %.06 = select i1 %.not6, float %29, float %28
+  %30 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not7 = icmp eq i32 %30, 0
+  %31 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.06, float %14, float %7) #4
+  %32 = tail call float @llvm.nvvm.fma.rn.f(float %.06, float %14, float %7) #4
+  %.07 = select i1 %.not7, float %32, float %31
+  %33 = fneg float %14
+  %34 = select i1 %3, float %33, float %a
+  %35 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #4
+  %.not8 = icmp eq i32 %35, 0
+  %36 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.07, float %34, float %34) #4
+  %37 = tail call float @llvm.nvvm.fma.rn.f(float %.07, float %34, float %34) #4
+  %.08 = select i1 %.not8, float %37, float %36
+  br i1 %3, label %38, label %46
+
+38:                                               ; preds = %__internal_fmad.exit
+  %39 = tail call float @llvm.nvvm.ex2.approx.ftz.f(float %.08) #4
+  %40 = fsub float 1.000000e+00, %39
+  %41 = bitcast float %40 to i32
+  %42 = bitcast float %a to i32
+  %43 = and i32 %42, -2147483648
+  %44 = or i32 %43, %41
+  %45 = bitcast i32 %44 to float
+  br label %46
+
+46:                                               ; preds = %38, %__internal_fmad.exit
+  %r.0 = phi float [ %45, %38 ], [ %.08, %__internal_fmad.exit ]
+  ret float %r.0
+}
+
+declare i32 @__nvvm_reflect(ptr) local_unnamed_addr #2
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fabs.ftz.f(float) #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fabs.f(float) #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.ftz.f(float, float, float) #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.f(float, float, float) #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none)
+declare float @llvm.nvvm.ex2.approx.ftz.f(float) #3
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { alwaysinline nounwind "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #2 = { "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) }
+attributes #4 = { nounwind }
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!2}
+!nvvm.annotations = !{!4, !5, !5, !4}
+!llvm.ident = !{!6}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!2 = distinct !DICompileUnit(language: DW_LANG_C, file: !3, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!3 = !DIFile(filename: "cjfoqo3nutni5cmtw4brla34cz45fusadehkxfkr2fie2qgo7vwt.py", directory: "/tmp/torchinductor_root/jf")
+!4 = !{ptr @triton__0d1d2de, !"kernel", i32 1}
+!5 = !{ptr @triton__0d1d2de, !"maxntidx", i32 256}
+!6 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!7 = distinct !DISubprogram(name: "triton__0d1d2de", linkageName: "triton__0d1d2de", scope: !3, file: !3, line: 18, type: !8, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2)
+!8 = !DISubroutineType(cc: DW_CC_normal, types: !9)
+!9 = !{}
+!10 = !DILocation(line: 21, column: 36, scope: !7)
+!11 = !DILocation(line: 20, column: 28, scope: !7)
+!12 = !DILocation(line: 20, column: 33, scope: !7)
+!13 = !DILocation(line: 21, column: 23, scope: !7)
+!14 = !DILocation(line: 24, column: 30, scope: !7)
+!15 = !DILocation(line: 24, column: 35, scope: !7)
+!16 = !DILocation(line: 24, column: 44, scope: !7)
+!17 = !DILocation(line: 29, column: 18, scope: !7)
+!18 = !DILocation(line: 30, column: 23, scope: !7)
+!19 = !DILocation(line: 27, column: 18, scope: !7)
+!20 = !DILocation(line: 32, column: 18, scope: !7)
+!21 = !DILocation(line: 33, column: 18, scope: !7)
+!22 = !DILocation(line: 35, column: 25, scope: !7)
+!23 = !DILocation(line: 35, column: 37, scope: !7)
+!24 = !DILocation(line: 35, column: 4, scope: !7)
diff --git a/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ptx b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..4c46bffb937fa00ec8334115a23b746d005b4320
--- /dev/null
+++ b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ptx
@@ -0,0 +1,460 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2de
+.global .align 1 .b8 _$_str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};
+
+.visible .entry triton__0d1d2de(
+	.param .u64 triton__0d1d2de_param_0,
+	.param .u64 triton__0d1d2de_param_1,
+	.param .u32 triton__0d1d2de_param_2
+)
+.maxntid 256, 1, 1
+{
+	.reg .pred 	%p<9>;
+	.reg .b16 	%rs<5>;
+	.reg .b32 	%r<22>;
+	.reg .f32 	%f<113>;
+	.reg .b64 	%rd<8>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd4, [triton__0d1d2de_param_0];
+$L__tmp0:
+	.loc	1 21 36
+	mov.u32 	%r5, %tid.x;
+	shl.b32 	%r6, %r5, 1;
+	and.b32  	%r7, %r6, 510;
+	.loc	1 20 28
+	mov.u32 %r1, %ctaid.x;
+	.loc	1 20 33
+	shl.b32 	%r8, %r1, 9;
+	.loc	1 21 23
+	or.b32  	%r9, %r8, %r7;
+	.loc	1 24 30
+	mul.wide.s32 	%rd5, %r9, 2;
+	add.s64 	%rd3, %rd4, %rd5;
+	mov.pred 	%p1, -1;
+	.loc	1 24 35
+	mov.u32 %r2, 0x0;
+	@%p1 ld.global.b32 { %r2 }, [ %rd3 + 0 ];
+	cvt.u16.u32 	%rs1, %r2;
+	{ .reg .b16 tmp; mov.b32 {tmp, %rs2}, %r2; }
+	.loc	1 24 44
+	cvt.f32.bf16 %r3, %rs1;
+	mov.b32 	%f1, %r3;
+	cvt.f32.bf16 %r4, %rs2;
+	mov.b32 	%f2, %r4;
+	.loc	1 29 18
+	mul.f32 	%f3, %f1, 0f3F3504F3;
+	.loc	1 30 23
+	abs.ftz.f32 	%f5, %f3;
+	setp.ge.f32 	%p2, %f5, 0f3F8060FE;
+	mov.f32 	%f101, 0f3789CA3C;
+	mov.f32 	%f100, 0fB9F560B9;
+	mov.f32 	%f99, 0f3BAC840B;
+	mov.f32 	%f98, 0fBD0C8162;
+	mov.f32 	%f97, 0f3E1CF906;
+	mov.f32 	%f96, 0f3F6A937E;
+	mov.f32 	%f95, 0f3F20D842;
+	mov.f32 	%f102, %f5;
+	@%p2 bra 	$L__BB0_2;
+	.loc	1 0 23
+	mov.f32 	%f101, 0f38B1E96A;
+	mov.f32 	%f100, 0fBA574D20;
+	mov.f32 	%f99, 0f3BAAD5EA;
+	mov.f32 	%f98, 0fBCDC1BE7;
+	mov.f32 	%f97, 0f3DE718AF;
+	mov.f32 	%f96, 0fBEC093AC;
+	mov.f32 	%f95, 0f3E0375D3;
+	.loc	1 30 23
+	mul.f32 	%f102, %f3, %f3;
+$L__BB0_2:
+	.loc	1 0 0
+	mul.f32 	%f4, %f2, 0f3F3504F3;
+	.loc	1 30 23
+	setp.ltu.f32 	%p3, %f5, 0f3F8060FE;
+	fma.rn.ftz.f32 	%f45, %f101, %f102, %f100;
+	fma.rn.ftz.f32 	%f46, %f45, %f102, %f99;
+	fma.rn.ftz.f32 	%f47, %f46, %f102, %f98;
+	fma.rn.ftz.f32 	%f48, %f47, %f102, %f97;
+	fma.rn.ftz.f32 	%f49, %f48, %f102, %f96;
+	fma.rn.ftz.f32 	%f50, %f49, %f102, %f95;
+	neg.f32 	%f51, %f102;
+	selp.f32 	%f52, %f51, %f3, %p2;
+	fma.rn.ftz.f32 	%f103, %f50, %f52, %f52;
+	mov.f32 	%f94, 0f3F800000;
+	@%p3 bra 	$L__BB0_4;
+	ex2.approx.ftz.f32 	%f53, %f103;
+	sub.f32 	%f55, %f94, %f53;
+	mov.b32 	%r10, %f55;
+	mov.b32 	%r11, %f3;
+	and.b32  	%r12, %r11, -2147483648;
+	or.b32  	%r13, %r12, %r10;
+	mov.b32 	%f103, %r13;
+$L__BB0_4:
+	abs.ftz.f32 	%f18, %f4;
+	setp.ge.f32 	%p5, %f18, 0f3F8060FE;
+	mov.f32 	%f110, 0f3789CA3C;
+	mov.f32 	%f109, 0fB9F560B9;
+	mov.f32 	%f108, 0f3BAC840B;
+	mov.f32 	%f107, 0fBD0C8162;
+	mov.f32 	%f106, 0f3E1CF906;
+	mov.f32 	%f105, 0f3F6A937E;
+	mov.f32 	%f104, 0f3F20D842;
+	mov.f32 	%f111, %f18;
+	@%p5 bra 	$L__BB0_6;
+	mul.f32 	%f111, %f4, %f4;
+	mov.f32 	%f110, 0f38B1E96A;
+	mov.f32 	%f109, 0fBA574D20;
+	mov.f32 	%f108, 0f3BAAD5EA;
+	mov.f32 	%f107, 0fBCDC1BE7;
+	mov.f32 	%f106, 0f3DE718AF;
+	mov.f32 	%f105, 0fBEC093AC;
+	mov.f32 	%f104, 0f3E0375D3;
+$L__BB0_6:
+	.loc	1 0 23
+	ld.param.u64 	%rd2, [triton__0d1d2de_param_1];
+	cvt.s64.s32 	%rd1, %r9;
+	.loc	1 30 23
+	setp.ltu.f32 	%p6, %f18, 0f3F8060FE;
+	fma.rn.ftz.f32 	%f70, %f110, %f111, %f109;
+	fma.rn.ftz.f32 	%f71, %f70, %f111, %f108;
+	fma.rn.ftz.f32 	%f72, %f71, %f111, %f107;
+	fma.rn.ftz.f32 	%f73, %f72, %f111, %f106;
+	fma.rn.ftz.f32 	%f74, %f73, %f111, %f105;
+	fma.rn.ftz.f32 	%f75, %f74, %f111, %f104;
+	neg.f32 	%f76, %f111;
+	selp.f32 	%f77, %f76, %f4, %p5;
+	fma.rn.ftz.f32 	%f112, %f75, %f77, %f77;
+	@%p6 bra 	$L__BB0_8;
+	ex2.approx.ftz.f32 	%f78, %f112;
+	sub.f32 	%f80, %f94, %f78;
+	mov.b32 	%r14, %f80;
+	mov.b32 	%r15, %f4;
+	and.b32  	%r16, %r15, -2147483648;
+	or.b32  	%r17, %r16, %r14;
+	mov.b32 	%f112, %r17;
+$L__BB0_8:
+	.loc	1 27 18
+	mul.f32 	%f81, %f2, 0f3F000000;
+	mul.f32 	%f82, %f1, 0f3F000000;
+	.loc	1 32 18
+	add.f32 	%f83, %f103, 0f3F800000;
+	add.f32 	%f84, %f112, 0f3F800000;
+	.loc	1 33 18
+	mul.f32 	%f85, %f82, %f83;
+	mul.f32 	%f86, %f81, %f84;
+	.loc	1 35 25
+	shl.b64 	%rd7, %rd1, 1;
+	add.s64 	%rd6, %rd2, %rd7;
+	.loc	1 35 37
+	mov.b32 	%r18, %f85;
+	cvt.rn.bf16.f32 %rs3, %r18;
+	mov.b32 	%r19, %f86;
+	cvt.rn.bf16.f32 %rs4, %r19;
+	mov.b32 	%r21, {%rs3, %rs4};
+	@%p1 st.global.b32 [ %rd6 + 0 ], { %r21 };
+	.loc	1 35 4
+	ret;
+$L__tmp1:
+$L__func_end0:
+
+}
+	// .globl	__nv_erff
+.visible .func  (.param .b32 func_retval0) __nv_erff(
+	.param .b32 __nv_erff_param_0
+)
+{
+	.reg .pred 	%p<4>;
+	.reg .b32 	%r<5>;
+	.reg .f32 	%f<49>;
+$L__func_begin1:
+
+	ld.param.f32 	%f14, [__nv_erff_param_0];
+	abs.ftz.f32 	%f1, %f14;
+	setp.ge.f32 	%p1, %f1, 0f3F8060FE;
+	mov.f32 	%f46, 0f3789CA3C;
+	mov.f32 	%f45, 0fB9F560B9;
+	mov.f32 	%f44, 0f3BAC840B;
+	mov.f32 	%f43, 0fBD0C8162;
+	mov.f32 	%f42, 0f3E1CF906;
+	mov.f32 	%f41, 0f3F6A937E;
+	mov.f32 	%f40, 0f3F20D842;
+	mov.f32 	%f47, %f1;
+	@%p1 bra 	$L__BB1_2;
+	mul.f32 	%f47, %f14, %f14;
+	mov.f32 	%f46, 0f38B1E96A;
+	mov.f32 	%f45, 0fBA574D20;
+	mov.f32 	%f44, 0f3BAAD5EA;
+	mov.f32 	%f43, 0fBCDC1BE7;
+	mov.f32 	%f42, 0f3DE718AF;
+	mov.f32 	%f41, 0fBEC093AC;
+	mov.f32 	%f40, 0f3E0375D3;
+$L__BB1_2:
+	setp.ltu.f32 	%p2, %f1, 0f3F8060FE;
+	fma.rn.ftz.f32 	%f29, %f46, %f47, %f45;
+	fma.rn.ftz.f32 	%f30, %f29, %f47, %f44;
+	fma.rn.ftz.f32 	%f31, %f30, %f47, %f43;
+	fma.rn.ftz.f32 	%f32, %f31, %f47, %f42;
+	fma.rn.ftz.f32 	%f33, %f32, %f47, %f41;
+	fma.rn.ftz.f32 	%f34, %f33, %f47, %f40;
+	neg.f32 	%f35, %f47;
+	selp.f32 	%f36, %f35, %f14, %p1;
+	fma.rn.ftz.f32 	%f48, %f34, %f36, %f36;
+	@%p2 bra 	$L__BB1_4;
+	ex2.approx.ftz.f32 	%f37, %f48;
+	mov.f32 	%f38, 0f3F800000;
+	sub.f32 	%f39, %f38, %f37;
+	mov.b32 	%r1, %f39;
+	mov.b32 	%r2, %f14;
+	and.b32  	%r3, %r2, -2147483648;
+	or.b32  	%r4, %r3, %r1;
+	mov.b32 	%f48, %r4;
+$L__BB1_4:
+	st.param.f32 	[func_retval0+0], %f48;
+	ret;
+$L__func_end1:
+
+}
+	.file	1 "/tmp/torchinductor_root/jf/cjfoqo3nutni5cmtw4brla34cz45fusadehkxfkr2fie2qgo7vwt.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
+.b8 6
+.b8 27
+.b8 8
+.b8 180
+.b8 66
+.b8 12
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+.b8 0
+.b8 2
+.b8 46
+.b8 0
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 64
+.b8 10
+.b8 135
+.b8 64
+.b8 8
+.b8 3
+.b8 8
+.b8 58
+.b8 11
+.b8 59
+.b8 11
+.b8 63
+.b8 12
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 176
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2
+.b8 0
+.b8 99
+.b8 106
+.b8 102
+.b8 111
+.b8 113
+.b8 111
+.b8 51
+.b8 110
+.b8 117
+.b8 116
+.b8 110
+.b8 105
+.b8 53
+.b8 99
+.b8 109
+.b8 116
+.b8 119
+.b8 52
+.b8 98
+.b8 114
+.b8 108
+.b8 97
+.b8 51
+.b8 52
+.b8 99
+.b8 122
+.b8 52
+.b8 53
+.b8 102
+.b8 117
+.b8 115
+.b8 97
+.b8 100
+.b8 101
+.b8 104
+.b8 107
+.b8 120
+.b8 102
+.b8 107
+.b8 114
+.b8 50
+.b8 102
+.b8 105
+.b8 101
+.b8 50
+.b8 113
+.b8 103
+.b8 111
+.b8 55
+.b8 118
+.b8 119
+.b8 116
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 106
+.b8 102
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
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+.b8 100
+.b8 101
+.b8 0
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+.b8 114
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+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
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+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ttgir b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..e76cbaaceacd46bf60078c87e6ca60744cd841dc
--- /dev/null
+++ b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ttgir
@@ -0,0 +1,28 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [2], threadsPerWarp = [32], warpsPerCTA = [8], order = [0], CTAsPerCGA = [1], CTASplitNum = [1], CTAOrder = [0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: i32 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %cst = arith.constant dense<1.000000e+00> : tensor<512xf32, #blocked>
+    %cst_0 = arith.constant dense<0.707106769> : tensor<512xf32, #blocked>
+    %cst_1 = arith.constant dense<5.000000e-01> : tensor<512xf32, #blocked>
+    %c512_i32 = arith.constant 512 : i32
+    %0 = tt.get_program_id x : i32
+    %1 = arith.muli %0, %c512_i32 : i32
+    %2 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32, #blocked>
+    %3 = tt.splat %1 : (i32) -> tensor<512xi32, #blocked>
+    %4 = arith.addi %3, %2 : tensor<512xi32, #blocked>
+    %5 = tt.splat %arg0 : (!tt.ptr<bf16, 1>) -> tensor<512x!tt.ptr<bf16, 1>, #blocked>
+    %6 = tt.addptr %5, %4 : tensor<512x!tt.ptr<bf16, 1>, #blocked>, tensor<512xi32, #blocked>
+    %7 = tt.load %6 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<512xbf16, #blocked>
+    %8 = arith.extf %7 : tensor<512xbf16, #blocked> to tensor<512xf32, #blocked>
+    %9 = arith.mulf %8, %cst_1 : tensor<512xf32, #blocked>
+    %10 = arith.mulf %8, %cst_0 : tensor<512xf32, #blocked>
+    %11 = tt.extern_elementwise %10 {libname = "libdevice", libpath = "/usr/local/lib/python3.10/dist-packages/triton/language/../third_party/cuda/lib/libdevice.10.bc", pure = true, symbol = "__nv_erff"} : (tensor<512xf32, #blocked>) -> tensor<512xf32, #blocked>
+    %12 = arith.addf %11, %cst : tensor<512xf32, #blocked>
+    %13 = arith.mulf %9, %12 : tensor<512xf32, #blocked>
+    %14 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<512x!tt.ptr<bf16, 1>, #blocked>
+    %15 = tt.addptr %14, %4 : tensor<512x!tt.ptr<bf16, 1>, #blocked>, tensor<512xi32, #blocked>
+    %16 = arith.truncf %13 : tensor<512xf32, #blocked> to tensor<512xbf16, #blocked>
+    tt.store %15, %16 {cache = 1 : i32, evict = 1 : i32} : tensor<512xbf16, #blocked>
+    tt.return
+  }
+}
diff --git a/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ttir b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..774ae5a5dedc3d45c0720cacfced410cf2d9fe0f
--- /dev/null
+++ b/.triton/dump/4ce9eb7fe63f19e54893f0c74df91471/triton_.ttir
@@ -0,0 +1,27 @@
+module {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: i32 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %cst = arith.constant dense<1.000000e+00> : tensor<512xf32>
+    %cst_0 = arith.constant dense<0.707106769> : tensor<512xf32>
+    %cst_1 = arith.constant dense<5.000000e-01> : tensor<512xf32>
+    %c512_i32 = arith.constant 512 : i32
+    %0 = tt.get_program_id x : i32
+    %1 = arith.muli %0, %c512_i32 : i32
+    %2 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32>
+    %3 = tt.splat %1 : (i32) -> tensor<512xi32>
+    %4 = arith.addi %3, %2 : tensor<512xi32>
+    %5 = tt.splat %arg0 : (!tt.ptr<bf16, 1>) -> tensor<512x!tt.ptr<bf16, 1>>
+    %6 = tt.addptr %5, %4 : tensor<512x!tt.ptr<bf16, 1>>, tensor<512xi32>
+    %7 = tt.load %6 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<512xbf16>
+    %8 = arith.extf %7 : tensor<512xbf16> to tensor<512xf32>
+    %9 = arith.mulf %8, %cst_1 : tensor<512xf32>
+    %10 = arith.mulf %8, %cst_0 : tensor<512xf32>
+    %11 = tt.extern_elementwise %10 {libname = "libdevice", libpath = "/usr/local/lib/python3.10/dist-packages/triton/language/../third_party/cuda/lib/libdevice.10.bc", pure = true, symbol = "__nv_erff"} : (tensor<512xf32>) -> tensor<512xf32>
+    %12 = arith.addf %11, %cst : tensor<512xf32>
+    %13 = arith.mulf %9, %12 : tensor<512xf32>
+    %14 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<512x!tt.ptr<bf16, 1>>
+    %15 = tt.addptr %14, %4 : tensor<512x!tt.ptr<bf16, 1>>, tensor<512xi32>
+    %16 = arith.truncf %13 : tensor<512xf32> to tensor<512xbf16>
+    tt.store %15, %16 {cache = 1 : i32, evict = 1 : i32} : tensor<512xbf16>
+    tt.return
+  }
+}
diff --git a/.triton/dump/51e329eae41e4ee17aa201fff8371d94/triton_.cubin b/.triton/dump/51e329eae41e4ee17aa201fff8371d94/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..368364e55803c05edbe4130de30a0338f66278d1
Binary files /dev/null and b/.triton/dump/51e329eae41e4ee17aa201fff8371d94/triton_.cubin differ
diff --git a/.triton/dump/51e329eae41e4ee17aa201fff8371d94/triton_.ttir b/.triton/dump/51e329eae41e4ee17aa201fff8371d94/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..760fd1d9da54650db6815845da37aa01666ecdb9
--- /dev/null
+++ b/.triton/dump/51e329eae41e4ee17aa201fff8371d94/triton_.ttir
@@ -0,0 +1,91 @@
+module {
+  tt.func public @triton__0d1d2d3d4d5d6e7de(%arg0: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg5: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg6: i64 {tt.max_divisibility = 8 : i32}, %arg7: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %c8_i64 = arith.constant 8 : i64
+    %c7680_i64 = arith.constant 7680 : i64
+    %c385973760_i64 = arith.constant 385973760 : i64
+    %cst = arith.constant dense<0.000000e+00> : tensor<1x2048xbf16>
+    %cst_0 = arith.constant dense<50257> : tensor<1x2048xi64>
+    %cst_1 = arith.constant dense<7680> : tensor<1x2048xi64>
+    %c2048_i32 = arith.constant 2048 : i32
+    %c7680_i32 = arith.constant 7680 : i32
+    %c0_i32 = arith.constant 0 : i32
+    %cst_2 = arith.constant dense<-1> : tensor<1x2048xi64>
+    %cst_3 = arith.constant dense<0.000000e+00> : tensor<1x2048xf32>
+    %cst_4 = arith.constant dense<0> : tensor<1x2048xi64>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.cmpi slt, %1, %c8_i64 : i64
+    %3 = tt.splat %2 : (i1) -> tensor<1x1xi1>
+    %4 = tt.make_range {end = 2048 : i32, start = 0 : i32} : tensor<2048xi32>
+    %5 = tt.expand_dims %4 {axis = 0 : i32} : (tensor<2048xi32>) -> tensor<1x2048xi32>
+    %6 = arith.extsi %5 : tensor<1x2048xi32> to tensor<1x2048xi64>
+    %7 = arith.muli %1, %c7680_i64 : i64
+    %8 = tt.splat %7 : (i64) -> tensor<1x2048xi64>
+    %9 = tt.splat %arg0 : (!tt.ptr<i64, 1>) -> tensor<1x2048x!tt.ptr<i64, 1>>
+    %10 = tt.splat %2 : (i1) -> tensor<1x2048xi1>
+    %11 = tt.splat %arg2 : (!tt.ptr<f32, 1>) -> tensor<1x2048x!tt.ptr<f32, 1>>
+    %12 = tt.splat %arg3 : (!tt.ptr<f32, 1>) -> tensor<1x2048x!tt.ptr<f32, 1>>
+    %13 = arith.muli %1, %c385973760_i64 : i64
+    %14 = tt.splat %13 : (i64) -> tensor<1x2048xi64>
+    %15 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>>
+    %16:2 = scf.for %arg8 = %c0_i32 to %c7680_i32 step %c2048_i32 iter_args(%arg9 = %cst_4, %arg10 = %cst_3) -> (tensor<1x2048xi64>, tensor<1x2048xf32>)  : i32 {
+      %25 = arith.extsi %arg8 : i32 to i64
+      %26 = tt.splat %25 : (i64) -> tensor<1x2048xi64>
+      %27 = arith.addi %26, %6 : tensor<1x2048xi64>
+      %28 = arith.cmpi slt, %27, %cst_1 : tensor<1x2048xi64>
+      %29 = arith.addi %27, %8 : tensor<1x2048xi64>
+      %30 = tt.addptr %9, %29 : tensor<1x2048x!tt.ptr<i64, 1>>, tensor<1x2048xi64>
+      %31 = arith.andi %28, %10 : tensor<1x2048xi1>
+      %32 = tt.load %30, %31, %cst_4 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xi64>
+      %33 = tt.addptr %11, %29 : tensor<1x2048x!tt.ptr<f32, 1>>, tensor<1x2048xi64>
+      %34 = tt.load %33, %31, %cst_3 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xf32>
+      %35 = tt.addptr %12, %29 : tensor<1x2048x!tt.ptr<f32, 1>>, tensor<1x2048xi64>
+      %36 = tt.load %35, %31, %cst_3 {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xf32>
+      %37 = arith.cmpi ne, %32, %cst_2 : tensor<1x2048xi64>
+      %38 = arith.extui %37 : tensor<1x2048xi1> to tensor<1x2048xi64>
+      %39 = arith.addi %arg9, %38 : tensor<1x2048xi64>
+      %40 = arith.select %31, %39, %arg9 : tensor<1x2048xi1>, tensor<1x2048xi64>
+      %41 = arith.select %37, %32, %cst_4 : tensor<1x2048xi1>, tensor<1x2048xi64>
+      %42 = arith.addi %41, %cst_0 : tensor<1x2048xi64>
+      %43 = arith.cmpi slt, %41, %cst_4 : tensor<1x2048xi64>
+      %44 = arith.select %43, %42, %41 : tensor<1x2048xi1>, tensor<1x2048xi64>
+      %45 = arith.cmpi sge, %44, %cst_4 : tensor<1x2048xi64>
+      %46 = arith.cmpi slt, %44, %cst_0 : tensor<1x2048xi64>
+      %47 = arith.andi %45, %46 : tensor<1x2048xi1>
+      tt.assert %47, "index out of bounds: 0 <= tmp11 < 50257", "<frozen importlib._bootstrap_external>", "_call_with_frames_removed", 883 : tensor<1x2048xi1>
+      %48 = arith.muli %27, %cst_0 : tensor<1x2048xi64>
+      %49 = arith.addi %44, %48 : tensor<1x2048xi64>
+      %50 = arith.addi %49, %14 : tensor<1x2048xi64>
+      %51 = tt.addptr %15, %50 : tensor<1x2048x!tt.ptr<bf16, 1>>, tensor<1x2048xi64>
+      %52 = tt.load %51, %31, %cst {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<1x2048xbf16>
+      %53 = arith.extf %52 : tensor<1x2048xbf16> to tensor<1x2048xf32>
+      %54 = arith.subf %53, %34 : tensor<1x2048xf32>
+      %55 = math.log %36 : tensor<1x2048xf32>
+      %56 = arith.subf %54, %55 : tensor<1x2048xf32>
+      %57 = arith.subf %cst_3, %56 : tensor<1x2048xf32>
+      %58 = arith.select %37, %57, %cst_3 : tensor<1x2048xi1>, tensor<1x2048xf32>
+      %59 = arith.addf %arg10, %58 : tensor<1x2048xf32>
+      %60 = arith.select %31, %59, %arg10 : tensor<1x2048xi1>, tensor<1x2048xf32>
+      scf.yield %40, %60 : tensor<1x2048xi64>, tensor<1x2048xf32>
+    }
+    %17 = "tt.reduce"(%16#0) <{axis = 1 : i32}> ({
+    ^bb0(%arg8: i64, %arg9: i64):
+      %25 = arith.addi %arg8, %arg9 : i64
+      tt.reduce.return %25 : i64
+    }) : (tensor<1x2048xi64>) -> tensor<1xi64>
+    %18 = tt.expand_dims %17 {axis = 1 : i32} : (tensor<1xi64>) -> tensor<1x1xi64>
+    %19 = tt.addptr %arg4, %1 : !tt.ptr<i64, 1>, i64
+    %20 = tt.splat %19 : (!tt.ptr<i64, 1>) -> tensor<1x1x!tt.ptr<i64, 1>>
+    tt.store %20, %18, %3 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xi64>
+    %21 = "tt.reduce"(%16#1) <{axis = 1 : i32}> ({
+    ^bb0(%arg8: f32, %arg9: f32):
+      %25 = arith.addf %arg8, %arg9 : f32
+      tt.reduce.return %25 : f32
+    }) : (tensor<1x2048xf32>) -> tensor<1xf32>
+    %22 = tt.expand_dims %21 {axis = 1 : i32} : (tensor<1xf32>) -> tensor<1x1xf32>
+    %23 = tt.addptr %arg5, %1 : !tt.ptr<f32, 1>, i64
+    %24 = tt.splat %23 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>>
+    tt.store %24, %22, %3 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32>
+    tt.return
+  }
+}
diff --git a/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.cubin b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..6c3ec064df1bab4e0a21d94e82f97735e05ff792
Binary files /dev/null and b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.cubin differ
diff --git a/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.llir b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..594e278e0edd89d4781e52f908c91b6e258dd69d
--- /dev/null
+++ b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.llir
@@ -0,0 +1,745 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+@global_smem = external addrspace(3) global [0 x i8]
+@.str = private unnamed_addr constant [11 x i8] c"__CUDA_FTZ\00", align 1
+
+define void @triton__0d1d2d3d4de5(ptr addrspace(1) %0, ptr addrspace(1) %1, ptr addrspace(1) %2, ptr addrspace(1) %3, i64 %4, i64 %5) local_unnamed_addr !dbg !7 {
+  %7 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !10
+  %8 = lshr i32 %7, 5, !dbg !10
+  %urem = and i32 %7, 255, !dbg !10
+  %9 = or i32 %urem, 256, !dbg !10
+  %10 = or i32 %urem, 512, !dbg !10
+  %11 = or i32 %urem, 768, !dbg !10
+  %12 = or i32 %urem, 1024, !dbg !10
+  %13 = or i32 %urem, 1280, !dbg !10
+  %14 = or i32 %urem, 1536, !dbg !10
+  %15 = or i32 %urem, 1792, !dbg !10
+  %16 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #5, !dbg !11
+  %17 = sext i32 %16 to i64, !dbg !12
+  %18 = insertelement <8 x i32> poison, i32 %urem, i64 0
+  %19 = insertelement <8 x i32> %18, i32 %9, i64 1
+  %20 = insertelement <8 x i32> %19, i32 %10, i64 2
+  %21 = insertelement <8 x i32> %20, i32 %11, i64 3
+  %22 = insertelement <8 x i32> %21, i32 %12, i64 4
+  %23 = insertelement <8 x i32> %22, i32 %13, i64 5
+  %24 = insertelement <8 x i32> %23, i32 %14, i64 6
+  %25 = insertelement <8 x i32> %24, i32 %15, i64 7
+  %26 = zext <8 x i32> %25 to <8 x i64>
+  %27 = mul nsw i64 %17, 50257, !dbg !13
+  %invariant.gep = getelementptr i16, ptr addrspace(1) %0, i64 %27, !dbg !14
+  br label %28, !dbg !14
+
+28:                                               ; preds = %6, %28
+  %29 = phi i32 [ 0, %6 ], [ %81, %28 ]
+  %30 = phi <8 x float> [ <float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000, float 0xFFF0000000000000>, %6 ], [ %80, %28 ]
+  %31 = zext nneg i32 %29 to i64, !dbg !15
+  %32 = fcmp ord <8 x float> %30, zeroinitializer, !dbg !16
+  %33 = insertelement <8 x i64> poison, i64 %31, i64 0, !dbg !15
+  %34 = shufflevector <8 x i64> %33, <8 x i64> poison, <8 x i32> zeroinitializer, !dbg !15
+  %35 = or <8 x i64> %34, %26, !dbg !15
+  %36 = icmp ult <8 x i64> %35, <i64 50257, i64 50257, i64 50257, i64 50257, i64 50257, i64 50257, i64 50257, i64 50257>, !dbg !20
+  %37 = extractelement <8 x i64> %35, i64 0, !dbg !21
+  %gep = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %37, !dbg !21
+  %38 = extractelement <8 x i64> %35, i64 1, !dbg !21
+  %gep21 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %38, !dbg !21
+  %39 = extractelement <8 x i64> %35, i64 2, !dbg !21
+  %gep23 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %39, !dbg !21
+  %40 = extractelement <8 x i64> %35, i64 3, !dbg !21
+  %gep25 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %40, !dbg !21
+  %41 = extractelement <8 x i64> %35, i64 4, !dbg !21
+  %gep27 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %41, !dbg !21
+  %42 = extractelement <8 x i64> %35, i64 5, !dbg !21
+  %gep29 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %42, !dbg !21
+  %43 = extractelement <8 x i64> %35, i64 6, !dbg !21
+  %gep31 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %43, !dbg !21
+  %44 = extractelement <8 x i64> %35, i64 7, !dbg !21
+  %gep33 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %44, !dbg !21
+  %45 = extractelement <8 x i1> %36, i64 0, !dbg !22
+  %46 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep, i1 %45, i16 0, i1 %45) #5, !dbg !22
+  %47 = extractelement <8 x i1> %36, i64 1, !dbg !22
+  %48 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep21, i1 %47, i16 0, i1 %47) #5, !dbg !22
+  %49 = extractelement <8 x i1> %36, i64 2, !dbg !22
+  %50 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep23, i1 %49, i16 0, i1 %49) #5, !dbg !22
+  %51 = extractelement <8 x i1> %36, i64 3, !dbg !22
+  %52 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep25, i1 %51, i16 0, i1 %51) #5, !dbg !22
+  %53 = extractelement <8 x i1> %36, i64 4, !dbg !22
+  %54 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep27, i1 %53, i16 0, i1 %53) #5, !dbg !22
+  %55 = extractelement <8 x i1> %36, i64 5, !dbg !22
+  %56 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep29, i1 %55, i16 0, i1 %55) #5, !dbg !22
+  %57 = extractelement <8 x i1> %36, i64 6, !dbg !22
+  %58 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep31, i1 %57, i16 0, i1 %57) #5, !dbg !22
+  %59 = extractelement <8 x i1> %36, i64 7, !dbg !22
+  %60 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep33, i1 %59, i16 0, i1 %59) #5, !dbg !22
+  %61 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %46) #5, !dbg !23
+  %62 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %48) #5, !dbg !23
+  %63 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %50) #5, !dbg !23
+  %64 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %52) #5, !dbg !23
+  %65 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %54) #5, !dbg !23
+  %66 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %56) #5, !dbg !23
+  %67 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %58) #5, !dbg !23
+  %68 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %60) #5, !dbg !23
+  %69 = insertelement <8 x float> poison, float %61, i64 0, !dbg !24
+  %70 = insertelement <8 x float> %69, float %62, i64 1, !dbg !24
+  %71 = insertelement <8 x float> %70, float %63, i64 2, !dbg !24
+  %72 = insertelement <8 x float> %71, float %64, i64 3, !dbg !24
+  %73 = insertelement <8 x float> %72, float %65, i64 4, !dbg !24
+  %74 = insertelement <8 x float> %73, float %66, i64 5, !dbg !24
+  %75 = insertelement <8 x float> %74, float %67, i64 6, !dbg !24
+  %76 = insertelement <8 x float> %75, float %68, i64 7, !dbg !24
+  %77 = fcmp ule <8 x float> %30, %76, !dbg !24
+  %78 = and <8 x i1> %32, %77, !dbg !25
+  %79 = and <8 x i1> %36, %78, !dbg !26
+  %80 = select <8 x i1> %79, <8 x float> %76, <8 x float> %30, !dbg !26
+  %81 = add nuw nsw i32 %29, 2048, !dbg !14
+  %82 = icmp ult i32 %29, 48209, !dbg !14
+  br i1 %82, label %28, label %83, !dbg !14
+
+83:                                               ; preds = %28
+  %84 = and i32 %7, 31, !dbg !10
+  %85 = and i32 %8, 7, !dbg !10
+  %86 = extractelement <8 x float> %80, i64 0, !dbg !27
+  %87 = extractelement <8 x float> %80, i64 1, !dbg !27
+  %88 = fcmp ogt float %86, %87, !dbg !27
+  %89 = fcmp uno float %86, 0.000000e+00, !dbg !31
+  %90 = or i1 %88, %89, !dbg !32
+  %91 = select i1 %90, float %86, float %87, !dbg !33
+  %92 = extractelement <8 x float> %80, i64 2, !dbg !27
+  %93 = fcmp ogt float %91, %92, !dbg !27
+  %94 = fcmp uno float %91, 0.000000e+00, !dbg !31
+  %95 = or i1 %93, %94, !dbg !32
+  %96 = select i1 %95, float %91, float %92, !dbg !33
+  %97 = extractelement <8 x float> %80, i64 3, !dbg !27
+  %98 = fcmp ogt float %96, %97, !dbg !27
+  %99 = fcmp uno float %96, 0.000000e+00, !dbg !31
+  %100 = or i1 %98, %99, !dbg !32
+  %101 = select i1 %100, float %96, float %97, !dbg !33
+  %102 = extractelement <8 x float> %80, i64 4, !dbg !27
+  %103 = fcmp ogt float %101, %102, !dbg !27
+  %104 = fcmp uno float %101, 0.000000e+00, !dbg !31
+  %105 = or i1 %103, %104, !dbg !32
+  %106 = select i1 %105, float %101, float %102, !dbg !33
+  %107 = extractelement <8 x float> %80, i64 5, !dbg !27
+  %108 = fcmp ogt float %106, %107, !dbg !27
+  %109 = fcmp uno float %106, 0.000000e+00, !dbg !31
+  %110 = or i1 %108, %109, !dbg !32
+  %111 = select i1 %110, float %106, float %107, !dbg !33
+  %112 = extractelement <8 x float> %80, i64 6, !dbg !27
+  %113 = fcmp ogt float %111, %112, !dbg !27
+  %114 = fcmp uno float %111, 0.000000e+00, !dbg !31
+  %115 = or i1 %113, %114, !dbg !32
+  %116 = select i1 %115, float %111, float %112, !dbg !33
+  %117 = extractelement <8 x float> %80, i64 7, !dbg !27
+  %118 = fcmp ogt float %116, %117, !dbg !27
+  %119 = fcmp uno float %116, 0.000000e+00, !dbg !31
+  %120 = or i1 %118, %119, !dbg !32
+  %121 = select i1 %120, float %116, float %117, !dbg !33
+  %122 = bitcast float %121 to i32, !dbg !34
+  %123 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %122, i32 16, i32 31), !dbg !34
+  %124 = bitcast i32 %123 to float, !dbg !34
+  %125 = fcmp ogt float %121, %124, !dbg !27
+  %126 = fcmp uno float %121, 0.000000e+00, !dbg !31
+  %127 = or i1 %126, %125, !dbg !32
+  %128 = select i1 %127, float %121, float %124, !dbg !33
+  %129 = bitcast float %128 to i32, !dbg !34
+  %130 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %129, i32 8, i32 31), !dbg !34
+  %131 = bitcast i32 %130 to float, !dbg !34
+  %132 = fcmp ogt float %128, %131, !dbg !27
+  %133 = fcmp uno float %128, 0.000000e+00, !dbg !31
+  %134 = or i1 %132, %133, !dbg !32
+  %135 = select i1 %134, float %128, float %131, !dbg !33
+  %136 = bitcast float %135 to i32, !dbg !34
+  %137 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %136, i32 4, i32 31), !dbg !34
+  %138 = bitcast i32 %137 to float, !dbg !34
+  %139 = fcmp ogt float %135, %138, !dbg !27
+  %140 = fcmp uno float %135, 0.000000e+00, !dbg !31
+  %141 = or i1 %139, %140, !dbg !32
+  %142 = select i1 %141, float %135, float %138, !dbg !33
+  %143 = bitcast float %142 to i32, !dbg !34
+  %144 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %143, i32 2, i32 31), !dbg !34
+  %145 = bitcast i32 %144 to float, !dbg !34
+  %146 = fcmp ogt float %142, %145, !dbg !27
+  %147 = fcmp uno float %142, 0.000000e+00, !dbg !31
+  %148 = or i1 %146, %147, !dbg !32
+  %149 = select i1 %148, float %142, float %145, !dbg !33
+  %150 = bitcast float %149 to i32, !dbg !34
+  %151 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %150, i32 1, i32 31), !dbg !34
+  %152 = bitcast i32 %151 to float, !dbg !34
+  %153 = fcmp ogt float %149, %152, !dbg !27
+  %154 = fcmp uno float %149, 0.000000e+00, !dbg !31
+  %155 = or i1 %153, %154, !dbg !32
+  %156 = select i1 %155, float %149, float %152, !dbg !33
+  %157 = icmp eq i32 %84, 0, !dbg !34
+  %158 = zext nneg i32 %85 to i64, !dbg !34
+  %159 = getelementptr float, ptr addrspace(3) @global_smem, i64 %158, !dbg !34
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %159, float %156, i1 %157) #5, !dbg !34
+  tail call void @llvm.nvvm.barrier0(), !dbg !34
+  %160 = icmp slt i32 %7, 8, !dbg !34
+  %161 = sext i32 %7 to i64, !dbg !34
+  %162 = getelementptr float, ptr addrspace(3) @global_smem, i64 %161, !dbg !34
+  %163 = tail call float asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %162, i1 %160) #5, !dbg !34
+  %164 = bitcast float %163 to i32, !dbg !34
+  %165 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %164, i32 4, i32 31), !dbg !34
+  %166 = bitcast i32 %165 to float, !dbg !34
+  %167 = fcmp ogt float %163, %166, !dbg !27
+  %168 = fcmp uno float %163, 0.000000e+00, !dbg !31
+  %169 = or i1 %168, %167, !dbg !32
+  %170 = select i1 %169, float %163, float %166, !dbg !33
+  %171 = bitcast float %170 to i32, !dbg !34
+  %172 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %171, i32 2, i32 31), !dbg !34
+  %173 = bitcast i32 %172 to float, !dbg !34
+  %174 = fcmp ogt float %170, %173, !dbg !27
+  %175 = fcmp uno float %170, 0.000000e+00, !dbg !31
+  %176 = or i1 %174, %175, !dbg !32
+  %177 = select i1 %176, float %170, float %173, !dbg !33
+  %178 = bitcast float %177 to i32, !dbg !34
+  %179 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %178, i32 1, i32 31), !dbg !34
+  %180 = bitcast i32 %179 to float, !dbg !34
+  %181 = fcmp ogt float %177, %180, !dbg !27
+  %182 = fcmp uno float %177, 0.000000e+00, !dbg !31
+  %183 = or i1 %181, %182, !dbg !32
+  %184 = select i1 %183, float %177, float %180, !dbg !33
+  %185 = and i32 %7, 7, !dbg !34
+  %186 = icmp eq i32 %185, 0, !dbg !34
+  %187 = and i1 %160, %186, !dbg !34
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %162, float %184, i1 %187) #5, !dbg !34
+  tail call void @llvm.nvvm.barrier0(), !dbg !34
+  %188 = load float, ptr addrspace(3) @global_smem, align 4, !dbg !34
+  tail call void @llvm.nvvm.barrier0(), !dbg !36
+  %189 = insertelement <1 x float> undef, float %188, i64 0, !dbg !36
+  store <1 x float> %189, ptr addrspace(3) @global_smem, align 4, !dbg !36
+  tail call void @llvm.nvvm.barrier0(), !dbg !36
+  %190 = load i32, ptr addrspace(3) @global_smem, align 4, !dbg !36
+  %191 = getelementptr float, ptr addrspace(1) %1, i64 %17, !dbg !37
+  %192 = icmp eq i32 %urem, 0, !dbg !38
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %190, ptr addrspace(1) %191, i1 %192) #5, !dbg !38
+  br label %193, !dbg !39
+
+193:                                              ; preds = %83, %193
+  %194 = phi i32 [ 0, %83 ], [ %267, %193 ]
+  %195 = phi <8 x float> [ zeroinitializer, %83 ], [ %266, %193 ]
+  %196 = zext nneg i32 %194 to i64, !dbg !40
+  %197 = insertelement <8 x i64> poison, i64 %196, i64 0, !dbg !40
+  %198 = shufflevector <8 x i64> %197, <8 x i64> poison, <8 x i32> zeroinitializer, !dbg !40
+  %199 = or <8 x i64> %198, %26, !dbg !40
+  %200 = icmp ult <8 x i64> %199, <i64 50257, i64 50257, i64 50257, i64 50257, i64 50257, i64 50257, i64 50257, i64 50257>, !dbg !41
+  %201 = extractelement <8 x i64> %199, i64 0, !dbg !42
+  %gep35 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %201, !dbg !42
+  %202 = extractelement <8 x i64> %199, i64 1, !dbg !42
+  %gep37 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %202, !dbg !42
+  %203 = extractelement <8 x i64> %199, i64 2, !dbg !42
+  %gep39 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %203, !dbg !42
+  %204 = extractelement <8 x i64> %199, i64 3, !dbg !42
+  %gep41 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %204, !dbg !42
+  %205 = extractelement <8 x i64> %199, i64 4, !dbg !42
+  %gep43 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %205, !dbg !42
+  %206 = extractelement <8 x i64> %199, i64 5, !dbg !42
+  %gep45 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %206, !dbg !42
+  %207 = extractelement <8 x i64> %199, i64 6, !dbg !42
+  %gep47 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %207, !dbg !42
+  %208 = extractelement <8 x i64> %199, i64 7, !dbg !42
+  %gep49 = getelementptr i16, ptr addrspace(1) %invariant.gep, i64 %208, !dbg !42
+  %209 = extractelement <8 x i1> %200, i64 0, !dbg !43
+  %210 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep35, i1 %209, i16 0, i1 %209) #5, !dbg !43
+  %211 = extractelement <8 x i1> %200, i64 1, !dbg !43
+  %212 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep37, i1 %211, i16 0, i1 %211) #5, !dbg !43
+  %213 = extractelement <8 x i1> %200, i64 2, !dbg !43
+  %214 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep39, i1 %213, i16 0, i1 %213) #5, !dbg !43
+  %215 = extractelement <8 x i1> %200, i64 3, !dbg !43
+  %216 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep41, i1 %215, i16 0, i1 %215) #5, !dbg !43
+  %217 = extractelement <8 x i1> %200, i64 4, !dbg !43
+  %218 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep43, i1 %217, i16 0, i1 %217) #5, !dbg !43
+  %219 = extractelement <8 x i1> %200, i64 5, !dbg !43
+  %220 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep45, i1 %219, i16 0, i1 %219) #5, !dbg !43
+  %221 = extractelement <8 x i1> %200, i64 6, !dbg !43
+  %222 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep47, i1 %221, i16 0, i1 %221) #5, !dbg !43
+  %223 = extractelement <8 x i1> %200, i64 7, !dbg !43
+  %224 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_last.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %gep49, i1 %223, i16 0, i1 %223) #5, !dbg !43
+  %225 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %210) #5, !dbg !44
+  %226 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %212) #5, !dbg !44
+  %227 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %214) #5, !dbg !44
+  %228 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %216) #5, !dbg !44
+  %229 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %218) #5, !dbg !44
+  %230 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %220) #5, !dbg !44
+  %231 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %222) #5, !dbg !44
+  %232 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %224) #5, !dbg !44
+  %233 = fsub float %225, %188, !dbg !45
+  %234 = fsub float %226, %188, !dbg !45
+  %235 = fsub float %227, %188, !dbg !45
+  %236 = fsub float %228, %188, !dbg !45
+  %237 = fsub float %229, %188, !dbg !45
+  %238 = fsub float %230, %188, !dbg !45
+  %239 = fsub float %231, %188, !dbg !45
+  %240 = fsub float %232, %188, !dbg !45
+  %241 = fmul float %233, 0x3FF7154760000000, !dbg !46
+  %242 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %241) #5, !dbg !46
+  %243 = fmul float %234, 0x3FF7154760000000, !dbg !46
+  %244 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %243) #5, !dbg !46
+  %245 = fmul float %235, 0x3FF7154760000000, !dbg !46
+  %246 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %245) #5, !dbg !46
+  %247 = fmul float %236, 0x3FF7154760000000, !dbg !46
+  %248 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %247) #5, !dbg !46
+  %249 = fmul float %237, 0x3FF7154760000000, !dbg !46
+  %250 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %249) #5, !dbg !46
+  %251 = fmul float %238, 0x3FF7154760000000, !dbg !46
+  %252 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %251) #5, !dbg !46
+  %253 = fmul float %239, 0x3FF7154760000000, !dbg !46
+  %254 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %253) #5, !dbg !46
+  %255 = fmul float %240, 0x3FF7154760000000, !dbg !46
+  %256 = tail call float asm "ex2.approx.f32 $0, $1;", "=f,f"(float %255) #5, !dbg !46
+  %257 = insertelement <8 x float> poison, float %242, i64 0, !dbg !47
+  %258 = insertelement <8 x float> %257, float %244, i64 1, !dbg !47
+  %259 = insertelement <8 x float> %258, float %246, i64 2, !dbg !47
+  %260 = insertelement <8 x float> %259, float %248, i64 3, !dbg !47
+  %261 = insertelement <8 x float> %260, float %250, i64 4, !dbg !47
+  %262 = insertelement <8 x float> %261, float %252, i64 5, !dbg !47
+  %263 = insertelement <8 x float> %262, float %254, i64 6, !dbg !47
+  %264 = insertelement <8 x float> %263, float %256, i64 7, !dbg !47
+  %265 = select <8 x i1> %200, <8 x float> %264, <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, !dbg !47
+  %266 = fadd <8 x float> %195, %265, !dbg !47
+  %267 = add nuw nsw i32 %194, 2048, !dbg !39
+  %268 = icmp ult i32 %194, 48209, !dbg !39
+  br i1 %268, label %193, label %269, !dbg !39
+
+269:                                              ; preds = %193
+  tail call void @llvm.nvvm.barrier0(), !dbg !48
+  %shift = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %270 = fadd <8 x float> %266, %shift, !dbg !52
+  %shift95 = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 2, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %271 = fadd <8 x float> %shift95, %270, !dbg !52
+  %shift96 = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %272 = fadd <8 x float> %shift96, %271, !dbg !52
+  %shift97 = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 4, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %273 = fadd <8 x float> %shift97, %272, !dbg !52
+  %shift98 = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 5, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %274 = fadd <8 x float> %shift98, %273, !dbg !52
+  %shift99 = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 6, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %275 = fadd <8 x float> %shift99, %274, !dbg !52
+  %shift100 = shufflevector <8 x float> %266, <8 x float> poison, <8 x i32> <i32 7, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>, !dbg !52
+  %276 = fadd <8 x float> %shift100, %275, !dbg !52
+  %277 = extractelement <8 x float> %276, i64 0, !dbg !52
+  %278 = bitcast float %277 to i32, !dbg !48
+  %279 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %278, i32 16, i32 31), !dbg !48
+  %280 = bitcast i32 %279 to float, !dbg !48
+  %281 = fadd float %277, %280, !dbg !52
+  %282 = bitcast float %281 to i32, !dbg !48
+  %283 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %282, i32 8, i32 31), !dbg !48
+  %284 = bitcast i32 %283 to float, !dbg !48
+  %285 = fadd float %281, %284, !dbg !52
+  %286 = bitcast float %285 to i32, !dbg !48
+  %287 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %286, i32 4, i32 31), !dbg !48
+  %288 = bitcast i32 %287 to float, !dbg !48
+  %289 = fadd float %285, %288, !dbg !52
+  %290 = bitcast float %289 to i32, !dbg !48
+  %291 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %290, i32 2, i32 31), !dbg !48
+  %292 = bitcast i32 %291 to float, !dbg !48
+  %293 = fadd float %289, %292, !dbg !52
+  %294 = bitcast float %293 to i32, !dbg !48
+  %295 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %294, i32 1, i32 31), !dbg !48
+  %296 = bitcast i32 %295 to float, !dbg !48
+  %297 = fadd float %293, %296, !dbg !52
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %159, float %297, i1 %157) #5, !dbg !48
+  tail call void @llvm.nvvm.barrier0(), !dbg !48
+  %298 = tail call float asm sideeffect "@$2 ld.shared.b32 $0, [ $1 + 0 ];", "=r,r,b"(ptr addrspace(3) %162, i1 %160) #5, !dbg !48
+  %299 = bitcast float %298 to i32, !dbg !48
+  %300 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %299, i32 4, i32 31), !dbg !48
+  %301 = bitcast i32 %300 to float, !dbg !48
+  %302 = fadd float %298, %301, !dbg !52
+  %303 = bitcast float %302 to i32, !dbg !48
+  %304 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %303, i32 2, i32 31), !dbg !48
+  %305 = bitcast i32 %304 to float, !dbg !48
+  %306 = fadd float %302, %305, !dbg !52
+  %307 = bitcast float %306 to i32, !dbg !48
+  %308 = tail call i32 @llvm.nvvm.shfl.sync.bfly.i32(i32 -1, i32 %307, i32 1, i32 31), !dbg !48
+  %309 = bitcast i32 %308 to float, !dbg !48
+  %310 = fadd float %306, %309, !dbg !52
+  tail call void asm sideeffect "@$2 st.shared.b32 [ $0 + 0 ], $1;", "r,r,b"(ptr addrspace(3) %162, float %310, i1 %187) #5, !dbg !48
+  tail call void @llvm.nvvm.barrier0(), !dbg !48
+  %311 = load float, ptr addrspace(3) @global_smem, align 4, !dbg !48
+  tail call void @llvm.nvvm.barrier0(), !dbg !56
+  %312 = insertelement <1 x float> undef, float %311, i64 0, !dbg !56
+  store <1 x float> %312, ptr addrspace(3) @global_smem, align 4, !dbg !56
+  tail call void @llvm.nvvm.barrier0(), !dbg !56
+  %313 = load i32, ptr addrspace(3) @global_smem, align 4, !dbg !56
+  %314 = getelementptr float, ptr addrspace(1) %2, i64 %17, !dbg !57
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %313, ptr addrspace(1) %314, i1 %192) #5, !dbg !58
+  %315 = fcmp olt float %311, 0x3810000000000000, !dbg !59
+  %316 = fmul float %311, 0x4160000000000000, !dbg !59
+  %.02.i = select i1 %315, float %316, float %311, !dbg !59
+  %i.i.0.i = select i1 %315, float -2.300000e+01, float 0.000000e+00, !dbg !59
+  %317 = bitcast float %.02.i to i32, !dbg !59
+  %318 = add i32 %317, -1059760811, !dbg !59
+  %319 = and i32 %318, -8388608, !dbg !59
+  %320 = sub i32 %317, %319, !dbg !59
+  %321 = bitcast i32 %320 to float, !dbg !59
+  %322 = sitofp i32 %319 to float, !dbg !59
+  %323 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not.i = icmp eq i32 %323, 0, !dbg !59
+  %324 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %322, float 0x3E80000000000000, float %i.i.0.i) #5, !dbg !59
+  %325 = tail call float @llvm.nvvm.fma.rn.f(float %322, float 0x3E80000000000000, float %i.i.0.i) #5, !dbg !59
+  %.08.i = select i1 %.not.i, float %325, float %324, !dbg !59
+  %326 = fadd float %321, -1.000000e+00, !dbg !59
+  %327 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not1.i = icmp eq i32 %327, 0, !dbg !59
+  %328 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0xBFC0AA04E0000000, float %326, float 0x3FC2073EC0000000) #5, !dbg !59
+  %329 = tail call float @llvm.nvvm.fma.rn.f(float 0xBFC0AA04E0000000, float %326, float 0x3FC2073EC0000000) #5, !dbg !59
+  %.010.i = select i1 %.not1.i, float %329, float %328, !dbg !59
+  %330 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not2.i = icmp eq i32 %330, 0, !dbg !59
+  %331 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010.i, float %326, float 0xBFBF19B980000000) #5, !dbg !59
+  %332 = tail call float @llvm.nvvm.fma.rn.f(float %.010.i, float %326, float 0xBFBF19B980000000) #5, !dbg !59
+  %.011.i = select i1 %.not2.i, float %332, float %331, !dbg !59
+  %333 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not3.i = icmp eq i32 %333, 0, !dbg !59
+  %334 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011.i, float %326, float 0x3FC1E52AA0000000) #5, !dbg !59
+  %335 = tail call float @llvm.nvvm.fma.rn.f(float %.011.i, float %326, float 0x3FC1E52AA0000000) #5, !dbg !59
+  %.012.i = select i1 %.not3.i, float %335, float %334, !dbg !59
+  %336 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not4.i = icmp eq i32 %336, 0, !dbg !59
+  %337 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012.i, float %326, float 0xBFC55B1720000000) #5, !dbg !59
+  %338 = tail call float @llvm.nvvm.fma.rn.f(float %.012.i, float %326, float 0xBFC55B1720000000) #5, !dbg !59
+  %.09.i = select i1 %.not4.i, float %338, float %337, !dbg !59
+  %339 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not5.i = icmp eq i32 %339, 0, !dbg !59
+  %340 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09.i, float %326, float 0x3FC99DA160000000) #5, !dbg !59
+  %341 = tail call float @llvm.nvvm.fma.rn.f(float %.09.i, float %326, float 0x3FC99DA160000000) #5, !dbg !59
+  %.05.i = select i1 %.not5.i, float %341, float %340, !dbg !59
+  %342 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not6.i = icmp eq i32 %342, 0, !dbg !59
+  %343 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05.i, float %326, float 0xBFCFFFE440000000) #5, !dbg !59
+  %344 = tail call float @llvm.nvvm.fma.rn.f(float %.05.i, float %326, float 0xBFCFFFE440000000) #5, !dbg !59
+  %.01.i = select i1 %.not6.i, float %344, float %343, !dbg !59
+  %345 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not7.i = icmp eq i32 %345, 0, !dbg !59
+  %346 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01.i, float %326, float 0x3FD5554F00000000) #5, !dbg !59
+  %347 = tail call float @llvm.nvvm.fma.rn.f(float %.01.i, float %326, float 0x3FD5554F00000000) #5, !dbg !59
+  %.0.i = select i1 %.not7.i, float %347, float %346, !dbg !59
+  %348 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not8.i = icmp eq i32 %348, 0, !dbg !59
+  %349 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0.i, float %326, float -5.000000e-01) #5, !dbg !59
+  %350 = tail call float @llvm.nvvm.fma.rn.f(float %.0.i, float %326, float -5.000000e-01) #5, !dbg !59
+  %.07.i = select i1 %.not8.i, float %350, float %349, !dbg !59
+  %351 = fmul float %326, %.07.i, !dbg !59
+  %352 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not9.i = icmp eq i32 %352, 0, !dbg !59
+  %353 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %351, float %326, float %326) #5, !dbg !59
+  %354 = tail call float @llvm.nvvm.fma.rn.f(float %351, float %326, float %326) #5, !dbg !59
+  %.06.i = select i1 %.not9.i, float %354, float %353, !dbg !59
+  %355 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not10.i = icmp eq i32 %355, 0, !dbg !59
+  %356 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.08.i, float 0x3FE62E4300000000, float %.06.i) #5, !dbg !59
+  %357 = tail call float @llvm.nvvm.fma.rn.f(float %.08.i, float 0x3FE62E4300000000, float %.06.i) #5, !dbg !59
+  %.04.i = select i1 %.not10.i, float %357, float %356, !dbg !59
+  %358 = icmp ugt i32 %317, 2139095039, !dbg !59
+  br i1 %358, label %__nv_fmaf_rn.exit.i.i, label %__nv_logf.exit, !dbg !59
+
+__nv_fmaf_rn.exit.i.i:                            ; preds = %269
+  %359 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5, !dbg !59
+  %.not11.i = icmp eq i32 %359, 0, !dbg !59
+  %360 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02.i, float 0x7FF0000000000000, float 0x7FF0000000000000) #5, !dbg !59
+  %361 = tail call float @llvm.nvvm.fma.rn.f(float %.02.i, float 0x7FF0000000000000, float 0x7FF0000000000000) #5, !dbg !59
+  %.03.i = select i1 %.not11.i, float %361, float %360, !dbg !59
+  br label %__nv_logf.exit, !dbg !59
+
+__nv_logf.exit:                                   ; preds = %269, %__nv_fmaf_rn.exit.i.i
+  %r.i.0.i = phi float [ %.03.i, %__nv_fmaf_rn.exit.i.i ], [ %.04.i, %269 ], !dbg !59
+  %362 = fcmp oeq float %.02.i, 0.000000e+00, !dbg !59
+  %r.i.1.i = select i1 %362, float 0xFFF0000000000000, float %r.i.0.i, !dbg !59
+  %363 = extractelement <8 x i64> %26, i64 0, !dbg !60
+  %364 = extractelement <8 x i64> %26, i64 1, !dbg !60
+  %365 = extractelement <8 x i64> %26, i64 2, !dbg !60
+  %366 = extractelement <8 x i64> %26, i64 3, !dbg !60
+  %367 = extractelement <8 x i64> %26, i64 4, !dbg !60
+  %368 = extractelement <8 x i64> %26, i64 5, !dbg !60
+  %369 = extractelement <8 x i64> %26, i64 6, !dbg !60
+  %370 = extractelement <8 x i64> %26, i64 7, !dbg !60
+  br label %371, !dbg !61
+
+371:                                              ; preds = %__nv_logf.exit, %371
+  %372 = phi i32 [ 0, %__nv_logf.exit ], [ %454, %371 ]
+  %373 = zext nneg i32 %372 to i64, !dbg !60
+  %374 = or i64 %363, %373, !dbg !60
+  %375 = or i64 %364, %373, !dbg !60
+  %376 = or i64 %365, %373, !dbg !60
+  %377 = or i64 %366, %373, !dbg !60
+  %378 = or i64 %367, %373, !dbg !60
+  %379 = or i64 %368, %373, !dbg !60
+  %380 = or i64 %369, %373, !dbg !60
+  %381 = or i64 %370, %373, !dbg !60
+  %382 = icmp ult i64 %374, 50257, !dbg !62
+  %383 = icmp ult i64 %375, 50257, !dbg !62
+  %384 = icmp ult i64 %376, 50257, !dbg !62
+  %385 = icmp ult i64 %377, 50257, !dbg !62
+  %386 = icmp ult i64 %378, 50257, !dbg !62
+  %387 = icmp ult i64 %379, 50257, !dbg !62
+  %388 = icmp ult i64 %380, 50257, !dbg !62
+  %389 = icmp ult i64 %381, 50257, !dbg !62
+  %390 = add nsw i64 %374, %27, !dbg !63
+  %391 = add nsw i64 %375, %27, !dbg !63
+  %392 = add nsw i64 %376, %27, !dbg !63
+  %393 = add nsw i64 %377, %27, !dbg !63
+  %394 = add nsw i64 %378, %27, !dbg !63
+  %395 = add nsw i64 %379, %27, !dbg !63
+  %396 = add nsw i64 %380, %27, !dbg !63
+  %397 = add nsw i64 %381, %27, !dbg !63
+  %398 = getelementptr i16, ptr addrspace(1) %0, i64 %390, !dbg !64
+  %399 = getelementptr i16, ptr addrspace(1) %0, i64 %391, !dbg !64
+  %400 = getelementptr i16, ptr addrspace(1) %0, i64 %392, !dbg !64
+  %401 = getelementptr i16, ptr addrspace(1) %0, i64 %393, !dbg !64
+  %402 = getelementptr i16, ptr addrspace(1) %0, i64 %394, !dbg !64
+  %403 = getelementptr i16, ptr addrspace(1) %0, i64 %395, !dbg !64
+  %404 = getelementptr i16, ptr addrspace(1) %0, i64 %396, !dbg !64
+  %405 = getelementptr i16, ptr addrspace(1) %0, i64 %397, !dbg !64
+  %406 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %398, i1 %382, i16 0, i1 %382) #5, !dbg !65
+  %407 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %399, i1 %383, i16 0, i1 %383) #5, !dbg !65
+  %408 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %400, i1 %384, i16 0, i1 %384) #5, !dbg !65
+  %409 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %401, i1 %385, i16 0, i1 %385) #5, !dbg !65
+  %410 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %402, i1 %386, i16 0, i1 %386) #5, !dbg !65
+  %411 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %403, i1 %387, i16 0, i1 %387) #5, !dbg !65
+  %412 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %404, i1 %388, i16 0, i1 %388) #5, !dbg !65
+  %413 = tail call i16 asm sideeffect "mov.u16 $0, 0x0;\0A\09@$2 ld.global.L1::evict_first.b16 { $0 }, [ $1 + 0 ];\0A\09@!$4 mov.u16 $0, $3;", "=c,l,b,c,b"(ptr addrspace(1) %405, i1 %389, i16 0, i1 %389) #5, !dbg !65
+  %414 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %406) #5, !dbg !66
+  %415 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %407) #5, !dbg !66
+  %416 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %408) #5, !dbg !66
+  %417 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %409) #5, !dbg !66
+  %418 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %410) #5, !dbg !66
+  %419 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %411) #5, !dbg !66
+  %420 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %412) #5, !dbg !66
+  %421 = tail call float asm "cvt.f32.bf16 $0, $1;", "=r,h"(i16 %413) #5, !dbg !66
+  %422 = fsub float %414, %188, !dbg !67
+  %423 = fsub float %415, %188, !dbg !67
+  %424 = fsub float %416, %188, !dbg !67
+  %425 = fsub float %417, %188, !dbg !67
+  %426 = fsub float %418, %188, !dbg !67
+  %427 = fsub float %419, %188, !dbg !67
+  %428 = fsub float %420, %188, !dbg !67
+  %429 = fsub float %421, %188, !dbg !67
+  %430 = fsub float %422, %r.i.1.i, !dbg !68
+  %431 = fsub float %423, %r.i.1.i, !dbg !68
+  %432 = fsub float %424, %r.i.1.i, !dbg !68
+  %433 = fsub float %425, %r.i.1.i, !dbg !68
+  %434 = fsub float %426, %r.i.1.i, !dbg !68
+  %435 = fsub float %427, %r.i.1.i, !dbg !68
+  %436 = fsub float %428, %r.i.1.i, !dbg !68
+  %437 = fsub float %429, %r.i.1.i, !dbg !68
+  %438 = getelementptr i16, ptr addrspace(1) %3, i64 %390, !dbg !69
+  %439 = getelementptr i16, ptr addrspace(1) %3, i64 %391, !dbg !69
+  %440 = getelementptr i16, ptr addrspace(1) %3, i64 %392, !dbg !69
+  %441 = getelementptr i16, ptr addrspace(1) %3, i64 %393, !dbg !69
+  %442 = getelementptr i16, ptr addrspace(1) %3, i64 %394, !dbg !69
+  %443 = getelementptr i16, ptr addrspace(1) %3, i64 %395, !dbg !69
+  %444 = getelementptr i16, ptr addrspace(1) %3, i64 %396, !dbg !69
+  %445 = getelementptr i16, ptr addrspace(1) %3, i64 %397, !dbg !69
+  %446 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %430) #5, !dbg !70
+  %447 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %431) #5, !dbg !70
+  %448 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %432) #5, !dbg !70
+  %449 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %433) #5, !dbg !70
+  %450 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %434) #5, !dbg !70
+  %451 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %435) #5, !dbg !70
+  %452 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %436) #5, !dbg !70
+  %453 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %437) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %446, ptr addrspace(1) %438, i1 %382) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %447, ptr addrspace(1) %439, i1 %383) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %448, ptr addrspace(1) %440, i1 %384) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %449, ptr addrspace(1) %441, i1 %385) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %450, ptr addrspace(1) %442, i1 %386) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %451, ptr addrspace(1) %443, i1 %387) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %452, ptr addrspace(1) %444, i1 %388) #5, !dbg !70
+  tail call void asm sideeffect "@$2 st.global.b16 [ $1 + 0 ], { $0 };", "c,l,b"(i16 %453, ptr addrspace(1) %445, i1 %389) #5, !dbg !70
+  %454 = add nuw nsw i32 %372, 2048, !dbg !61
+  %455 = icmp ult i32 %372, 48209, !dbg !61
+  br i1 %455, label %371, label %456, !dbg !61
+
+456:                                              ; preds = %371
+  ret void, !dbg !71
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind memory(inaccessiblemem: readwrite)
+declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32) #1
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #2
+
+; Function Attrs: alwaysinline nounwind
+define float @__nv_logf(float %a) local_unnamed_addr #3 {
+__nv_fmaf_rn.exit10.i:
+  %0 = fcmp olt float %a, 0x3810000000000000
+  %1 = fmul float %a, 0x4160000000000000
+  %.02 = select i1 %0, float %1, float %a
+  %i.i.0 = select i1 %0, float -2.300000e+01, float 0.000000e+00
+  %2 = bitcast float %.02 to i32
+  %3 = add i32 %2, -1059760811
+  %4 = and i32 %3, -8388608
+  %5 = sub i32 %2, %4
+  %6 = bitcast i32 %5 to float
+  %7 = sitofp i32 %4 to float
+  %8 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not = icmp eq i32 %8, 0
+  %9 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %7, float 0x3E80000000000000, float %i.i.0) #5
+  %10 = tail call float @llvm.nvvm.fma.rn.f(float %7, float 0x3E80000000000000, float %i.i.0) #5
+  %.08 = select i1 %.not, float %10, float %9
+  %11 = fadd float %6, -1.000000e+00
+  %12 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not1 = icmp eq i32 %12, 0
+  %13 = tail call float @llvm.nvvm.fma.rn.ftz.f(float 0xBFC0AA04E0000000, float %11, float 0x3FC2073EC0000000) #5
+  %14 = tail call float @llvm.nvvm.fma.rn.f(float 0xBFC0AA04E0000000, float %11, float 0x3FC2073EC0000000) #5
+  %.010 = select i1 %.not1, float %14, float %13
+  %15 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not2 = icmp eq i32 %15, 0
+  %16 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.010, float %11, float 0xBFBF19B980000000) #5
+  %17 = tail call float @llvm.nvvm.fma.rn.f(float %.010, float %11, float 0xBFBF19B980000000) #5
+  %.011 = select i1 %.not2, float %17, float %16
+  %18 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not3 = icmp eq i32 %18, 0
+  %19 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.011, float %11, float 0x3FC1E52AA0000000) #5
+  %20 = tail call float @llvm.nvvm.fma.rn.f(float %.011, float %11, float 0x3FC1E52AA0000000) #5
+  %.012 = select i1 %.not3, float %20, float %19
+  %21 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not4 = icmp eq i32 %21, 0
+  %22 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.012, float %11, float 0xBFC55B1720000000) #5
+  %23 = tail call float @llvm.nvvm.fma.rn.f(float %.012, float %11, float 0xBFC55B1720000000) #5
+  %.09 = select i1 %.not4, float %23, float %22
+  %24 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not5 = icmp eq i32 %24, 0
+  %25 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.09, float %11, float 0x3FC99DA160000000) #5
+  %26 = tail call float @llvm.nvvm.fma.rn.f(float %.09, float %11, float 0x3FC99DA160000000) #5
+  %.05 = select i1 %.not5, float %26, float %25
+  %27 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not6 = icmp eq i32 %27, 0
+  %28 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.05, float %11, float 0xBFCFFFE440000000) #5
+  %29 = tail call float @llvm.nvvm.fma.rn.f(float %.05, float %11, float 0xBFCFFFE440000000) #5
+  %.01 = select i1 %.not6, float %29, float %28
+  %30 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not7 = icmp eq i32 %30, 0
+  %31 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.01, float %11, float 0x3FD5554F00000000) #5
+  %32 = tail call float @llvm.nvvm.fma.rn.f(float %.01, float %11, float 0x3FD5554F00000000) #5
+  %.0 = select i1 %.not7, float %32, float %31
+  %33 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not8 = icmp eq i32 %33, 0
+  %34 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.0, float %11, float -5.000000e-01) #5
+  %35 = tail call float @llvm.nvvm.fma.rn.f(float %.0, float %11, float -5.000000e-01) #5
+  %.07 = select i1 %.not8, float %35, float %34
+  %36 = fmul float %11, %.07
+  %37 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not9 = icmp eq i32 %37, 0
+  %38 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %36, float %11, float %11) #5
+  %39 = tail call float @llvm.nvvm.fma.rn.f(float %36, float %11, float %11) #5
+  %.06 = select i1 %.not9, float %39, float %38
+  %40 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not10 = icmp eq i32 %40, 0
+  %41 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.08, float 0x3FE62E4300000000, float %.06) #5
+  %42 = tail call float @llvm.nvvm.fma.rn.f(float %.08, float 0x3FE62E4300000000, float %.06) #5
+  %.04 = select i1 %.not10, float %42, float %41
+  %43 = icmp ugt i32 %2, 2139095039
+  br i1 %43, label %__nv_fmaf_rn.exit.i, label %__internal_accurate_logf.exit
+
+__nv_fmaf_rn.exit.i:                              ; preds = %__nv_fmaf_rn.exit10.i
+  %44 = tail call i32 @__nvvm_reflect(ptr nonnull @.str) #5
+  %.not11 = icmp eq i32 %44, 0
+  %45 = tail call float @llvm.nvvm.fma.rn.ftz.f(float %.02, float 0x7FF0000000000000, float 0x7FF0000000000000) #5
+  %46 = tail call float @llvm.nvvm.fma.rn.f(float %.02, float 0x7FF0000000000000, float 0x7FF0000000000000) #5
+  %.03 = select i1 %.not11, float %46, float %45
+  br label %__internal_accurate_logf.exit
+
+__internal_accurate_logf.exit:                    ; preds = %__nv_fmaf_rn.exit.i, %__nv_fmaf_rn.exit10.i
+  %r.i.0 = phi float [ %.03, %__nv_fmaf_rn.exit.i ], [ %.04, %__nv_fmaf_rn.exit10.i ]
+  %47 = fcmp oeq float %.02, 0.000000e+00
+  %r.i.1 = select i1 %47, float 0xFFF0000000000000, float %r.i.0
+  ret float %r.i.1
+}
+
+declare i32 @__nvvm_reflect(ptr) local_unnamed_addr #4
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.ftz.f(float, float, float) #0
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare float @llvm.nvvm.fma.rn.f(float, float, float) #0
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind memory(inaccessiblemem: readwrite) }
+attributes #2 = { convergent nocallback nounwind }
+attributes #3 = { alwaysinline nounwind "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #4 = { "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #5 = { nounwind }
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!2}
+!nvvm.annotations = !{!4, !5, !5, !4}
+!llvm.ident = !{!6}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!2 = distinct !DICompileUnit(language: DW_LANG_C, file: !3, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!3 = !DIFile(filename: "cgu6pijtlte2d3yicmpedfh2c7wgxsaexd6ichnxwbwh4deqe6ck.py", directory: "/tmp/torchinductor_root/gu")
+!4 = !{ptr @triton__0d1d2d3d4de5, !"kernel", i32 1}
+!5 = !{ptr @triton__0d1d2d3d4de5, !"maxntidx", i32 256}
+!6 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!7 = distinct !DISubprogram(name: "triton__0d1d2d3d4de5", linkageName: "triton__0d1d2d3d4de5", scope: !3, file: !3, line: 18, type: !8, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2)
+!8 = !DISubroutineType(cc: DW_CC_normal, types: !9)
+!9 = !{}
+!10 = !DILocation(line: 24, column: 33, scope: !7)
+!11 = !DILocation(line: 21, column: 28, scope: !7)
+!12 = !DILocation(line: 21, column: 34, scope: !7)
+!13 = !DILocation(line: 31, column: 46, scope: !7)
+!14 = !DILocation(line: 27, column: 36, scope: !7)
+!15 = !DILocation(line: 28, column: 27, scope: !7)
+!16 = !DILocation(line: 38, column: 21, scope: !17, inlinedAt: !19)
+!17 = distinct !DILexicalBlockFile(scope: !7, file: !18, discriminator: 0)
+!18 = !DIFile(filename: "triton_helpers.py", directory: "/usr/local/lib/python3.10/dist-packages/torch/_inductor")
+!19 = !DILocation(line: 34, column: 45, scope: !17)
+!20 = !DILocation(line: 29, column: 25, scope: !7)
+!21 = !DILocation(line: 31, column: 34, scope: !7)
+!22 = !DILocation(line: 31, column: 52, scope: !7)
+!23 = !DILocation(line: 31, column: 103, scope: !7)
+!24 = !DILocation(line: 36, column: 15, scope: !17, inlinedAt: !19)
+!25 = !DILocation(line: 38, column: 16, scope: !17, inlinedAt: !19)
+!26 = !DILocation(line: 0, scope: !7)
+!27 = !DILocation(line: 36, column: 15, scope: !28, inlinedAt: !29)
+!28 = distinct !DILexicalBlockFile(scope: !17, file: !18, discriminator: 0)
+!29 = !DILocation(line: 49, column: 29, scope: !28, inlinedAt: !30)
+!30 = !DILocation(line: 36, column: 38, scope: !28)
+!31 = !DILocation(line: 38, column: 21, scope: !28, inlinedAt: !29)
+!32 = !DILocation(line: 38, column: 16, scope: !28, inlinedAt: !29)
+!33 = !DILocation(line: 39, column: 29, scope: !28, inlinedAt: !29)
+!34 = !DILocation(line: 49, column: 29, scope: !17, inlinedAt: !35)
+!35 = !DILocation(line: 36, column: 38, scope: !17)
+!36 = !DILocation(line: 36, column: 41, scope: !7)
+!37 = !DILocation(line: 37, column: 25, scope: !7)
+!38 = !DILocation(line: 37, column: 36, scope: !7)
+!39 = !DILocation(line: 39, column: 36, scope: !7)
+!40 = !DILocation(line: 40, column: 27, scope: !7)
+!41 = !DILocation(line: 41, column: 25, scope: !7)
+!42 = !DILocation(line: 43, column: 34, scope: !7)
+!43 = !DILocation(line: 43, column: 52, scope: !7)
+!44 = !DILocation(line: 43, column: 103, scope: !7)
+!45 = !DILocation(line: 45, column: 22, scope: !7)
+!46 = !DILocation(line: 46, column: 22, scope: !7)
+!47 = !DILocation(line: 49, column: 40, scope: !7)
+!48 = !DILocation(line: 243, column: 36, scope: !49, inlinedAt: !51)
+!49 = distinct !DILexicalBlockFile(scope: !7, file: !50, discriminator: 0)
+!50 = !DIFile(filename: "standard.py", directory: "/usr/local/lib/python3.10/dist-packages/triton/language")
+!51 = !DILocation(line: 50, column: 27, scope: !49)
+!52 = !DILocation(line: 233, column: 15, scope: !53, inlinedAt: !54)
+!53 = distinct !DILexicalBlockFile(scope: !49, file: !50, discriminator: 0)
+!54 = !DILocation(line: 243, column: 36, scope: !53, inlinedAt: !55)
+!55 = !DILocation(line: 50, column: 27, scope: !53)
+!56 = !DILocation(line: 50, column: 30, scope: !7)
+!57 = !DILocation(line: 51, column: 25, scope: !7)
+!58 = !DILocation(line: 51, column: 37, scope: !7)
+!59 = !DILocation(line: 59, column: 23, scope: !7)
+!60 = !DILocation(line: 53, column: 27, scope: !7)
+!61 = !DILocation(line: 52, column: 36, scope: !7)
+!62 = !DILocation(line: 54, column: 25, scope: !7)
+!63 = !DILocation(line: 56, column: 41, scope: !7)
+!64 = !DILocation(line: 56, column: 35, scope: !7)
+!65 = !DILocation(line: 56, column: 53, scope: !7)
+!66 = !DILocation(line: 56, column: 105, scope: !7)
+!67 = !DILocation(line: 58, column: 24, scope: !7)
+!68 = !DILocation(line: 60, column: 24, scope: !7)
+!69 = !DILocation(line: 62, column: 29, scope: !7)
+!70 = !DILocation(line: 62, column: 54, scope: !7)
+!71 = !DILocation(line: 52, column: 4, scope: !7)
diff --git a/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ptx b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..299f61c0dc3563b0a7ef5de7012930d091499a39
--- /dev/null
+++ b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ptx
@@ -0,0 +1,1237 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2d3d4de5
+.extern .shared .align 1 .b8 global_smem[];
+.global .align 1 .b8 _$_str[11] = {95, 95, 67, 85, 68, 65, 95, 70, 84, 90, 0};
+
+.visible .entry triton__0d1d2d3d4de5(
+	.param .u64 triton__0d1d2d3d4de5_param_0,
+	.param .u64 triton__0d1d2d3d4de5_param_1,
+	.param .u64 triton__0d1d2d3d4de5_param_2,
+	.param .u64 triton__0d1d2d3d4de5_param_3,
+	.param .u64 triton__0d1d2d3d4de5_param_4,
+	.param .u64 triton__0d1d2d3d4de5_param_5
+)
+.maxntid 256, 1, 1
+{
+	.reg .pred 	%p<119>;
+	.reg .b16 	%rs<89>;
+	.reg .b32 	%r<106>;
+	.reg .f32 	%f<252>;
+	.reg .b64 	%rd<137>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd28, [triton__0d1d2d3d4de5_param_3];
+	ld.param.u64 	%rd27, [triton__0d1d2d3d4de5_param_2];
+	ld.param.u64 	%rd26, [triton__0d1d2d3d4de5_param_1];
+	ld.param.u64 	%rd30, [triton__0d1d2d3d4de5_param_0];
+$L__tmp0:
+	.loc	1 24 33
+	mov.u32 	%r1, %tid.x;
+	shr.u32 	%r2, %r1, 5;
+	and.b32  	%r3, %r1, 255;
+	or.b32  	%r8, %r3, 256;
+	or.b32  	%r9, %r3, 512;
+	or.b32  	%r10, %r3, 768;
+	or.b32  	%r11, %r3, 1024;
+	or.b32  	%r12, %r3, 1280;
+	or.b32  	%r13, %r3, 1536;
+	or.b32  	%r14, %r3, 1792;
+	.loc	1 21 28
+	mov.u32 %r7, %ctaid.x;
+	.loc	1 21 34
+	cvt.s64.s32 	%rd1, %r7;
+	cvt.u64.u32 	%rd2, %r3;
+	cvt.u64.u32 	%rd9, %r14;
+	cvt.u64.u32 	%rd8, %r13;
+	cvt.u64.u32 	%rd7, %r12;
+	cvt.u64.u32 	%rd6, %r11;
+	cvt.u64.u32 	%rd5, %r10;
+	cvt.u64.u32 	%rd4, %r9;
+	cvt.u64.u32 	%rd3, %r8;
+	.loc	1 31 46
+	mul.wide.s32 	%rd10, %r7, 50257;
+	.loc	1 27 36
+	shl.b64 	%rd31, %rd10, 1;
+	add.s64 	%rd11, %rd30, %rd31;
+	mov.f32 	%f235, 0fFF800000;
+	mov.u64 	%rd134, 0;
+	mov.u16 	%rs2, 0;
+	mov.f32 	%f236, %f235;
+	mov.f32 	%f237, %f235;
+	mov.f32 	%f238, %f235;
+	mov.f32 	%f239, %f235;
+	mov.f32 	%f240, %f235;
+	mov.f32 	%f241, %f235;
+	mov.f32 	%f242, %f235;
+$L__BB0_1:
+$L__tmp1:
+	.loc	2 38 21
+	setp.num.f32 	%p18, %f235, %f235;
+	setp.num.f32 	%p19, %f236, %f236;
+	setp.num.f32 	%p20, %f237, %f237;
+	setp.num.f32 	%p21, %f238, %f238;
+	setp.num.f32 	%p22, %f239, %f239;
+	setp.num.f32 	%p23, %f240, %f240;
+	setp.num.f32 	%p24, %f241, %f241;
+	setp.num.f32 	%p25, %f242, %f242;
+$L__tmp2:
+	.loc	1 28 27
+	or.b64  	%rd40, %rd134, %rd2;
+	or.b64  	%rd41, %rd134, %rd3;
+	or.b64  	%rd42, %rd134, %rd4;
+	or.b64  	%rd43, %rd134, %rd5;
+	or.b64  	%rd44, %rd134, %rd6;
+	or.b64  	%rd45, %rd134, %rd7;
+	or.b64  	%rd46, %rd134, %rd8;
+	or.b64  	%rd47, %rd134, %rd9;
+	.loc	1 29 25
+	setp.lt.u64 	%p17, %rd47, 50257;
+	setp.lt.u64 	%p15, %rd46, 50257;
+	setp.lt.u64 	%p13, %rd45, 50257;
+	setp.lt.u64 	%p11, %rd44, 50257;
+	setp.lt.u64 	%p9, %rd43, 50257;
+	setp.lt.u64 	%p7, %rd42, 50257;
+	setp.lt.u64 	%p5, %rd41, 50257;
+	setp.lt.u64 	%p3, %rd40, 50257;
+	.loc	1 31 34
+	shl.b64 	%rd48, %rd40, 1;
+	add.s64 	%rd32, %rd11, %rd48;
+	shl.b64 	%rd49, %rd41, 1;
+	add.s64 	%rd33, %rd11, %rd49;
+	shl.b64 	%rd50, %rd42, 1;
+	add.s64 	%rd34, %rd11, %rd50;
+	shl.b64 	%rd51, %rd43, 1;
+	add.s64 	%rd35, %rd11, %rd51;
+	shl.b64 	%rd52, %rd44, 1;
+	add.s64 	%rd36, %rd11, %rd52;
+	shl.b64 	%rd53, %rd45, 1;
+	add.s64 	%rd37, %rd11, %rd53;
+	shl.b64 	%rd54, %rd46, 1;
+	add.s64 	%rd38, %rd11, %rd54;
+	shl.b64 	%rd55, %rd47, 1;
+	add.s64 	%rd39, %rd11, %rd55;
+	.loc	1 31 52
+	mov.u16 %rs1, 0x0;
+	@%p3 ld.global.L1::evict_last.b16 { %rs1 }, [ %rd32 + 0 ];
+	@!%p3 mov.u16 %rs1, %rs2;
+	mov.u16 %rs3, 0x0;
+	@%p5 ld.global.L1::evict_last.b16 { %rs3 }, [ %rd33 + 0 ];
+	@!%p5 mov.u16 %rs3, %rs2;
+	mov.u16 %rs5, 0x0;
+	@%p7 ld.global.L1::evict_last.b16 { %rs5 }, [ %rd34 + 0 ];
+	@!%p7 mov.u16 %rs5, %rs2;
+	mov.u16 %rs7, 0x0;
+	@%p9 ld.global.L1::evict_last.b16 { %rs7 }, [ %rd35 + 0 ];
+	@!%p9 mov.u16 %rs7, %rs2;
+	mov.u16 %rs9, 0x0;
+	@%p11 ld.global.L1::evict_last.b16 { %rs9 }, [ %rd36 + 0 ];
+	@!%p11 mov.u16 %rs9, %rs2;
+	mov.u16 %rs11, 0x0;
+	@%p13 ld.global.L1::evict_last.b16 { %rs11 }, [ %rd37 + 0 ];
+	@!%p13 mov.u16 %rs11, %rs2;
+	mov.u16 %rs13, 0x0;
+	@%p15 ld.global.L1::evict_last.b16 { %rs13 }, [ %rd38 + 0 ];
+	@!%p15 mov.u16 %rs13, %rs2;
+	mov.u16 %rs15, 0x0;
+	@%p17 ld.global.L1::evict_last.b16 { %rs15 }, [ %rd39 + 0 ];
+	@!%p17 mov.u16 %rs15, %rs2;
+	.loc	1 31 103
+	cvt.f32.bf16 %r15, %rs1;
+	mov.b32 	%f47, %r15;
+	cvt.f32.bf16 %r16, %rs3;
+	mov.b32 	%f48, %r16;
+	cvt.f32.bf16 %r17, %rs5;
+	mov.b32 	%f49, %r17;
+	cvt.f32.bf16 %r18, %rs7;
+	mov.b32 	%f50, %r18;
+	cvt.f32.bf16 %r19, %rs9;
+	mov.b32 	%f51, %r19;
+	cvt.f32.bf16 %r20, %rs11;
+	mov.b32 	%f52, %r20;
+	cvt.f32.bf16 %r21, %rs13;
+	mov.b32 	%f53, %r21;
+	cvt.f32.bf16 %r22, %rs15;
+	mov.b32 	%f54, %r22;
+$L__tmp3:
+	.loc	2 36 15
+	setp.leu.f32 	%p26, %f235, %f47;
+	setp.leu.f32 	%p27, %f236, %f48;
+	setp.leu.f32 	%p28, %f237, %f49;
+	setp.leu.f32 	%p29, %f238, %f50;
+	setp.leu.f32 	%p30, %f239, %f51;
+	setp.leu.f32 	%p31, %f240, %f52;
+	setp.leu.f32 	%p32, %f241, %f53;
+	setp.leu.f32 	%p33, %f242, %f54;
+$L__tmp4:
+	.loc	1 0 0
+	selp.f32 	%f55, %f54, %f242, %p33;
+	selp.f32 	%f56, %f55, %f242, %p25;
+	selp.f32 	%f242, %f56, %f242, %p17;
+	selp.f32 	%f57, %f53, %f241, %p32;
+	selp.f32 	%f58, %f57, %f241, %p24;
+	selp.f32 	%f241, %f58, %f241, %p15;
+	selp.f32 	%f59, %f52, %f240, %p31;
+	selp.f32 	%f60, %f59, %f240, %p23;
+	selp.f32 	%f240, %f60, %f240, %p13;
+	selp.f32 	%f61, %f51, %f239, %p30;
+	selp.f32 	%f62, %f61, %f239, %p22;
+	selp.f32 	%f239, %f62, %f239, %p11;
+	selp.f32 	%f63, %f50, %f238, %p29;
+	selp.f32 	%f64, %f63, %f238, %p21;
+	selp.f32 	%f238, %f64, %f238, %p9;
+	selp.f32 	%f65, %f49, %f237, %p28;
+	selp.f32 	%f66, %f65, %f237, %p20;
+	selp.f32 	%f237, %f66, %f237, %p7;
+	selp.f32 	%f67, %f48, %f236, %p27;
+	selp.f32 	%f68, %f67, %f236, %p19;
+	selp.f32 	%f236, %f68, %f236, %p5;
+	selp.f32 	%f69, %f47, %f235, %p26;
+	selp.f32 	%f70, %f69, %f235, %p18;
+	selp.f32 	%f235, %f70, %f235, %p3;
+	.loc	1 27 36
+	add.s64 	%rd134, %rd134, 2048;
+	cvt.u32.u64 	%r23, %rd134;
+	add.s32 	%r24, %r23, -2048;
+	setp.lt.u32 	%p34, %r24, 48209;
+	@%p34 bra 	$L__BB0_1;
+	.loc	1 24 33
+	and.b32  	%r4, %r1, 31;
+	and.b32  	%r32, %r2, 7;
+$L__tmp5:
+	.loc	2 36 15
+	setp.gt.f32 	%p39, %f235, %f236;
+	.loc	2 38 21
+	setp.nan.f32 	%p40, %f235, %f235;
+	.loc	2 39 29
+	selp.f32 	%f79, %f235, %f236, %p40;
+	selp.f32 	%f80, %f235, %f79, %p39;
+	.loc	2 36 15
+	setp.gt.f32 	%p41, %f80, %f237;
+	.loc	2 38 21
+	setp.nan.f32 	%p42, %f80, %f80;
+	.loc	2 39 29
+	selp.f32 	%f81, %f80, %f237, %p42;
+	selp.f32 	%f82, %f80, %f81, %p41;
+	.loc	2 36 15
+	setp.gt.f32 	%p43, %f82, %f238;
+	.loc	2 38 21
+	setp.nan.f32 	%p44, %f82, %f82;
+	.loc	2 39 29
+	selp.f32 	%f83, %f82, %f238, %p44;
+	selp.f32 	%f84, %f82, %f83, %p43;
+	.loc	2 36 15
+	setp.gt.f32 	%p45, %f84, %f239;
+	.loc	2 38 21
+	setp.nan.f32 	%p46, %f84, %f84;
+	.loc	2 39 29
+	selp.f32 	%f85, %f84, %f239, %p46;
+	selp.f32 	%f86, %f84, %f85, %p45;
+	.loc	2 36 15
+	setp.gt.f32 	%p47, %f86, %f240;
+	.loc	2 38 21
+	setp.nan.f32 	%p48, %f86, %f86;
+	.loc	2 39 29
+	selp.f32 	%f87, %f86, %f240, %p48;
+	selp.f32 	%f88, %f86, %f87, %p47;
+	.loc	2 36 15
+	setp.gt.f32 	%p49, %f88, %f241;
+	.loc	2 38 21
+	setp.nan.f32 	%p50, %f88, %f88;
+	.loc	2 39 29
+	selp.f32 	%f89, %f88, %f241, %p50;
+	selp.f32 	%f90, %f88, %f89, %p49;
+	.loc	2 36 15
+	setp.gt.f32 	%p51, %f90, %f242;
+	.loc	2 38 21
+	setp.nan.f32 	%p52, %f90, %f90;
+	.loc	2 39 29
+	selp.f32 	%f91, %f90, %f242, %p52;
+	selp.f32 	%f92, %f90, %f91, %p51;
+$L__tmp6:
+	.loc	2 49 29
+	mov.b32 	%r33, %f92;
+	shfl.sync.bfly.b32	%r34, %r33, 16, 31, -1;
+	mov.b32 	%f93, %r34;
+$L__tmp7:
+	.loc	2 36 15
+	setp.gt.f32 	%p53, %f92, %f93;
+	.loc	2 38 21
+	setp.nan.f32 	%p54, %f92, %f92;
+	.loc	2 39 29
+	selp.f32 	%f94, %f92, %f93, %p53;
+	selp.f32 	%f95, %f92, %f94, %p54;
+$L__tmp8:
+	.loc	2 49 29
+	mov.b32 	%r35, %f95;
+	shfl.sync.bfly.b32	%r36, %r35, 8, 31, -1;
+	mov.b32 	%f96, %r36;
+$L__tmp9:
+	.loc	2 36 15
+	setp.gt.f32 	%p55, %f95, %f96;
+	.loc	2 38 21
+	setp.nan.f32 	%p56, %f95, %f95;
+	.loc	2 39 29
+	selp.f32 	%f97, %f95, %f96, %p56;
+	selp.f32 	%f98, %f95, %f97, %p55;
+$L__tmp10:
+	.loc	2 49 29
+	mov.b32 	%r37, %f98;
+	shfl.sync.bfly.b32	%r38, %r37, 4, 31, -1;
+	mov.b32 	%f99, %r38;
+$L__tmp11:
+	.loc	2 36 15
+	setp.gt.f32 	%p57, %f98, %f99;
+	.loc	2 38 21
+	setp.nan.f32 	%p58, %f98, %f98;
+	.loc	2 39 29
+	selp.f32 	%f100, %f98, %f99, %p58;
+	selp.f32 	%f101, %f98, %f100, %p57;
+$L__tmp12:
+	.loc	2 49 29
+	mov.b32 	%r39, %f101;
+	shfl.sync.bfly.b32	%r40, %r39, 2, 31, -1;
+	mov.b32 	%f102, %r40;
+$L__tmp13:
+	.loc	2 36 15
+	setp.gt.f32 	%p59, %f101, %f102;
+	.loc	2 38 21
+	setp.nan.f32 	%p60, %f101, %f101;
+	.loc	2 39 29
+	selp.f32 	%f103, %f101, %f102, %p60;
+	selp.f32 	%f104, %f101, %f103, %p59;
+$L__tmp14:
+	.loc	2 49 29
+	mov.b32 	%r41, %f104;
+	shfl.sync.bfly.b32	%r42, %r41, 1, 31, -1;
+	mov.b32 	%f105, %r42;
+$L__tmp15:
+	.loc	2 36 15
+	setp.gt.f32 	%p61, %f104, %f105;
+	.loc	2 38 21
+	setp.nan.f32 	%p62, %f104, %f104;
+	.loc	2 39 29
+	selp.f32 	%f106, %f104, %f105, %p62;
+	selp.f32 	%f107, %f104, %f106, %p61;
+$L__tmp16:
+	.loc	2 49 29
+	setp.eq.s32 	%p35, %r4, 0;
+	shl.b32 	%r43, %r32, 2;
+	mov.u32 	%r44, global_smem;
+	add.s32 	%r62, %r44, %r43;
+	mov.b32 	%r26, %f107;
+	@%p35 st.shared.b32 [ %r62 + 0 ], %r26;
+	bar.sync 	0;
+	setp.lt.s32 	%p36, %r1, 8;
+	shl.b32 	%r45, %r1, 2;
+	add.s32 	%r65, %r44, %r45;
+	@%p36 ld.shared.b32 %r27, [ %r65 + 0 ];
+	mov.b32 	%f108, %r27;
+	shfl.sync.bfly.b32	%r46, %r27, 4, 31, -1;
+	mov.b32 	%f109, %r46;
+$L__tmp17:
+	.loc	2 36 15
+	setp.gt.f32 	%p63, %f108, %f109;
+	.loc	2 38 21
+	setp.nan.f32 	%p64, %f108, %f108;
+	.loc	2 39 29
+	selp.f32 	%f110, %f108, %f109, %p63;
+	selp.f32 	%f111, %f108, %f110, %p64;
+$L__tmp18:
+	.loc	2 49 29
+	mov.b32 	%r47, %f111;
+	shfl.sync.bfly.b32	%r48, %r47, 2, 31, -1;
+	mov.b32 	%f112, %r48;
+$L__tmp19:
+	.loc	2 36 15
+	setp.gt.f32 	%p65, %f111, %f112;
+	.loc	2 38 21
+	setp.nan.f32 	%p66, %f111, %f111;
+	.loc	2 39 29
+	selp.f32 	%f113, %f111, %f112, %p66;
+	selp.f32 	%f114, %f111, %f113, %p65;
+$L__tmp20:
+	.loc	2 49 29
+	mov.b32 	%r49, %f114;
+	shfl.sync.bfly.b32	%r50, %r49, 1, 31, -1;
+	mov.b32 	%f115, %r50;
+$L__tmp21:
+	.loc	2 36 15
+	setp.gt.f32 	%p67, %f114, %f115;
+	.loc	2 38 21
+	setp.nan.f32 	%p68, %f114, %f114;
+	.loc	2 39 29
+	selp.f32 	%f116, %f114, %f115, %p68;
+	selp.f32 	%f117, %f114, %f116, %p67;
+$L__tmp22:
+	.loc	2 49 29
+	and.b32  	%r51, %r1, 7;
+	setp.eq.s32 	%p69, %r51, 0;
+	and.pred  	%p89, %p36, %p69;
+	mov.b32 	%r30, %f117;
+	@%p89 st.shared.b32 [ %r65 + 0 ], %r30;
+	bar.sync 	0;
+	ld.shared.f32 	%f17, [global_smem];
+$L__tmp23:
+	.loc	1 36 41
+	bar.sync 	0;
+	st.shared.f32 	[global_smem], %f17;
+	bar.sync 	0;
+	ld.shared.u32 	%r31, [global_smem];
+	.loc	1 37 25
+	shl.b64 	%rd58, %rd1, 2;
+	add.s64 	%rd56, %rd26, %rd58;
+	.loc	1 37 36
+	setp.eq.s32 	%p38, %r3, 0;
+	@%p38 st.global.b32 [ %rd56 + 0 ], { %r31 };
+	mov.f32 	%f243, 0f00000000;
+	mov.u64 	%rd135, 0;
+	mov.f32 	%f244, %f243;
+	mov.f32 	%f245, %f243;
+	mov.f32 	%f246, %f243;
+	mov.f32 	%f247, %f243;
+	mov.f32 	%f248, %f243;
+	mov.f32 	%f249, %f243;
+	mov.f32 	%f250, %f243;
+$L__BB0_3:
+	.loc	1 40 27
+	or.b64  	%rd67, %rd135, %rd2;
+	or.b64  	%rd68, %rd135, %rd3;
+	or.b64  	%rd69, %rd135, %rd4;
+	or.b64  	%rd70, %rd135, %rd5;
+	or.b64  	%rd71, %rd135, %rd6;
+	or.b64  	%rd72, %rd135, %rd7;
+	or.b64  	%rd73, %rd135, %rd8;
+	or.b64  	%rd74, %rd135, %rd9;
+	.loc	1 41 25
+	setp.lt.u64 	%p85, %rd74, 50257;
+	setp.lt.u64 	%p83, %rd73, 50257;
+	setp.lt.u64 	%p81, %rd72, 50257;
+	setp.lt.u64 	%p79, %rd71, 50257;
+	setp.lt.u64 	%p77, %rd70, 50257;
+	setp.lt.u64 	%p75, %rd69, 50257;
+	setp.lt.u64 	%p73, %rd68, 50257;
+	setp.lt.u64 	%p71, %rd67, 50257;
+	.loc	1 43 34
+	shl.b64 	%rd75, %rd67, 1;
+	add.s64 	%rd59, %rd11, %rd75;
+	shl.b64 	%rd76, %rd68, 1;
+	add.s64 	%rd60, %rd11, %rd76;
+	shl.b64 	%rd77, %rd69, 1;
+	add.s64 	%rd61, %rd11, %rd77;
+	shl.b64 	%rd78, %rd70, 1;
+	add.s64 	%rd62, %rd11, %rd78;
+	shl.b64 	%rd79, %rd71, 1;
+	add.s64 	%rd63, %rd11, %rd79;
+	shl.b64 	%rd80, %rd72, 1;
+	add.s64 	%rd64, %rd11, %rd80;
+	shl.b64 	%rd81, %rd73, 1;
+	add.s64 	%rd65, %rd11, %rd81;
+	shl.b64 	%rd82, %rd74, 1;
+	add.s64 	%rd66, %rd11, %rd82;
+	.loc	1 43 52
+	mov.u16 %rs25, 0x0;
+	@%p71 ld.global.L1::evict_last.b16 { %rs25 }, [ %rd59 + 0 ];
+	@!%p71 mov.u16 %rs25, %rs2;
+	mov.u16 %rs27, 0x0;
+	@%p73 ld.global.L1::evict_last.b16 { %rs27 }, [ %rd60 + 0 ];
+	@!%p73 mov.u16 %rs27, %rs2;
+	mov.u16 %rs29, 0x0;
+	@%p75 ld.global.L1::evict_last.b16 { %rs29 }, [ %rd61 + 0 ];
+	@!%p75 mov.u16 %rs29, %rs2;
+	mov.u16 %rs31, 0x0;
+	@%p77 ld.global.L1::evict_last.b16 { %rs31 }, [ %rd62 + 0 ];
+	@!%p77 mov.u16 %rs31, %rs2;
+	mov.u16 %rs33, 0x0;
+	@%p79 ld.global.L1::evict_last.b16 { %rs33 }, [ %rd63 + 0 ];
+	@!%p79 mov.u16 %rs33, %rs2;
+	mov.u16 %rs35, 0x0;
+	@%p81 ld.global.L1::evict_last.b16 { %rs35 }, [ %rd64 + 0 ];
+	@!%p81 mov.u16 %rs35, %rs2;
+	mov.u16 %rs37, 0x0;
+	@%p83 ld.global.L1::evict_last.b16 { %rs37 }, [ %rd65 + 0 ];
+	@!%p83 mov.u16 %rs37, %rs2;
+	mov.u16 %rs39, 0x0;
+	@%p85 ld.global.L1::evict_last.b16 { %rs39 }, [ %rd66 + 0 ];
+	@!%p85 mov.u16 %rs39, %rs2;
+	.loc	1 43 103
+	cvt.f32.bf16 %r52, %rs25;
+	mov.b32 	%f134, %r52;
+	cvt.f32.bf16 %r53, %rs27;
+	mov.b32 	%f135, %r53;
+	cvt.f32.bf16 %r54, %rs29;
+	mov.b32 	%f136, %r54;
+	cvt.f32.bf16 %r55, %rs31;
+	mov.b32 	%f137, %r55;
+	cvt.f32.bf16 %r56, %rs33;
+	mov.b32 	%f138, %r56;
+	cvt.f32.bf16 %r57, %rs35;
+	mov.b32 	%f139, %r57;
+	cvt.f32.bf16 %r58, %rs37;
+	mov.b32 	%f140, %r58;
+	cvt.f32.bf16 %r59, %rs39;
+	mov.b32 	%f141, %r59;
+	.loc	1 45 22
+	sub.f32 	%f142, %f134, %f17;
+	sub.f32 	%f143, %f135, %f17;
+	sub.f32 	%f144, %f136, %f17;
+	sub.f32 	%f145, %f137, %f17;
+	sub.f32 	%f146, %f138, %f17;
+	sub.f32 	%f147, %f139, %f17;
+	sub.f32 	%f148, %f140, %f17;
+	sub.f32 	%f149, %f141, %f17;
+	.loc	1 46 22
+	mul.f32 	%f119, %f142, 0f3FB8AA3B;
+	ex2.approx.f32 %f118, %f119;
+	mul.f32 	%f121, %f143, 0f3FB8AA3B;
+	ex2.approx.f32 %f120, %f121;
+	mul.f32 	%f123, %f144, 0f3FB8AA3B;
+	ex2.approx.f32 %f122, %f123;
+	mul.f32 	%f125, %f145, 0f3FB8AA3B;
+	ex2.approx.f32 %f124, %f125;
+	mul.f32 	%f127, %f146, 0f3FB8AA3B;
+	ex2.approx.f32 %f126, %f127;
+	mul.f32 	%f129, %f147, 0f3FB8AA3B;
+	ex2.approx.f32 %f128, %f129;
+	mul.f32 	%f131, %f148, 0f3FB8AA3B;
+	ex2.approx.f32 %f130, %f131;
+	mul.f32 	%f133, %f149, 0f3FB8AA3B;
+	ex2.approx.f32 %f132, %f133;
+	.loc	1 49 40
+	selp.f32 	%f150, %f118, 0f80000000, %p71;
+	selp.f32 	%f151, %f120, 0f80000000, %p73;
+	selp.f32 	%f152, %f122, 0f80000000, %p75;
+	selp.f32 	%f153, %f124, 0f80000000, %p77;
+	selp.f32 	%f154, %f126, 0f80000000, %p79;
+	selp.f32 	%f155, %f128, 0f80000000, %p81;
+	selp.f32 	%f156, %f130, 0f80000000, %p83;
+	selp.f32 	%f157, %f132, 0f80000000, %p85;
+	add.f32 	%f250, %f250, %f157;
+	add.f32 	%f249, %f249, %f156;
+	add.f32 	%f248, %f248, %f155;
+	add.f32 	%f247, %f247, %f154;
+	add.f32 	%f246, %f246, %f153;
+	add.f32 	%f245, %f245, %f152;
+	add.f32 	%f244, %f244, %f151;
+	add.f32 	%f243, %f243, %f150;
+	.loc	1 39 36
+	add.s64 	%rd135, %rd135, 2048;
+	cvt.u32.u64 	%r60, %rd135;
+	add.s32 	%r61, %r60, -2048;
+	setp.lt.u32 	%p86, %r61, 48209;
+	@%p86 bra 	$L__BB0_3;
+$L__tmp24:
+	.loc	3 243 36
+	bar.sync 	0;
+$L__tmp25:
+	.loc	3 233 15
+	add.f32 	%f158, %f243, %f244;
+	add.f32 	%f159, %f245, %f158;
+	add.f32 	%f160, %f246, %f159;
+	add.f32 	%f161, %f247, %f160;
+	add.f32 	%f162, %f248, %f161;
+	add.f32 	%f163, %f249, %f162;
+	add.f32 	%f164, %f250, %f163;
+$L__tmp26:
+	.loc	3 243 36
+	mov.b32 	%r69, %f164;
+	shfl.sync.bfly.b32	%r70, %r69, 16, 31, -1;
+	mov.b32 	%f165, %r70;
+$L__tmp27:
+	.loc	3 233 15
+	add.f32 	%f166, %f164, %f165;
+$L__tmp28:
+	.loc	3 243 36
+	mov.b32 	%r71, %f166;
+	shfl.sync.bfly.b32	%r72, %r71, 8, 31, -1;
+	mov.b32 	%f167, %r72;
+$L__tmp29:
+	.loc	3 233 15
+	add.f32 	%f168, %f166, %f167;
+$L__tmp30:
+	.loc	3 243 36
+	mov.b32 	%r73, %f168;
+	shfl.sync.bfly.b32	%r74, %r73, 4, 31, -1;
+	mov.b32 	%f169, %r74;
+$L__tmp31:
+	.loc	3 233 15
+	add.f32 	%f170, %f168, %f169;
+$L__tmp32:
+	.loc	3 243 36
+	mov.b32 	%r75, %f170;
+	shfl.sync.bfly.b32	%r76, %r75, 2, 31, -1;
+	mov.b32 	%f171, %r76;
+$L__tmp33:
+	.loc	3 233 15
+	add.f32 	%f172, %f170, %f171;
+$L__tmp34:
+	.loc	3 243 36
+	mov.b32 	%r77, %f172;
+	shfl.sync.bfly.b32	%r78, %r77, 1, 31, -1;
+	mov.b32 	%f173, %r78;
+$L__tmp35:
+	.loc	3 233 15
+	add.f32 	%f174, %f172, %f173;
+$L__tmp36:
+	.loc	3 243 36
+	mov.b32 	%r63, %f174;
+	@%p35 st.shared.b32 [ %r62 + 0 ], %r63;
+	bar.sync 	0;
+	@%p36 ld.shared.b32 %r64, [ %r65 + 0 ];
+	mov.b32 	%f175, %r64;
+	shfl.sync.bfly.b32	%r79, %r64, 4, 31, -1;
+	mov.b32 	%f176, %r79;
+$L__tmp37:
+	.loc	3 233 15
+	add.f32 	%f177, %f175, %f176;
+$L__tmp38:
+	.loc	3 243 36
+	mov.b32 	%r80, %f177;
+	shfl.sync.bfly.b32	%r81, %r80, 2, 31, -1;
+	mov.b32 	%f178, %r81;
+$L__tmp39:
+	.loc	3 233 15
+	add.f32 	%f179, %f177, %f178;
+$L__tmp40:
+	.loc	3 243 36
+	mov.b32 	%r82, %f179;
+	shfl.sync.bfly.b32	%r83, %r82, 1, 31, -1;
+	mov.b32 	%f180, %r83;
+$L__tmp41:
+	.loc	3 233 15
+	add.f32 	%f181, %f179, %f180;
+$L__tmp42:
+	.loc	3 243 36
+	mov.b32 	%r67, %f181;
+	@%p89 st.shared.b32 [ %r65 + 0 ], %r67;
+	bar.sync 	0;
+	ld.shared.f32 	%f182, [global_smem];
+$L__tmp43:
+	.loc	1 50 30
+	bar.sync 	0;
+	st.shared.f32 	[global_smem], %f182;
+	bar.sync 	0;
+	ld.shared.u32 	%r68, [global_smem];
+	.loc	1 51 25
+	add.s64 	%rd83, %rd27, %rd58;
+	.loc	1 51 37
+	@%p38 st.global.b32 [ %rd83 + 0 ], { %r68 };
+	.loc	1 59 23
+	setp.lt.f32 	%p91, %f182, 0f00800000;
+	mul.f32 	%f183, %f182, 0f4B000000;
+	selp.f32 	%f34, %f183, %f182, %p91;
+	selp.f32 	%f184, 0fC1B80000, 0f00000000, %p91;
+	mov.b32 	%r84, %f34;
+	add.s32 	%r85, %r84, -1059760811;
+	and.b32  	%r86, %r85, -8388608;
+	sub.s32 	%r87, %r84, %r86;
+	mov.b32 	%f185, %r87;
+	cvt.rn.f32.s32 	%f186, %r86;
+	mov.f32 	%f187, 0f34000000;
+	fma.rn.ftz.f32 	%f188, %f186, %f187, %f184;
+	add.f32 	%f189, %f185, 0fBF800000;
+	mov.f32 	%f190, 0f3E1039F6;
+	mov.f32 	%f191, 0fBE055027;
+	fma.rn.ftz.f32 	%f192, %f191, %f189, %f190;
+	mov.f32 	%f193, 0fBDF8CDCC;
+	fma.rn.ftz.f32 	%f194, %f192, %f189, %f193;
+	mov.f32 	%f195, 0f3E0F2955;
+	fma.rn.ftz.f32 	%f196, %f194, %f189, %f195;
+	mov.f32 	%f197, 0fBE2AD8B9;
+	fma.rn.ftz.f32 	%f198, %f196, %f189, %f197;
+	mov.f32 	%f199, 0f3E4CED0B;
+	fma.rn.ftz.f32 	%f200, %f198, %f189, %f199;
+	mov.f32 	%f201, 0fBE7FFF22;
+	fma.rn.ftz.f32 	%f202, %f200, %f189, %f201;
+	mov.f32 	%f203, 0f3EAAAA78;
+	fma.rn.ftz.f32 	%f204, %f202, %f189, %f203;
+	mov.f32 	%f205, 0fBF000000;
+	fma.rn.ftz.f32 	%f206, %f204, %f189, %f205;
+	mul.f32 	%f207, %f189, %f206;
+	fma.rn.ftz.f32 	%f208, %f207, %f189, %f189;
+	mov.f32 	%f209, 0f3F317218;
+	fma.rn.ftz.f32 	%f251, %f188, %f209, %f208;
+	setp.lt.u32 	%p92, %r84, 2139095040;
+	@%p92 bra 	$L__BB0_6;
+	.loc	1 0 23
+	mov.f32 	%f210, 0f7F800000;
+	fma.rn.ftz.f32 	%f251, %f34, %f210, %f210;
+$L__BB0_6:
+	.loc	1 59 23
+	setp.eq.f32 	%p93, %f34, 0f00000000;
+	selp.f32 	%f38, 0fFF800000, %f251, %p93;
+	mov.u64 	%rd136, 0;
+$L__BB0_7:
+	.loc	1 53 27
+	or.b64  	%rd102, %rd2, %rd136;
+	or.b64  	%rd103, %rd3, %rd136;
+	or.b64  	%rd104, %rd4, %rd136;
+	or.b64  	%rd105, %rd5, %rd136;
+	or.b64  	%rd106, %rd6, %rd136;
+	or.b64  	%rd107, %rd7, %rd136;
+	or.b64  	%rd108, %rd8, %rd136;
+	or.b64  	%rd109, %rd9, %rd136;
+	.loc	1 54 25
+	setp.lt.u64 	%p94, %rd102, 50257;
+	setp.lt.u64 	%p96, %rd103, 50257;
+	setp.lt.u64 	%p98, %rd104, 50257;
+	setp.lt.u64 	%p100, %rd105, 50257;
+	setp.lt.u64 	%p102, %rd106, 50257;
+	setp.lt.u64 	%p104, %rd107, 50257;
+	setp.lt.u64 	%p106, %rd108, 50257;
+	setp.lt.u64 	%p108, %rd109, 50257;
+	.loc	1 56 41
+	add.s64 	%rd110, %rd102, %rd10;
+	add.s64 	%rd111, %rd103, %rd10;
+	add.s64 	%rd112, %rd104, %rd10;
+	add.s64 	%rd113, %rd105, %rd10;
+	add.s64 	%rd114, %rd106, %rd10;
+	add.s64 	%rd115, %rd107, %rd10;
+	add.s64 	%rd116, %rd108, %rd10;
+	add.s64 	%rd117, %rd109, %rd10;
+	.loc	1 56 35
+	shl.b64 	%rd118, %rd102, 1;
+	add.s64 	%rd86, %rd11, %rd118;
+	shl.b64 	%rd119, %rd103, 1;
+	add.s64 	%rd87, %rd11, %rd119;
+	shl.b64 	%rd120, %rd104, 1;
+	add.s64 	%rd88, %rd11, %rd120;
+	shl.b64 	%rd121, %rd105, 1;
+	add.s64 	%rd89, %rd11, %rd121;
+	shl.b64 	%rd122, %rd106, 1;
+	add.s64 	%rd90, %rd11, %rd122;
+	shl.b64 	%rd123, %rd107, 1;
+	add.s64 	%rd91, %rd11, %rd123;
+	shl.b64 	%rd124, %rd108, 1;
+	add.s64 	%rd92, %rd11, %rd124;
+	shl.b64 	%rd125, %rd109, 1;
+	add.s64 	%rd93, %rd11, %rd125;
+	.loc	1 56 53
+	mov.u16 %rs49, 0x0;
+	@%p94 ld.global.L1::evict_first.b16 { %rs49 }, [ %rd86 + 0 ];
+	@!%p94 mov.u16 %rs49, %rs2;
+	mov.u16 %rs51, 0x0;
+	@%p96 ld.global.L1::evict_first.b16 { %rs51 }, [ %rd87 + 0 ];
+	@!%p96 mov.u16 %rs51, %rs2;
+	mov.u16 %rs53, 0x0;
+	@%p98 ld.global.L1::evict_first.b16 { %rs53 }, [ %rd88 + 0 ];
+	@!%p98 mov.u16 %rs53, %rs2;
+	mov.u16 %rs55, 0x0;
+	@%p100 ld.global.L1::evict_first.b16 { %rs55 }, [ %rd89 + 0 ];
+	@!%p100 mov.u16 %rs55, %rs2;
+	mov.u16 %rs57, 0x0;
+	@%p102 ld.global.L1::evict_first.b16 { %rs57 }, [ %rd90 + 0 ];
+	@!%p102 mov.u16 %rs57, %rs2;
+	mov.u16 %rs59, 0x0;
+	@%p104 ld.global.L1::evict_first.b16 { %rs59 }, [ %rd91 + 0 ];
+	@!%p104 mov.u16 %rs59, %rs2;
+	mov.u16 %rs61, 0x0;
+	@%p106 ld.global.L1::evict_first.b16 { %rs61 }, [ %rd92 + 0 ];
+	@!%p106 mov.u16 %rs61, %rs2;
+	mov.u16 %rs63, 0x0;
+	@%p108 ld.global.L1::evict_first.b16 { %rs63 }, [ %rd93 + 0 ];
+	@!%p108 mov.u16 %rs63, %rs2;
+	.loc	1 56 105
+	cvt.f32.bf16 %r88, %rs49;
+	mov.b32 	%f211, %r88;
+	cvt.f32.bf16 %r89, %rs51;
+	mov.b32 	%f212, %r89;
+	cvt.f32.bf16 %r90, %rs53;
+	mov.b32 	%f213, %r90;
+	cvt.f32.bf16 %r91, %rs55;
+	mov.b32 	%f214, %r91;
+	cvt.f32.bf16 %r92, %rs57;
+	mov.b32 	%f215, %r92;
+	cvt.f32.bf16 %r93, %rs59;
+	mov.b32 	%f216, %r93;
+	cvt.f32.bf16 %r94, %rs61;
+	mov.b32 	%f217, %r94;
+	cvt.f32.bf16 %r95, %rs63;
+	mov.b32 	%f218, %r95;
+	.loc	1 58 24
+	sub.f32 	%f219, %f211, %f17;
+	sub.f32 	%f220, %f212, %f17;
+	sub.f32 	%f221, %f213, %f17;
+	sub.f32 	%f222, %f214, %f17;
+	sub.f32 	%f223, %f215, %f17;
+	sub.f32 	%f224, %f216, %f17;
+	sub.f32 	%f225, %f217, %f17;
+	sub.f32 	%f226, %f218, %f17;
+	.loc	1 60 24
+	sub.f32 	%f227, %f219, %f38;
+	sub.f32 	%f228, %f220, %f38;
+	sub.f32 	%f229, %f221, %f38;
+	sub.f32 	%f230, %f222, %f38;
+	sub.f32 	%f231, %f223, %f38;
+	sub.f32 	%f232, %f224, %f38;
+	sub.f32 	%f233, %f225, %f38;
+	sub.f32 	%f234, %f226, %f38;
+	.loc	1 62 29
+	shl.b64 	%rd126, %rd110, 1;
+	add.s64 	%rd94, %rd28, %rd126;
+	shl.b64 	%rd127, %rd111, 1;
+	add.s64 	%rd95, %rd28, %rd127;
+	shl.b64 	%rd128, %rd112, 1;
+	add.s64 	%rd96, %rd28, %rd128;
+	shl.b64 	%rd129, %rd113, 1;
+	add.s64 	%rd97, %rd28, %rd129;
+	shl.b64 	%rd130, %rd114, 1;
+	add.s64 	%rd98, %rd28, %rd130;
+	shl.b64 	%rd131, %rd115, 1;
+	add.s64 	%rd99, %rd28, %rd131;
+	shl.b64 	%rd132, %rd116, 1;
+	add.s64 	%rd100, %rd28, %rd132;
+	shl.b64 	%rd133, %rd117, 1;
+	add.s64 	%rd101, %rd28, %rd133;
+	.loc	1 62 54
+	mov.b32 	%r96, %f227;
+	cvt.rn.bf16.f32 %rs73, %r96;
+	mov.b32 	%r97, %f228;
+	cvt.rn.bf16.f32 %rs74, %r97;
+	mov.b32 	%r98, %f229;
+	cvt.rn.bf16.f32 %rs75, %r98;
+	mov.b32 	%r99, %f230;
+	cvt.rn.bf16.f32 %rs76, %r99;
+	mov.b32 	%r100, %f231;
+	cvt.rn.bf16.f32 %rs77, %r100;
+	mov.b32 	%r101, %f232;
+	cvt.rn.bf16.f32 %rs78, %r101;
+	mov.b32 	%r102, %f233;
+	cvt.rn.bf16.f32 %rs79, %r102;
+	mov.b32 	%r103, %f234;
+	cvt.rn.bf16.f32 %rs80, %r103;
+	@%p94 st.global.b16 [ %rd94 + 0 ], { %rs73 };
+	@%p96 st.global.b16 [ %rd95 + 0 ], { %rs74 };
+	@%p98 st.global.b16 [ %rd96 + 0 ], { %rs75 };
+	@%p100 st.global.b16 [ %rd97 + 0 ], { %rs76 };
+	@%p102 st.global.b16 [ %rd98 + 0 ], { %rs77 };
+	@%p104 st.global.b16 [ %rd99 + 0 ], { %rs78 };
+	@%p106 st.global.b16 [ %rd100 + 0 ], { %rs79 };
+	@%p108 st.global.b16 [ %rd101 + 0 ], { %rs80 };
+	.loc	1 52 36
+	add.s64 	%rd136, %rd136, 2048;
+	cvt.u32.u64 	%r104, %rd136;
+	add.s32 	%r105, %r104, -2048;
+	setp.lt.u32 	%p118, %r105, 48209;
+	@%p118 bra 	$L__BB0_7;
+	.loc	1 52 4
+	ret;
+$L__tmp44:
+$L__func_end0:
+
+}
+	// .globl	__nv_logf
+.visible .func  (.param .b32 func_retval0) __nv_logf(
+	.param .b32 __nv_logf_param_0
+)
+{
+	.reg .pred 	%p<4>;
+	.reg .b32 	%r<5>;
+	.reg .f32 	%f<36>;
+$L__func_begin1:
+
+	ld.param.f32 	%f5, [__nv_logf_param_0];
+	setp.lt.f32 	%p1, %f5, 0f00800000;
+	mul.f32 	%f6, %f5, 0f4B000000;
+	selp.f32 	%f1, %f6, %f5, %p1;
+	selp.f32 	%f7, 0fC1B80000, 0f00000000, %p1;
+	mov.b32 	%r1, %f1;
+	add.s32 	%r2, %r1, -1059760811;
+	and.b32  	%r3, %r2, -8388608;
+	sub.s32 	%r4, %r1, %r3;
+	mov.b32 	%f8, %r4;
+	cvt.rn.f32.s32 	%f9, %r3;
+	mov.f32 	%f10, 0f34000000;
+	fma.rn.ftz.f32 	%f11, %f9, %f10, %f7;
+	add.f32 	%f12, %f8, 0fBF800000;
+	mov.f32 	%f13, 0f3E1039F6;
+	mov.f32 	%f14, 0fBE055027;
+	fma.rn.ftz.f32 	%f15, %f14, %f12, %f13;
+	mov.f32 	%f16, 0fBDF8CDCC;
+	fma.rn.ftz.f32 	%f17, %f15, %f12, %f16;
+	mov.f32 	%f18, 0f3E0F2955;
+	fma.rn.ftz.f32 	%f19, %f17, %f12, %f18;
+	mov.f32 	%f20, 0fBE2AD8B9;
+	fma.rn.ftz.f32 	%f21, %f19, %f12, %f20;
+	mov.f32 	%f22, 0f3E4CED0B;
+	fma.rn.ftz.f32 	%f23, %f21, %f12, %f22;
+	mov.f32 	%f24, 0fBE7FFF22;
+	fma.rn.ftz.f32 	%f25, %f23, %f12, %f24;
+	mov.f32 	%f26, 0f3EAAAA78;
+	fma.rn.ftz.f32 	%f27, %f25, %f12, %f26;
+	mov.f32 	%f28, 0fBF000000;
+	fma.rn.ftz.f32 	%f29, %f27, %f12, %f28;
+	mul.f32 	%f30, %f12, %f29;
+	fma.rn.ftz.f32 	%f31, %f30, %f12, %f12;
+	mov.f32 	%f32, 0f3F317218;
+	fma.rn.ftz.f32 	%f35, %f11, %f32, %f31;
+	setp.lt.u32 	%p2, %r1, 2139095040;
+	@%p2 bra 	$L__BB1_2;
+	mov.f32 	%f33, 0f7F800000;
+	fma.rn.ftz.f32 	%f35, %f1, %f33, %f33;
+$L__BB1_2:
+	setp.eq.f32 	%p3, %f1, 0f00000000;
+	selp.f32 	%f34, 0fFF800000, %f35, %p3;
+	st.param.f32 	[func_retval0+0], %f34;
+	ret;
+$L__func_end1:
+
+}
+	.file	1 "/tmp/torchinductor_root/gu/cgu6pijtlte2d3yicmpedfh2c7wgxsaexd6ichnxwbwh4deqe6ck.py"
+	.file	2 "/usr/local/lib/python3.10/dist-packages/torch/_inductor/triton_helpers.py"
+	.file	3 "/usr/local/lib/python3.10/dist-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
+.b8 6
+.b8 27
+.b8 8
+.b8 180
+.b8 66
+.b8 12
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+.b8 0
+.b8 2
+.b8 46
+.b8 0
+.b8 135
+.b8 64
+.b8 8
+.b8 3
+.b8 8
+.b8 58
+.b8 11
+.b8 59
+.b8 11
+.b8 63
+.b8 12
+.b8 32
+.b8 11
+.b8 0
+.b8 0
+.b8 3
+.b8 46
+.b8 1
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 64
+.b8 10
+.b8 49
+.b8 19
+.b8 0
+.b8 0
+.b8 4
+.b8 29
+.b8 0
+.b8 49
+.b8 19
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 5
+.b8 29
+.b8 1
+.b8 49
+.b8 19
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 363
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2
+.b8 0
+.b8 99
+.b8 103
+.b8 117
+.b8 54
+.b8 112
+.b8 105
+.b8 106
+.b8 116
+.b8 108
+.b8 116
+.b8 101
+.b8 50
+.b8 100
+.b8 51
+.b8 121
+.b8 105
+.b8 99
+.b8 109
+.b8 112
+.b8 101
+.b8 100
+.b8 102
+.b8 104
+.b8 50
+.b8 99
+.b8 55
+.b8 119
+.b8 103
+.b8 120
+.b8 115
+.b8 97
+.b8 101
+.b8 120
+.b8 100
+.b8 54
+.b8 105
+.b8 99
+.b8 104
+.b8 110
+.b8 120
+.b8 119
+.b8 98
+.b8 119
+.b8 104
+.b8 52
+.b8 100
+.b8 101
+.b8 113
+.b8 101
+.b8 54
+.b8 99
+.b8 107
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 103
+.b8 117
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 101
+.b8 53
+.b8 0
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 101
+.b8 53
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 1
+.b8 3
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b32 125
+.b8 4
+.b32 125
+.b64 $L__tmp1
+.b64 $L__tmp4
+.b8 2
+.b8 34
+.b8 45
+.b8 5
+.b32 125
+.b64 $L__tmp5
+.b64 $L__tmp22
+.b8 2
+.b8 36
+.b8 38
+.b8 4
+.b32 125
+.b64 $L__tmp5
+.b64 $L__tmp22
+.b8 2
+.b8 49
+.b8 29
+.b8 0
+.b8 4
+.b32 125
+.b64 $L__tmp6
+.b64 $L__tmp23
+.b8 2
+.b8 36
+.b8 38
+.b8 4
+.b32 125
+.b64 $L__tmp24
+.b64 $L__tmp43
+.b8 3
+.b8 50
+.b8 27
+.b8 5
+.b32 125
+.b64 $L__tmp25
+.b64 $L__tmp42
+.b8 3
+.b8 50
+.b8 27
+.b8 4
+.b32 125
+.b64 $L__tmp25
+.b64 $L__tmp42
+.b8 3
+.b8 243
+.b8 36
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 367
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 100
+.b8 101
+.b8 53
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 367
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ttgir b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..811cc58c0fc493e024f46233ea5ae69bb801ea99
--- /dev/null
+++ b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ttgir
@@ -0,0 +1,100 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 8], order = [1, 0], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}>
+#blocked1 = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 8], order = [0, 1], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2d3d4de5(%arg0: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg4: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}, %arg5: i64) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<1x2048xbf16, #blocked>
+    %c50257_i64 = arith.constant 50257 : i64
+    %cst_0 = arith.constant dense<true> : tensor<1x2048xi1, #blocked>
+    %c50257_i32 = arith.constant 50257 : i32
+    %c2048_i32 = arith.constant 2048 : i32
+    %c0_i32 = arith.constant 0 : i32
+    %cst_1 = arith.constant dense<50257> : tensor<1x2048xi64, #blocked>
+    %cst_2 = arith.constant dense<0.000000e+00> : tensor<1x2048xf32, #blocked>
+    %cst_3 = arith.constant dense<0xFF800000> : tensor<1x2048xf32, #blocked>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = tt.make_range {end = 2048 : i32, start = 0 : i32} : tensor<2048xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>
+    %3 = tt.expand_dims %2 {axis = 0 : i32} : (tensor<2048xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>) -> tensor<1x2048xi32, #blocked>
+    %4 = arith.extsi %3 : tensor<1x2048xi32, #blocked> to tensor<1x2048xi64, #blocked>
+    %5 = arith.muli %1, %c50257_i64 : i64
+    %6 = tt.splat %5 : (i64) -> tensor<1x2048xi64, #blocked>
+    %7 = tt.splat %arg0 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>, #blocked>
+    %8 = scf.for %arg6 = %c0_i32 to %c50257_i32 step %c2048_i32 iter_args(%arg7 = %cst_3) -> (tensor<1x2048xf32, #blocked>)  : i32 {
+      %26 = arith.extsi %arg6 : i32 to i64
+      %27 = tt.splat %26 : (i64) -> tensor<1x2048xi64, #blocked>
+      %28 = arith.addi %27, %4 : tensor<1x2048xi64, #blocked>
+      %29 = arith.cmpi slt, %28, %cst_1 : tensor<1x2048xi64, #blocked>
+      %30 = arith.addi %28, %6 : tensor<1x2048xi64, #blocked>
+      %31 = tt.addptr %7, %30 : tensor<1x2048x!tt.ptr<bf16, 1>, #blocked>, tensor<1x2048xi64, #blocked>
+      %32 = tt.load %31, %29, %cst {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<1x2048xbf16, #blocked>
+      %33 = arith.extf %32 : tensor<1x2048xbf16, #blocked> to tensor<1x2048xf32, #blocked>
+      %34 = arith.cmpf ogt, %arg7, %33 : tensor<1x2048xf32, #blocked>
+      %35 = arith.cmpf une, %arg7, %arg7 : tensor<1x2048xf32, #blocked>
+      %36 = arith.ori %34, %35 : tensor<1x2048xi1, #blocked>
+      %37 = arith.xori %36, %cst_0 : tensor<1x2048xi1, #blocked>
+      %38 = arith.andi %29, %37 : tensor<1x2048xi1, #blocked>
+      %39 = arith.select %38, %33, %arg7 : tensor<1x2048xi1, #blocked>, tensor<1x2048xf32, #blocked>
+      scf.yield %39 : tensor<1x2048xf32, #blocked>
+    }
+    %9 = "tt.reduce"(%8) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32, %arg7: f32):
+      %26 = arith.cmpf ogt, %arg6, %arg7 : f32
+      %27 = arith.cmpf une, %arg6, %arg6 : f32
+      %28 = arith.ori %26, %27 : i1
+      %29 = arith.select %28, %arg6, %arg7 : f32
+      tt.reduce.return %29 : f32
+    }) : (tensor<1x2048xf32, #blocked>) -> tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %10 = triton_gpu.convert_layout %9 : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked1}>>
+    %11 = tt.expand_dims %10 {axis = 1 : i32} : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked1}>>) -> tensor<1x1xf32, #blocked1>
+    %12 = tt.expand_dims %9 {axis = 1 : i32} : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1x1xf32, #blocked>
+    %13 = tt.addptr %arg1, %1 : !tt.ptr<f32, 1>, i64
+    %14 = tt.splat %13 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>, #blocked1>
+    tt.store %14, %11 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32, #blocked1>
+    %15 = tt.broadcast %12 : (tensor<1x1xf32, #blocked>) -> tensor<1x2048xf32, #blocked>
+    %16 = scf.for %arg6 = %c0_i32 to %c50257_i32 step %c2048_i32 iter_args(%arg7 = %cst_2) -> (tensor<1x2048xf32, #blocked>)  : i32 {
+      %26 = arith.extsi %arg6 : i32 to i64
+      %27 = tt.splat %26 : (i64) -> tensor<1x2048xi64, #blocked>
+      %28 = arith.addi %27, %4 : tensor<1x2048xi64, #blocked>
+      %29 = arith.cmpi slt, %28, %cst_1 : tensor<1x2048xi64, #blocked>
+      %30 = arith.addi %28, %6 : tensor<1x2048xi64, #blocked>
+      %31 = tt.addptr %7, %30 : tensor<1x2048x!tt.ptr<bf16, 1>, #blocked>, tensor<1x2048xi64, #blocked>
+      %32 = tt.load %31, %29, %cst {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<1x2048xbf16, #blocked>
+      %33 = arith.extf %32 : tensor<1x2048xbf16, #blocked> to tensor<1x2048xf32, #blocked>
+      %34 = arith.subf %33, %15 : tensor<1x2048xf32, #blocked>
+      %35 = math.exp %34 : tensor<1x2048xf32, #blocked>
+      %36 = arith.addf %arg7, %35 : tensor<1x2048xf32, #blocked>
+      %37 = arith.select %29, %36, %arg7 : tensor<1x2048xi1, #blocked>, tensor<1x2048xf32, #blocked>
+      scf.yield %37 : tensor<1x2048xf32, #blocked>
+    }
+    %17 = "tt.reduce"(%16) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32, %arg7: f32):
+      %26 = arith.addf %arg6, %arg7 : f32
+      tt.reduce.return %26 : f32
+    }) : (tensor<1x2048xf32, #blocked>) -> tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %18 = triton_gpu.convert_layout %17 : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked1}>>
+    %19 = tt.expand_dims %18 {axis = 1 : i32} : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked1}>>) -> tensor<1x1xf32, #blocked1>
+    %20 = tt.expand_dims %17 {axis = 1 : i32} : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1x1xf32, #blocked>
+    %21 = tt.addptr %arg2, %1 : !tt.ptr<f32, 1>, i64
+    %22 = tt.splat %21 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>, #blocked1>
+    tt.store %22, %19 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32, #blocked1>
+    %23 = math.log %20 : tensor<1x1xf32, #blocked>
+    %24 = tt.broadcast %23 : (tensor<1x1xf32, #blocked>) -> tensor<1x2048xf32, #blocked>
+    %25 = tt.splat %arg3 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>, #blocked>
+    scf.for %arg6 = %c0_i32 to %c50257_i32 step %c2048_i32  : i32 {
+      %26 = arith.extsi %arg6 : i32 to i64
+      %27 = tt.splat %26 : (i64) -> tensor<1x2048xi64, #blocked>
+      %28 = arith.addi %27, %4 : tensor<1x2048xi64, #blocked>
+      %29 = arith.cmpi slt, %28, %cst_1 : tensor<1x2048xi64, #blocked>
+      %30 = arith.addi %28, %6 : tensor<1x2048xi64, #blocked>
+      %31 = tt.addptr %7, %30 : tensor<1x2048x!tt.ptr<bf16, 1>, #blocked>, tensor<1x2048xi64, #blocked>
+      %32 = tt.load %31, %29, %cst {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xbf16, #blocked>
+      %33 = arith.extf %32 : tensor<1x2048xbf16, #blocked> to tensor<1x2048xf32, #blocked>
+      %34 = arith.subf %33, %15 : tensor<1x2048xf32, #blocked>
+      %35 = arith.subf %34, %24 : tensor<1x2048xf32, #blocked>
+      %36 = tt.addptr %25, %30 : tensor<1x2048x!tt.ptr<bf16, 1>, #blocked>, tensor<1x2048xi64, #blocked>
+      %37 = arith.truncf %35 : tensor<1x2048xf32, #blocked> to tensor<1x2048xbf16, #blocked>
+      tt.store %36, %37, %29 {cache = 1 : i32, evict = 1 : i32} : tensor<1x2048xbf16, #blocked>
+    }
+    tt.return
+  }
+}
diff --git a/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ttir b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..e0194b51ec321e20742faed606f2cd49ba0bda8a
--- /dev/null
+++ b/.triton/dump/791dcf81763c6dee467e1d2c436fd6cf/triton_.ttir
@@ -0,0 +1,101 @@
+module {
+  tt.func public @triton__0d1d2d3d4de5(%arg0: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg4: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}, %arg5: i64) attributes {noinline = false} {
+    %cst = arith.constant dense<0.000000e+00> : tensor<1x2048xbf16>
+    %c50257_i64 = arith.constant 50257 : i64
+    %cst_0 = arith.constant dense<true> : tensor<1x2048xi1>
+    %c50257_i32 = arith.constant 50257 : i32
+    %c2048_i32 = arith.constant 2048 : i32
+    %c0_i32 = arith.constant 0 : i32
+    %cst_1 = arith.constant dense<50257> : tensor<1x2048xi64>
+    %cst_2 = arith.constant dense<0.000000e+00> : tensor<1x2048xf32>
+    %cst_3 = arith.constant dense<0xFF800000> : tensor<1x2048xf32>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = tt.make_range {end = 2048 : i32, start = 0 : i32} : tensor<2048xi32>
+    %3 = tt.expand_dims %2 {axis = 0 : i32} : (tensor<2048xi32>) -> tensor<1x2048xi32>
+    %4 = arith.extsi %3 : tensor<1x2048xi32> to tensor<1x2048xi64>
+    %5 = arith.muli %1, %c50257_i64 : i64
+    %6 = tt.splat %5 : (i64) -> tensor<1x2048xi64>
+    %7 = tt.splat %arg0 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>>
+    %8 = scf.for %arg6 = %c0_i32 to %c50257_i32 step %c2048_i32 iter_args(%arg7 = %cst_3) -> (tensor<1x2048xf32>)  : i32 {
+      %29 = arith.extsi %arg6 : i32 to i64
+      %30 = tt.splat %29 : (i64) -> tensor<1x2048xi64>
+      %31 = arith.addi %30, %4 : tensor<1x2048xi64>
+      %32 = arith.cmpi slt, %31, %cst_1 : tensor<1x2048xi64>
+      %33 = arith.addi %31, %6 : tensor<1x2048xi64>
+      %34 = tt.addptr %7, %33 : tensor<1x2048x!tt.ptr<bf16, 1>>, tensor<1x2048xi64>
+      %35 = tt.load %34, %32, %cst {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<1x2048xbf16>
+      %36 = arith.extf %35 : tensor<1x2048xbf16> to tensor<1x2048xf32>
+      %37 = arith.cmpf ogt, %arg7, %36 : tensor<1x2048xf32>
+      %38 = arith.cmpf une, %arg7, %arg7 : tensor<1x2048xf32>
+      %39 = arith.ori %37, %38 : tensor<1x2048xi1>
+      %40 = arith.xori %39, %cst_0 : tensor<1x2048xi1>
+      %41 = arith.andi %32, %40 : tensor<1x2048xi1>
+      %42 = arith.select %41, %36, %arg7 : tensor<1x2048xi1>, tensor<1x2048xf32>
+      scf.yield %42 : tensor<1x2048xf32>
+    }
+    %9 = "tt.reduce"(%8) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32, %arg7: f32):
+      %29 = arith.cmpf ogt, %arg6, %arg7 : f32
+      %30 = arith.cmpf une, %arg6, %arg6 : f32
+      %31 = arith.ori %29, %30 : i1
+      %32 = arith.select %31, %arg6, %arg7 : f32
+      tt.reduce.return %32 : f32
+    }) : (tensor<1x2048xf32>) -> tensor<1xf32>
+    %10 = tt.expand_dims %9 {axis = 1 : i32} : (tensor<1xf32>) -> tensor<1x1xf32>
+    %11 = tt.addptr %arg1, %1 : !tt.ptr<f32, 1>, i64
+    %12 = tt.splat %11 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>>
+    tt.store %12, %10 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32>
+    %13 = arith.muli %1, %c50257_i64 : i64
+    %14 = tt.splat %13 : (i64) -> tensor<1x2048xi64>
+    %15 = tt.splat %arg0 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>>
+    %16 = tt.broadcast %10 : (tensor<1x1xf32>) -> tensor<1x2048xf32>
+    %17 = scf.for %arg6 = %c0_i32 to %c50257_i32 step %c2048_i32 iter_args(%arg7 = %cst_2) -> (tensor<1x2048xf32>)  : i32 {
+      %29 = arith.extsi %arg6 : i32 to i64
+      %30 = tt.splat %29 : (i64) -> tensor<1x2048xi64>
+      %31 = arith.addi %30, %4 : tensor<1x2048xi64>
+      %32 = arith.cmpi slt, %31, %cst_1 : tensor<1x2048xi64>
+      %33 = arith.addi %31, %14 : tensor<1x2048xi64>
+      %34 = tt.addptr %15, %33 : tensor<1x2048x!tt.ptr<bf16, 1>>, tensor<1x2048xi64>
+      %35 = tt.load %34, %32, %cst {cache = 1 : i32, evict = 3 : i32, isVolatile = false} : tensor<1x2048xbf16>
+      %36 = arith.extf %35 : tensor<1x2048xbf16> to tensor<1x2048xf32>
+      %37 = arith.subf %36, %16 : tensor<1x2048xf32>
+      %38 = math.exp %37 : tensor<1x2048xf32>
+      %39 = arith.addf %arg7, %38 : tensor<1x2048xf32>
+      %40 = arith.select %32, %39, %arg7 : tensor<1x2048xi1>, tensor<1x2048xf32>
+      scf.yield %40 : tensor<1x2048xf32>
+    }
+    %18 = "tt.reduce"(%17) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32, %arg7: f32):
+      %29 = arith.addf %arg6, %arg7 : f32
+      tt.reduce.return %29 : f32
+    }) : (tensor<1x2048xf32>) -> tensor<1xf32>
+    %19 = tt.expand_dims %18 {axis = 1 : i32} : (tensor<1xf32>) -> tensor<1x1xf32>
+    %20 = tt.addptr %arg2, %1 : !tt.ptr<f32, 1>, i64
+    %21 = tt.splat %20 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>>
+    tt.store %21, %19 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32>
+    %22 = arith.muli %1, %c50257_i64 : i64
+    %23 = tt.splat %22 : (i64) -> tensor<1x2048xi64>
+    %24 = tt.splat %arg0 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>>
+    %25 = tt.broadcast %10 : (tensor<1x1xf32>) -> tensor<1x2048xf32>
+    %26 = math.log %19 : tensor<1x1xf32>
+    %27 = tt.broadcast %26 : (tensor<1x1xf32>) -> tensor<1x2048xf32>
+    %28 = tt.splat %arg3 : (!tt.ptr<bf16, 1>) -> tensor<1x2048x!tt.ptr<bf16, 1>>
+    scf.for %arg6 = %c0_i32 to %c50257_i32 step %c2048_i32  : i32 {
+      %29 = arith.extsi %arg6 : i32 to i64
+      %30 = tt.splat %29 : (i64) -> tensor<1x2048xi64>
+      %31 = arith.addi %30, %4 : tensor<1x2048xi64>
+      %32 = arith.cmpi slt, %31, %cst_1 : tensor<1x2048xi64>
+      %33 = arith.addi %31, %23 : tensor<1x2048xi64>
+      %34 = tt.addptr %24, %33 : tensor<1x2048x!tt.ptr<bf16, 1>>, tensor<1x2048xi64>
+      %35 = tt.load %34, %32, %cst {cache = 1 : i32, evict = 2 : i32, isVolatile = false} : tensor<1x2048xbf16>
+      %36 = arith.extf %35 : tensor<1x2048xbf16> to tensor<1x2048xf32>
+      %37 = arith.subf %36, %25 : tensor<1x2048xf32>
+      %38 = arith.subf %37, %27 : tensor<1x2048xf32>
+      %39 = tt.addptr %28, %33 : tensor<1x2048x!tt.ptr<bf16, 1>>, tensor<1x2048xi64>
+      %40 = arith.truncf %38 : tensor<1x2048xf32> to tensor<1x2048xbf16>
+      tt.store %39, %40, %32 {cache = 1 : i32, evict = 1 : i32} : tensor<1x2048xbf16>
+    }
+    tt.return
+  }
+}
diff --git a/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.cubin b/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..b91ae13d9bf2a41d6fc0796cd61661493c5a5253
Binary files /dev/null and b/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.cubin differ
diff --git a/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.llir b/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..35bc62629013f49b8568db09cb6d917502258557
--- /dev/null
+++ b/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.llir
@@ -0,0 +1,85 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+define void @triton__0d1d2de(ptr addrspace(1) %0, ptr addrspace(1) %1, i32 %2) local_unnamed_addr !dbg !5 {
+  %4 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !8
+  %5 = shl i32 %4, 3, !dbg !8
+  %6 = and i32 %5, 1016, !dbg !8
+  %7 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #1, !dbg !9
+  %8 = shl i32 %7, 10, !dbg !10
+  %9 = or i32 %8, %6, !dbg !11
+  %10 = or i32 %9, 4, !dbg !11
+  %11 = sext i32 %9 to i64, !dbg !12
+  %12 = getelementptr float, ptr addrspace(1) %0, i64 %11, !dbg !12
+  %13 = sext i32 %10 to i64, !dbg !12
+  %14 = getelementptr float, ptr addrspace(1) %0, i64 %13, !dbg !12
+  %15 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, 0x0;\0A\09mov.u32 $1, 0x0;\0A\09mov.u32 $2, 0x0;\0A\09mov.u32 $3, 0x0;\0A\09@$5 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $4 + 0 ];", "=r,=r,=r,=r,l,b"(ptr addrspace(1) %12, i1 true) #1, !dbg !13
+  %16 = extractvalue { i32, i32, i32, i32 } %15, 0, !dbg !13
+  %17 = extractvalue { i32, i32, i32, i32 } %15, 1, !dbg !13
+  %18 = extractvalue { i32, i32, i32, i32 } %15, 2, !dbg !13
+  %19 = extractvalue { i32, i32, i32, i32 } %15, 3, !dbg !13
+  %20 = bitcast i32 %16 to float, !dbg !13
+  %21 = bitcast i32 %17 to float, !dbg !13
+  %22 = bitcast i32 %18 to float, !dbg !13
+  %23 = bitcast i32 %19 to float, !dbg !13
+  %24 = tail call { i32, i32, i32, i32 } asm sideeffect "mov.u32 $0, 0x0;\0A\09mov.u32 $1, 0x0;\0A\09mov.u32 $2, 0x0;\0A\09mov.u32 $3, 0x0;\0A\09@$5 ld.global.v4.b32 { $0, $1, $2, $3 }, [ $4 + 0 ];", "=r,=r,=r,=r,l,b"(ptr addrspace(1) %14, i1 true) #1, !dbg !13
+  %25 = extractvalue { i32, i32, i32, i32 } %24, 0, !dbg !13
+  %26 = extractvalue { i32, i32, i32, i32 } %24, 1, !dbg !13
+  %27 = extractvalue { i32, i32, i32, i32 } %24, 2, !dbg !13
+  %28 = extractvalue { i32, i32, i32, i32 } %24, 3, !dbg !13
+  %29 = bitcast i32 %25 to float, !dbg !13
+  %30 = bitcast i32 %26 to float, !dbg !13
+  %31 = bitcast i32 %27 to float, !dbg !13
+  %32 = bitcast i32 %28 to float, !dbg !13
+  %33 = getelementptr i16, ptr addrspace(1) %1, i64 %11, !dbg !14
+  %34 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %20) #1, !dbg !15
+  %35 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %21) #1, !dbg !15
+  %36 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %22) #1, !dbg !15
+  %37 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %23) #1, !dbg !15
+  %38 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %29) #1, !dbg !15
+  %39 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %30) #1, !dbg !15
+  %40 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %31) #1, !dbg !15
+  %41 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %32) #1, !dbg !15
+  %42 = insertelement <2 x i16> undef, i16 %34, i64 0, !dbg !15
+  %43 = insertelement <2 x i16> %42, i16 %35, i64 1, !dbg !15
+  %44 = bitcast <2 x i16> %43 to i32, !dbg !15
+  %45 = insertelement <2 x i16> undef, i16 %36, i64 0, !dbg !15
+  %46 = insertelement <2 x i16> %45, i16 %37, i64 1, !dbg !15
+  %47 = bitcast <2 x i16> %46 to i32, !dbg !15
+  %48 = insertelement <2 x i16> undef, i16 %38, i64 0, !dbg !15
+  %49 = insertelement <2 x i16> %48, i16 %39, i64 1, !dbg !15
+  %50 = bitcast <2 x i16> %49 to i32, !dbg !15
+  %51 = insertelement <2 x i16> undef, i16 %40, i64 0, !dbg !15
+  %52 = insertelement <2 x i16> %51, i16 %41, i64 1, !dbg !15
+  %53 = bitcast <2 x i16> %52 to i32, !dbg !15
+  tail call void asm sideeffect "@$5 st.global.v4.b32 [ $4 + 0 ], { $0, $1, $2, $3 };", "r,r,r,r,l,b"(i32 %44, i32 %47, i32 %50, i32 %53, ptr addrspace(1) %33, i1 true) #1, !dbg !15
+  ret void, !dbg !16
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+!nvvm.annotations = !{!3, !4, !4, !3}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_C, file: !2, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!2 = !DIFile(filename: "cch6kzmgbnoxqjgy3okxqs7sy2uz27atdhc4lkuwz5ajinexdurx.py", directory: "/tmp/torchinductor_root/ch")
+!3 = !{ptr @triton__0d1d2de, !"kernel", i32 1}
+!4 = !{ptr @triton__0d1d2de, !"maxntidx", i32 128}
+!5 = distinct !DISubprogram(name: "triton__0d1d2de", linkageName: "triton__0d1d2de", scope: !2, file: !2, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !1)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 21, column: 36, scope: !5)
+!9 = !DILocation(line: 20, column: 28, scope: !5)
+!10 = !DILocation(line: 20, column: 33, scope: !5)
+!11 = !DILocation(line: 21, column: 23, scope: !5)
+!12 = !DILocation(line: 24, column: 30, scope: !5)
+!13 = !DILocation(line: 24, column: 35, scope: !5)
+!14 = !DILocation(line: 26, column: 25, scope: !5)
+!15 = !DILocation(line: 26, column: 36, scope: !5)
+!16 = !DILocation(line: 26, column: 4, scope: !5)
diff --git a/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.ptx b/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..400c4c10458e6c980475e4967dce201d4a6ec389
--- /dev/null
+++ b/.triton/dump/93ab21d512b10f4271e68c2f0ae3393c/triton_.ptx
@@ -0,0 +1,312 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2de
+
+.visible .entry triton__0d1d2de(
+	.param .u64 triton__0d1d2de_param_0,
+	.param .u64 triton__0d1d2de_param_1,
+	.param .u32 triton__0d1d2de_param_2
+)
+.maxntid 128, 1, 1
+{
+	.reg .pred 	%p<4>;
+	.reg .b16 	%rs<9>;
+	.reg .b32 	%r<31>;
+	.reg .b64 	%rd<8>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd4, [triton__0d1d2de_param_0];
+	ld.param.u64 	%rd5, [triton__0d1d2de_param_1];
+$L__tmp0:
+	.loc	1 21 36
+	mov.u32 	%r22, %tid.x;
+	shl.b32 	%r23, %r22, 3;
+	and.b32  	%r24, %r23, 1016;
+	.loc	1 20 28
+	mov.u32 %r1, %ctaid.x;
+	.loc	1 20 33
+	shl.b32 	%r25, %r1, 10;
+	.loc	1 21 23
+	or.b32  	%r26, %r25, %r24;
+	.loc	1 24 30
+	mul.wide.s32 	%rd6, %r26, 4;
+	add.s64 	%rd1, %rd4, %rd6;
+	add.s64 	%rd2, %rd1, 16;
+	mov.pred 	%p1, -1;
+	.loc	1 24 35
+	mov.u32 %r10, 0x0;
+	mov.u32 %r11, 0x0;
+	mov.u32 %r12, 0x0;
+	mov.u32 %r13, 0x0;
+	@%p1 ld.global.v4.b32 { %r10, %r11, %r12, %r13 }, [ %rd1 + 0 ];
+	mov.u32 %r14, 0x0;
+	mov.u32 %r15, 0x0;
+	mov.u32 %r16, 0x0;
+	mov.u32 %r17, 0x0;
+	@%p1 ld.global.v4.b32 { %r14, %r15, %r16, %r17 }, [ %rd2 + 0 ];
+	.loc	1 26 25
+	mul.wide.s32 	%rd7, %r26, 2;
+	add.s64 	%rd3, %rd5, %rd7;
+	.loc	1 26 36
+	cvt.rn.bf16.f32 %rs1, %r10;
+	cvt.rn.bf16.f32 %rs2, %r11;
+	cvt.rn.bf16.f32 %rs3, %r12;
+	cvt.rn.bf16.f32 %rs4, %r13;
+	cvt.rn.bf16.f32 %rs5, %r14;
+	cvt.rn.bf16.f32 %rs6, %r15;
+	cvt.rn.bf16.f32 %rs7, %r16;
+	cvt.rn.bf16.f32 %rs8, %r17;
+	mov.b32 	%r27, {%rs1, %rs2};
+	mov.b32 	%r28, {%rs3, %rs4};
+	mov.b32 	%r29, {%rs5, %rs6};
+	mov.b32 	%r30, {%rs7, %rs8};
+	@%p1 st.global.v4.b32 [ %rd3 + 0 ], { %r27, %r28, %r29, %r30 };
+	.loc	1 26 4
+	ret;
+$L__tmp1:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/ch/cch6kzmgbnoxqjgy3okxqs7sy2uz27atdhc4lkuwz5ajinexdurx.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
+.b8 6
+.b8 27
+.b8 8
+.b8 180
+.b8 66
+.b8 12
+.b8 17
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+.b8 18
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+.b8 0
+.b8 2
+.b8 46
+.b8 0
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 64
+.b8 10
+.b8 135
+.b8 64
+.b8 8
+.b8 3
+.b8 8
+.b8 58
+.b8 11
+.b8 59
+.b8 11
+.b8 63
+.b8 12
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 176
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
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+.b8 110
+.b8 0
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+.b8 101
+.b8 120
+.b8 100
+.b8 117
+.b8 114
+.b8 120
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 99
+.b8 104
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.cubin b/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..45b05508f433a1984d7285f23553ec540f3f9e2f
Binary files /dev/null and b/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.cubin differ
diff --git a/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.ptx b/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..35b241a73a3ecb5f1d7c0b2a94800b324d920c46
--- /dev/null
+++ b/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.ptx
@@ -0,0 +1,295 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2de
+
+.visible .entry triton__0d1d2de(
+	.param .u64 triton__0d1d2de_param_0,
+	.param .u64 triton__0d1d2de_param_1,
+	.param .u32 triton__0d1d2de_param_2
+)
+.maxntid 256, 1, 1
+{
+	.reg .pred 	%p<3>;
+	.reg .b16 	%rs<3>;
+	.reg .b32 	%r<13>;
+	.reg .b64 	%rd<7>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd3, [triton__0d1d2de_param_0];
+	ld.param.u64 	%rd4, [triton__0d1d2de_param_1];
+$L__tmp0:
+	.loc	1 21 36
+	mov.u32 	%r7, %tid.x;
+	shl.b32 	%r8, %r7, 1;
+	and.b32  	%r9, %r8, 510;
+	.loc	1 20 28
+	mov.u32 %r1, %ctaid.x;
+	.loc	1 20 33
+	shl.b32 	%r10, %r1, 9;
+	.loc	1 21 23
+	or.b32  	%r11, %r10, %r9;
+	.loc	1 24 30
+	mul.wide.s32 	%rd5, %r11, 4;
+	add.s64 	%rd1, %rd3, %rd5;
+	mov.pred 	%p1, -1;
+	.loc	1 24 35
+	mov.u32 %r4, 0x0;
+	mov.u32 %r5, 0x0;
+	@%p1 ld.global.v2.b32 { %r4, %r5 }, [ %rd1 + 0 ];
+	.loc	1 26 25
+	mul.wide.s32 	%rd6, %r11, 2;
+	add.s64 	%rd2, %rd4, %rd6;
+	.loc	1 26 36
+	cvt.rn.bf16.f32 %rs1, %r4;
+	cvt.rn.bf16.f32 %rs2, %r5;
+	mov.b32 	%r12, {%rs1, %rs2};
+	@%p1 st.global.b32 [ %rd2 + 0 ], { %r12 };
+	.loc	1 26 4
+	ret;
+$L__tmp1:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/5t/c5tryp5qwkhreijk7s5x327wofz54lwj4kvctuqdzv2vrf2xyons.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
+.b8 6
+.b8 27
+.b8 8
+.b8 180
+.b8 66
+.b8 12
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+.b8 18
+.b8 1
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+.b8 2
+.b8 46
+.b8 0
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 64
+.b8 10
+.b8 135
+.b8 64
+.b8 8
+.b8 3
+.b8 8
+.b8 58
+.b8 11
+.b8 59
+.b8 11
+.b8 63
+.b8 12
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 176
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
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+.b8 51
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+.b8 55
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+.b8 99
+.b8 116
+.b8 117
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+.b8 118
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+.b8 50
+.b8 120
+.b8 121
+.b8 111
+.b8 110
+.b8 115
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 105
+.b8 110
+.b8 100
+.b8 117
+.b8 99
+.b8 116
+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 53
+.b8 116
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 101
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 180
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.ttir b/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..de8871dcaba54cb7d1b997f9009d0eeab54d091f
--- /dev/null
+++ b/.triton/dump/9a2fb05196b13393bea452d08e9aaca8/triton_.ttir
@@ -0,0 +1,18 @@
+module {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: i32 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %c512_i32 = arith.constant 512 : i32
+    %0 = tt.get_program_id x : i32
+    %1 = arith.muli %0, %c512_i32 : i32
+    %2 = tt.make_range {end = 512 : i32, start = 0 : i32} : tensor<512xi32>
+    %3 = tt.splat %1 : (i32) -> tensor<512xi32>
+    %4 = arith.addi %3, %2 : tensor<512xi32>
+    %5 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<512x!tt.ptr<f32, 1>>
+    %6 = tt.addptr %5, %4 : tensor<512x!tt.ptr<f32, 1>>, tensor<512xi32>
+    %7 = tt.load %6 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<512xf32>
+    %8 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<512x!tt.ptr<bf16, 1>>
+    %9 = tt.addptr %8, %4 : tensor<512x!tt.ptr<bf16, 1>>, tensor<512xi32>
+    %10 = arith.truncf %7 : tensor<512xf32> to tensor<512xbf16>
+    tt.store %9, %10 {cache = 1 : i32, evict = 1 : i32} : tensor<512xbf16>
+    tt.return
+  }
+}
diff --git a/.triton/dump/a37de85bdb85634924fdf498b7d8602b/triton_.cubin b/.triton/dump/a37de85bdb85634924fdf498b7d8602b/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..735457ab63ed26a8f0839a143ffe77bae827286e
Binary files /dev/null and b/.triton/dump/a37de85bdb85634924fdf498b7d8602b/triton_.cubin differ
diff --git a/.triton/dump/a75e14a8d2d1ec8471f1c7b615552f8c/triton_.llir b/.triton/dump/a75e14a8d2d1ec8471f1c7b615552f8c/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..630b9a31708f7bd34a18d9faf8c7cb919f83612b
--- /dev/null
+++ b/.triton/dump/a75e14a8d2d1ec8471f1c7b615552f8c/triton_.llir
@@ -0,0 +1,54 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+define void @triton__0d1d2de(ptr addrspace(1) %0, ptr addrspace(1) %1, i32 %2) local_unnamed_addr !dbg !5 {
+  %4 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !8
+  %5 = shl i32 %4, 1, !dbg !8
+  %6 = and i32 %5, 254, !dbg !8
+  %7 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #1, !dbg !9
+  %8 = shl i32 %7, 8, !dbg !10
+  %9 = or i32 %8, %6, !dbg !11
+  %10 = sext i32 %9 to i64, !dbg !12
+  %11 = getelementptr float, ptr addrspace(1) %0, i64 %10, !dbg !12
+  %12 = tail call { i32, i32 } asm sideeffect "mov.u32 $0, 0x0;\0A\09mov.u32 $1, 0x0;\0A\09@$3 ld.global.v2.b32 { $0, $1 }, [ $2 + 0 ];", "=r,=r,l,b"(ptr addrspace(1) %11, i1 true) #1, !dbg !13
+  %13 = extractvalue { i32, i32 } %12, 0, !dbg !13
+  %14 = extractvalue { i32, i32 } %12, 1, !dbg !13
+  %15 = bitcast i32 %13 to float, !dbg !13
+  %16 = bitcast i32 %14 to float, !dbg !13
+  %17 = getelementptr i16, ptr addrspace(1) %1, i64 %10, !dbg !14
+  %18 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %15) #1, !dbg !15
+  %19 = tail call i16 asm "cvt.rn.bf16.f32 $0, $1;", "=h,r"(float %16) #1, !dbg !15
+  %20 = insertelement <2 x i16> undef, i16 %18, i64 0, !dbg !15
+  %21 = insertelement <2 x i16> %20, i16 %19, i64 1, !dbg !15
+  %22 = bitcast <2 x i16> %21 to i32, !dbg !15
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 %22, ptr addrspace(1) %17, i1 true) #1, !dbg !15
+  ret void, !dbg !16
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { nounwind }
+
+!llvm.module.flags = !{!0}
+!llvm.dbg.cu = !{!1}
+!nvvm.annotations = !{!3, !4, !4, !3}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = distinct !DICompileUnit(language: DW_LANG_C, file: !2, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!2 = !DIFile(filename: "cpqhcwm5bfrhuwddh4c4qks6bh7sovfbpfnmqhnm4h4w23icqnu6.py", directory: "/tmp/torchinductor_root/pq")
+!3 = !{ptr @triton__0d1d2de, !"kernel", i32 1}
+!4 = !{ptr @triton__0d1d2de, !"maxntidx", i32 128}
+!5 = distinct !DISubprogram(name: "triton__0d1d2de", linkageName: "triton__0d1d2de", scope: !2, file: !2, line: 18, type: !6, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !1)
+!6 = !DISubroutineType(cc: DW_CC_normal, types: !7)
+!7 = !{}
+!8 = !DILocation(line: 21, column: 36, scope: !5)
+!9 = !DILocation(line: 20, column: 28, scope: !5)
+!10 = !DILocation(line: 20, column: 33, scope: !5)
+!11 = !DILocation(line: 21, column: 23, scope: !5)
+!12 = !DILocation(line: 24, column: 30, scope: !5)
+!13 = !DILocation(line: 24, column: 35, scope: !5)
+!14 = !DILocation(line: 26, column: 25, scope: !5)
+!15 = !DILocation(line: 26, column: 36, scope: !5)
+!16 = !DILocation(line: 26, column: 4, scope: !5)
diff --git a/.triton/dump/a75e14a8d2d1ec8471f1c7b615552f8c/triton_.ttgir b/.triton/dump/a75e14a8d2d1ec8471f1c7b615552f8c/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..41255a1d4607e81c68d7f71c779ee33d5530e57b
--- /dev/null
+++ b/.triton/dump/a75e14a8d2d1ec8471f1c7b615552f8c/triton_.ttgir
@@ -0,0 +1,19 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [2], threadsPerWarp = [32], warpsPerCTA = [4], order = [0], CTAsPerCGA = [1], CTASplitNum = [1], CTAOrder = [0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 4 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<bf16, 1> {tt.divisibility = 16 : i32}, %arg2: i32 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %c256_i32 = arith.constant 256 : i32
+    %0 = tt.get_program_id x : i32
+    %1 = arith.muli %0, %c256_i32 : i32
+    %2 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32, #blocked>
+    %3 = tt.splat %1 : (i32) -> tensor<256xi32, #blocked>
+    %4 = arith.addi %3, %2 : tensor<256xi32, #blocked>
+    %5 = tt.splat %arg0 : (!tt.ptr<f32, 1>) -> tensor<256x!tt.ptr<f32, 1>, #blocked>
+    %6 = tt.addptr %5, %4 : tensor<256x!tt.ptr<f32, 1>, #blocked>, tensor<256xi32, #blocked>
+    %7 = tt.load %6 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<256xf32, #blocked>
+    %8 = tt.splat %arg1 : (!tt.ptr<bf16, 1>) -> tensor<256x!tt.ptr<bf16, 1>, #blocked>
+    %9 = tt.addptr %8, %4 : tensor<256x!tt.ptr<bf16, 1>, #blocked>, tensor<256xi32, #blocked>
+    %10 = arith.truncf %7 : tensor<256xf32, #blocked> to tensor<256xbf16, #blocked>
+    tt.store %9, %10 {cache = 1 : i32, evict = 1 : i32} : tensor<256xbf16, #blocked>
+    tt.return
+  }
+}
diff --git a/.triton/dump/e4b4750326af484a12cc939125bd831c/triton_.ptx b/.triton/dump/e4b4750326af484a12cc939125bd831c/triton_.ptx
new file mode 100644
index 0000000000000000000000000000000000000000..2bad951e209d3ce1179ee6ba331cc4608a868807
--- /dev/null
+++ b/.triton/dump/e4b4750326af484a12cc939125bd831c/triton_.ptx
@@ -0,0 +1,475 @@
+//
+// Generated by LLVM NVPTX Back-End
+//
+
+.version 8.2
+.target sm_89
+.address_size 64
+
+	// .globl	triton__0d1d2d3d45e
+
+.visible .entry triton__0d1d2d3d45e(
+	.param .u64 triton__0d1d2d3d45e_param_0,
+	.param .u64 triton__0d1d2d3d45e_param_1,
+	.param .u64 triton__0d1d2d3d45e_param_2,
+	.param .u64 triton__0d1d2d3d45e_param_3,
+	.param .u32 triton__0d1d2d3d45e_param_4,
+	.param .u32 triton__0d1d2d3d45e_param_5
+)
+.maxntid 64, 1, 1
+{
+	.reg .pred 	%p<7>;
+	.reg .b32 	%r<28>;
+	.reg .f32 	%f<9>;
+	.reg .b64 	%rd<25>;
+	.loc	1 18 0
+$L__func_begin0:
+	.loc	1 18 0
+
+	ld.param.u64 	%rd5, [triton__0d1d2d3d45e_param_0];
+	ld.param.u64 	%rd6, [triton__0d1d2d3d45e_param_1];
+$L__tmp0:
+	.loc	1 25 34
+	mov.u32 	%r8, %tid.x;
+	and.b32  	%r9, %r8, 7;
+	ld.param.u64 	%rd7, [triton__0d1d2d3d45e_param_2];
+	ld.param.u64 	%rd4, [triton__0d1d2d3d45e_param_3];
+	.loc	1 28 30
+	mul.wide.u32 	%rd8, %r9, 4;
+	add.s64 	%rd1, %rd6, %rd8;
+	mov.b32 	%r2, 0;
+	mov.pred 	%p1, -1;
+	.loc	1 28 35
+	mov.u32 %r1, 0x0;
+	@%p1 ld.global.b32 { %r1 }, [ %rd1 + 0 ];
+	@!%p1 mov.u32 %r1, %r2;
+	mov.b32 	%f1, %r1;
+	.loc	1 29 30
+	mul.wide.u32 	%rd9, %r9, 8;
+	add.s64 	%rd3, %rd7, %rd9;
+	.loc	1 29 35
+	mov.u64 %rd2, 0x0;
+	@%p1 ld.global.b64 { %rd2 }, [ %rd3 + 0 ];
+	@!%p1 mov.u64 %rd2, 0x0;
+$L__tmp1:
+	.loc	2 243 36
+	shfl.sync.bfly.b32	%r10, %r1, 4, 31, -1;
+	mov.b32 	%f2, %r10;
+$L__tmp2:
+	.loc	2 233 15
+	add.f32 	%f3, %f1, %f2;
+$L__tmp3:
+	.loc	2 243 36
+	mov.b32 	%r11, %f3;
+	shfl.sync.bfly.b32	%r12, %r11, 2, 31, -1;
+	mov.b32 	%f4, %r12;
+$L__tmp4:
+	.loc	2 233 15
+	add.f32 	%f5, %f3, %f4;
+$L__tmp5:
+	.loc	2 243 36
+	mov.b32 	%r13, %f5;
+	shfl.sync.bfly.b32	%r14, %r13, 1, 31, -1;
+	mov.b32 	%f6, %r14;
+$L__tmp6:
+	.loc	2 233 15
+	add.f32 	%f7, %f5, %f6;
+$L__tmp7:
+	.loc	2 243 36
+	cvt.u32.u64 	%r15, %rd2;
+	shfl.sync.bfly.b32	%r16, %r15, 4, 31, -1;
+	{ .reg .b32 tmp; mov.b64 {tmp, %r17}, %rd2; }
+	shfl.sync.bfly.b32	%r18, %r17, 4, 31, -1;
+	cvt.u64.u32 	%rd10, %r16;
+	cvt.u64.u32 	%rd11, %r18;
+	shl.b64 	%rd12, %rd11, 32;
+	or.b64  	%rd13, %rd10, %rd12;
+$L__tmp8:
+	.loc	2 233 15
+	add.s64 	%rd14, %rd2, %rd13;
+$L__tmp9:
+	.loc	2 243 36
+	cvt.u32.u64 	%r19, %rd14;
+	shfl.sync.bfly.b32	%r20, %r19, 2, 31, -1;
+	{ .reg .b32 tmp; mov.b64 {tmp, %r21}, %rd14; }
+	shfl.sync.bfly.b32	%r22, %r21, 2, 31, -1;
+	cvt.u64.u32 	%rd15, %r20;
+	cvt.u64.u32 	%rd16, %r22;
+	shl.b64 	%rd17, %rd16, 32;
+	or.b64  	%rd18, %rd15, %rd17;
+$L__tmp10:
+	.loc	2 233 15
+	add.s64 	%rd19, %rd14, %rd18;
+$L__tmp11:
+	.loc	2 243 36
+	cvt.u32.u64 	%r23, %rd19;
+	shfl.sync.bfly.b32	%r24, %r23, 1, 31, -1;
+	{ .reg .b32 tmp; mov.b64 {tmp, %r25}, %rd19; }
+	shfl.sync.bfly.b32	%r26, %r25, 1, 31, -1;
+	cvt.u64.u32 	%rd20, %r24;
+	cvt.u64.u32 	%rd21, %r26;
+	shl.b64 	%rd22, %rd21, 32;
+	or.b64  	%rd23, %rd20, %rd22;
+$L__tmp12:
+	.loc	2 233 15
+	add.s64 	%rd24, %rd19, %rd23;
+$L__tmp13:
+	.loc	1 36 20
+	cvt.rn.f32.s64 	%f8, %rd24;
+	.loc	1 37 19
+	mov.b32 	%r4, %f7;
+	mov.b32 	%r5, %f8;
+	div.full.f32 %r7, %r4, %r5;
+	.loc	1 38 68
+	and.b32  	%r27, %r8, 63;
+	setp.eq.s32 	%p5, %r27, 0;
+	@%p5 st.global.b32 [ %rd4 + 0 ], { %r5 };
+	.loc	1 39 4
+	bar.sync 	0;
+	.loc	1 40 71
+	@%p5 st.global.b32 [ %rd5 + 0 ], { %r7 };
+	.loc	1 40 4
+	ret;
+$L__tmp14:
+$L__func_end0:
+
+}
+	.file	1 "/tmp/torchinductor_root/4p/c4pjg247azzp2aq7obfyfqmnzxmijq72eajmsphnpe2f5hawqzuf.py"
+	.file	2 "/usr/local/lib/python3.10/dist-packages/triton/language/standard.py"
+	.section	.debug_abbrev
+	{
+.b8 1
+.b8 17
+.b8 1
+.b8 37
+.b8 8
+.b8 19
+.b8 5
+.b8 3
+.b8 8
+.b8 16
+.b8 6
+.b8 27
+.b8 8
+.b8 180
+.b8 66
+.b8 12
+.b8 17
+.b8 1
+.b8 18
+.b8 1
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+.b8 0
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+.b8 46
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+.b8 135
+.b8 64
+.b8 8
+.b8 3
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+.b8 58
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+.b8 10
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+.b8 0
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+.b8 4
+.b8 29
+.b8 0
+.b8 49
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+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 5
+.b8 29
+.b8 1
+.b8 49
+.b8 19
+.b8 17
+.b8 1
+.b8 18
+.b8 1
+.b8 88
+.b8 11
+.b8 89
+.b8 11
+.b8 87
+.b8 11
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_info
+	{
+.b32 337
+.b8 2
+.b8 0
+.b32 .debug_abbrev
+.b8 8
+.b8 1
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 0
+.b8 2
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+.b8 97
+.b8 119
+.b8 113
+.b8 122
+.b8 117
+.b8 102
+.b8 46
+.b8 112
+.b8 121
+.b8 0
+.b32 .debug_line
+.b8 47
+.b8 116
+.b8 109
+.b8 112
+.b8 47
+.b8 116
+.b8 111
+.b8 114
+.b8 99
+.b8 104
+.b8 105
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+.b8 111
+.b8 114
+.b8 95
+.b8 114
+.b8 111
+.b8 111
+.b8 116
+.b8 47
+.b8 52
+.b8 112
+.b8 0
+.b8 1
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 2
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
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+.b8 100
+.b8 52
+.b8 53
+.b8 101
+.b8 0
+.b8 1
+.b8 18
+.b8 1
+.b8 1
+.b8 3
+.b64 $L__func_begin0
+.b64 $L__func_end0
+.b8 1
+.b8 156
+.b32 125
+.b8 4
+.b32 125
+.b64 $L__tmp1
+.b64 $L__tmp6
+.b8 2
+.b8 32
+.b8 24
+.b8 5
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp7
+.b8 2
+.b8 32
+.b8 24
+.b8 4
+.b32 125
+.b64 $L__tmp2
+.b64 $L__tmp7
+.b8 2
+.b8 243
+.b8 36
+.b8 0
+.b8 4
+.b32 125
+.b64 $L__tmp7
+.b64 $L__tmp12
+.b8 2
+.b8 35
+.b8 24
+.b8 5
+.b32 125
+.b64 $L__tmp8
+.b64 $L__tmp13
+.b8 2
+.b8 35
+.b8 24
+.b8 4
+.b32 125
+.b64 $L__tmp8
+.b64 $L__tmp13
+.b8 2
+.b8 243
+.b8 36
+.b8 0
+.b8 0
+.b8 0
+	}
+	.section	.debug_pubnames
+	{
+.b32 $L__pubNames_end0-$L__pubNames_start0
+$L__pubNames_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 341
+.b32 125
+.b8 116
+.b8 114
+.b8 105
+.b8 116
+.b8 111
+.b8 110
+.b8 95
+.b8 95
+.b8 48
+.b8 100
+.b8 49
+.b8 100
+.b8 50
+.b8 100
+.b8 51
+.b8 100
+.b8 52
+.b8 53
+.b8 101
+.b8 0
+.b32 0
+$L__pubNames_end0:
+	}
+	.section	.debug_pubtypes
+	{
+.b32 $L__pubTypes_end0-$L__pubTypes_start0
+$L__pubTypes_start0:
+.b8 2
+.b8 0
+.b32 .debug_info
+.b32 341
+.b32 0
+$L__pubTypes_end0:
+	}
+	.section	.debug_loc	{	}
diff --git a/.triton/dump/e4b4750326af484a12cc939125bd831c/triton_.ttgir b/.triton/dump/e4b4750326af484a12cc939125bd831c/triton_.ttgir
new file mode 100644
index 0000000000000000000000000000000000000000..ee16c81cf3216c0c71bcf17e6bf530dcde517fd9
--- /dev/null
+++ b/.triton/dump/e4b4750326af484a12cc939125bd831c/triton_.ttgir
@@ -0,0 +1,42 @@
+#blocked = #triton_gpu.blocked<{sizePerThread = [1, 1], threadsPerWarp = [1, 32], warpsPerCTA = [1, 2], order = [0, 1], CTAsPerCGA = [1, 1], CTASplitNum = [1, 1], CTAOrder = [1, 0]}>
+module attributes {"triton_gpu.compute-capability" = 89 : i32, "triton_gpu.num-ctas" = 1 : i32, "triton_gpu.num-warps" = 2 : i32, "triton_gpu.threads-per-warp" = 32 : i32} {
+  tt.func public @triton__0d1d2d3d45e(%arg0: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg2: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg3: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg4: i32, %arg5: i32 {tt.max_divisibility = 8 : i32}) attributes {noinline = false} {
+    %cst = arith.constant dense<0> : tensor<1x8xi64, #blocked>
+    %cst_0 = arith.constant dense<0.000000e+00> : tensor<1x8xf32, #blocked>
+    %cst_1 = arith.constant dense<8> : tensor<1x8xi32, #blocked>
+    %c0_i32 = arith.constant 0 : i32
+    %0 = tt.make_range {end = 8 : i32, start = 0 : i32} : tensor<8xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>
+    %1 = tt.expand_dims %0 {axis = 0 : i32} : (tensor<8xi32, #triton_gpu.slice<{dim = 0, parent = #blocked}>>) -> tensor<1x8xi32, #blocked>
+    %2 = arith.cmpi slt, %1, %cst_1 : tensor<1x8xi32, #blocked>
+    %3 = tt.splat %arg1 : (!tt.ptr<f32, 1>) -> tensor<1x8x!tt.ptr<f32, 1>, #blocked>
+    %4 = tt.addptr %3, %1 : tensor<1x8x!tt.ptr<f32, 1>, #blocked>, tensor<1x8xi32, #blocked>
+    %5 = tt.load %4, %2, %cst_0 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<1x8xf32, #blocked>
+    %6 = tt.splat %arg2 : (!tt.ptr<i64, 1>) -> tensor<1x8x!tt.ptr<i64, 1>, #blocked>
+    %7 = tt.addptr %6, %1 : tensor<1x8x!tt.ptr<i64, 1>, #blocked>, tensor<1x8xi32, #blocked>
+    %8 = tt.load %7, %2, %cst {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<1x8xi64, #blocked>
+    %9 = arith.select %2, %5, %cst_0 : tensor<1x8xi1, #blocked>, tensor<1x8xf32, #blocked>
+    %10 = "tt.reduce"(%9) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: f32, %arg7: f32):
+      %21 = arith.addf %arg6, %arg7 : f32
+      tt.reduce.return %21 : f32
+    }) : (tensor<1x8xf32, #blocked>) -> tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %11 = tt.expand_dims %10 {axis = 1 : i32} : (tensor<1xf32, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1x1xf32, #blocked>
+    %12 = arith.select %2, %8, %cst : tensor<1x8xi1, #blocked>, tensor<1x8xi64, #blocked>
+    %13 = "tt.reduce"(%12) <{axis = 1 : i32}> ({
+    ^bb0(%arg6: i64, %arg7: i64):
+      %21 = arith.addi %arg6, %arg7 : i64
+      tt.reduce.return %21 : i64
+    }) : (tensor<1x8xi64, #blocked>) -> tensor<1xi64, #triton_gpu.slice<{dim = 1, parent = #blocked}>>
+    %14 = tt.expand_dims %13 {axis = 1 : i32} : (tensor<1xi64, #triton_gpu.slice<{dim = 1, parent = #blocked}>>) -> tensor<1x1xi64, #blocked>
+    %15 = arith.sitofp %14 : tensor<1x1xi64, #blocked> to tensor<1x1xf32, #blocked>
+    %16 = arith.divf %11, %15 : tensor<1x1xf32, #blocked>
+    %17 = tt.addptr %arg3, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %18 = tt.splat %17 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>, #blocked>
+    tt.store %18, %15 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32, #blocked>
+    gpu.barrier
+    %19 = tt.addptr %arg0, %c0_i32 : !tt.ptr<f32, 1>, i32
+    %20 = tt.splat %19 : (!tt.ptr<f32, 1>) -> tensor<1x1x!tt.ptr<f32, 1>, #blocked>
+    tt.store %20, %16 {cache = 1 : i32, evict = 1 : i32} : tensor<1x1xf32, #blocked>
+    tt.return
+  }
+}
diff --git a/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.cubin b/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.cubin
new file mode 100644
index 0000000000000000000000000000000000000000..8065d9bcae79bef5b26b1ccd85503cfcd65f2b08
Binary files /dev/null and b/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.cubin differ
diff --git a/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.llir b/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.llir
new file mode 100644
index 0000000000000000000000000000000000000000..7d35d664f3e204543640709a5ab46cbab604c8a5
--- /dev/null
+++ b/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.llir
@@ -0,0 +1,134 @@
+; ModuleID = 'LLVMDialectModule'
+source_filename = "LLVMDialectModule"
+
+@assertFunc_0 = internal constant [25 x i8] c"_call_with_frames_removed"
+@assertFile_0 = internal constant [38 x i8] c"<frozen importlib._bootstrap_external>"
+@assertMessage_0 = internal constant [38 x i8] c"index out of bounds: 0 <= tmp7 < 50257"
+@global_smem = external local_unnamed_addr addrspace(3) global [0 x i8]
+
+declare void @__assertfail(ptr, ptr, i32, ptr, i64) local_unnamed_addr
+
+define void @triton__0d1d2de(ptr addrspace(1) %0, ptr addrspace(1) %1, i64 %2) local_unnamed_addr !dbg !7 {
+  %4 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x(), !dbg !10
+  %5 = and i32 %4, 127, !dbg !10
+  %6 = shl nuw nsw i32 %5, 1, !dbg !10
+  %7 = or i32 %6, 1, !dbg !10
+  %8 = tail call i32 asm "mov.u32 $0, %ctaid.x;", "=r"() #2, !dbg !11
+  %9 = sext i32 %8 to i64, !dbg !12
+  %10 = shl nsw i64 %9, 8, !dbg !13
+  %11 = zext nneg i32 %6 to i64
+  %12 = or i64 %10, %11, !dbg !14
+  %13 = getelementptr i64, ptr addrspace(1) %0, i64 %12, !dbg !15
+  %14 = tail call { i64, i64 } asm sideeffect "mov.u64 $0, 0x0;\0A\09mov.u64 $1, 0x0;\0A\09@$3 ld.global.v2.b64 { $0, $1 }, [ $2 + 0 ];", "=l,=l,l,b"(ptr addrspace(1) %13, i1 true) #2, !dbg !16
+  %15 = extractvalue { i64, i64 } %14, 0, !dbg !16
+  %16 = extractvalue { i64, i64 } %14, 1, !dbg !16
+  %17 = insertelement <2 x i64> poison, i64 %16, i64 0, !dbg !17
+  %18 = insertelement <2 x i64> %17, i64 %15, i64 1, !dbg !17
+  %19 = icmp eq <2 x i64> %18, <i64 -1, i64 -1>, !dbg !17
+  %20 = select <2 x i1> %19, <2 x i64> zeroinitializer, <2 x i64> %18, !dbg !18
+  %21 = add <2 x i64> %20, <i64 50257, i64 50257>, !dbg !19
+  %22 = icmp slt <2 x i64> %20, zeroinitializer, !dbg !20
+  %23 = select <2 x i1> %22, <2 x i64> %21, <2 x i64> %20, !dbg !21
+  %24 = icmp ult <2 x i64> %23, <i64 50257, i64 50257>, !dbg !22
+  %25 = getelementptr i8, ptr addrspace(3) @global_smem, i64 %11, !dbg !22
+  %26 = extractelement <2 x i1> %24, i64 1, !dbg !22
+  %27 = zext i1 %26 to i8, !dbg !22
+  %28 = insertelement <1 x i8> undef, i8 %27, i64 0, !dbg !22
+  store <1 x i8> %28, ptr addrspace(3) %25, align 1, !dbg !22
+  %29 = zext nneg i32 %7 to i64, !dbg !22
+  %30 = getelementptr i8, ptr addrspace(3) @global_smem, i64 %29, !dbg !22
+  %31 = extractelement <2 x i1> %24, i64 0, !dbg !22
+  %32 = zext i1 %31 to i8, !dbg !22
+  %33 = insertelement <1 x i8> undef, i8 %32, i64 0, !dbg !22
+  store <1 x i8> %33, ptr addrspace(3) %30, align 1, !dbg !22
+  tail call void @llvm.nvvm.barrier0(), !dbg !22
+  %34 = zext nneg i32 %5 to i64, !dbg !22
+  %35 = getelementptr i8, ptr addrspace(3) @global_smem, i64 %34, !dbg !22
+  %36 = load i8, ptr addrspace(3) %35, align 1, !dbg !22
+  %.not2 = icmp eq i8 %36, 0, !dbg !22
+  %37 = or i32 %5, 128, !dbg !22
+  %38 = zext nneg i32 %37 to i64, !dbg !22
+  %39 = getelementptr i8, ptr addrspace(3) @global_smem, i64 %38, !dbg !22
+  %40 = load i8, ptr addrspace(3) %39, align 1, !dbg !22
+  %.not3 = icmp eq i8 %40, 0, !dbg !22
+  %41 = or i1 %.not2, %.not3, !dbg !23
+  br i1 %41, label %42, label %43, !dbg !23
+
+42:                                               ; preds = %3
+  tail call void @__assertfail(ptr nonnull @assertMessage_0, ptr nonnull @assertFile_0, i32 883, ptr nonnull @assertFunc_0, i64 1), !dbg !23
+  br label %43, !dbg !23
+
+43:                                               ; preds = %42, %3
+  %44 = or i64 %10, %29, !dbg !14
+  %45 = mul nsw i64 %12, 50257, !dbg !24
+  %46 = mul nsw i64 %44, 50257, !dbg !24
+  %47 = extractelement <2 x i64> %23, i64 1, !dbg !25
+  %48 = getelementptr float, ptr addrspace(1) %1, i64 %47, !dbg !25
+  %49 = getelementptr float, ptr addrspace(1) %48, i64 %45, !dbg !25
+  %50 = extractelement <2 x i64> %23, i64 0, !dbg !25
+  %51 = getelementptr float, ptr addrspace(1) %1, i64 %50, !dbg !25
+  %52 = getelementptr float, ptr addrspace(1) %51, i64 %46, !dbg !25
+  tail call void @llvm.nvvm.barrier0(), !dbg !26
+  %53 = getelementptr i64, ptr addrspace(3) @global_smem, i64 %11, !dbg !26
+  %54 = ptrtoint ptr addrspace(1) %49 to i64, !dbg !26
+  %55 = insertelement <1 x i64> undef, i64 %54, i64 0, !dbg !26
+  store <1 x i64> %55, ptr addrspace(3) %53, align 8, !dbg !26
+  %56 = getelementptr i64, ptr addrspace(3) @global_smem, i64 %29, !dbg !26
+  %57 = ptrtoint ptr addrspace(1) %52 to i64, !dbg !26
+  %58 = insertelement <1 x i64> undef, i64 %57, i64 0, !dbg !26
+  store <1 x i64> %58, ptr addrspace(3) %56, align 8, !dbg !26
+  tail call void @llvm.nvvm.barrier0(), !dbg !26
+  %59 = getelementptr i64, ptr addrspace(3) @global_smem, i64 %34, !dbg !26
+  %60 = load i64, ptr addrspace(3) %59, align 8, !dbg !26
+  %61 = inttoptr i64 %60 to ptr addrspace(1), !dbg !26
+  %62 = getelementptr i64, ptr addrspace(3) @global_smem, i64 %38, !dbg !26
+  %63 = load i64, ptr addrspace(3) %62, align 8, !dbg !26
+  %64 = inttoptr i64 %63 to ptr addrspace(1), !dbg !26
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 -1082130432, ptr addrspace(1) %61, i1 true) #2, !dbg !26
+  tail call void asm sideeffect "@$2 st.global.b32 [ $1 + 0 ], { $0 };", "r,l,b"(i32 -1082130432, ptr addrspace(1) %64, i1 true) #2, !dbg !26
+  ret void, !dbg !27
+}
+
+; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare noundef i32 @llvm.nvvm.read.ptx.sreg.tid.x() #0
+
+; Function Attrs: convergent nocallback nounwind
+declare void @llvm.nvvm.barrier0() #1
+
+attributes #0 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+attributes #1 = { convergent nocallback nounwind }
+attributes #2 = { nounwind }
+
+!llvm.module.flags = !{!0, !1}
+!llvm.dbg.cu = !{!2}
+!nvvm.annotations = !{!4, !5, !5, !4}
+!llvm.ident = !{!6}
+
+!0 = !{i32 2, !"Debug Info Version", i32 3}
+!1 = !{i32 4, !"nvvm-reflect-ftz", i32 1}
+!2 = distinct !DICompileUnit(language: DW_LANG_C, file: !3, producer: "triton", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!3 = !DIFile(filename: "chlrkgpvvbdizdz7sllquet2j7zhtes6meh6kenrqxov26mswvw7.py", directory: "/tmp/torchinductor_root/hl")
+!4 = !{ptr @triton__0d1d2de, !"kernel", i32 1}
+!5 = !{ptr @triton__0d1d2de, !"maxntidx", i32 128}
+!6 = !{!"clang version 3.8.0 (tags/RELEASE_380/final)"}
+!7 = distinct !DISubprogram(name: "triton__0d1d2de", linkageName: "triton__0d1d2de", scope: !3, file: !3, line: 18, type: !8, scopeLine: 18, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !2)
+!8 = !DISubroutineType(cc: DW_CC_normal, types: !9)
+!9 = !{}
+!10 = !DILocation(line: 21, column: 36, scope: !7)
+!11 = !DILocation(line: 20, column: 28, scope: !7)
+!12 = !DILocation(line: 20, column: 34, scope: !7)
+!13 = !DILocation(line: 20, column: 46, scope: !7)
+!14 = !DILocation(line: 21, column: 23, scope: !7)
+!15 = !DILocation(line: 24, column: 30, scope: !7)
+!16 = !DILocation(line: 24, column: 35, scope: !7)
+!17 = !DILocation(line: 26, column: 19, scope: !7)
+!18 = !DILocation(line: 28, column: 32, scope: !7)
+!19 = !DILocation(line: 29, column: 18, scope: !7)
+!20 = !DILocation(line: 30, column: 18, scope: !7)
+!21 = !DILocation(line: 31, column: 32, scope: !7)
+!22 = !DILocation(line: 32, column: 36, scope: !7)
+!23 = !DILocation(line: 32, column: 51, scope: !7)
+!24 = !DILocation(line: 34, column: 39, scope: !7)
+!25 = !DILocation(line: 34, column: 25, scope: !7)
+!26 = !DILocation(line: 34, column: 51, scope: !7)
+!27 = !DILocation(line: 34, column: 4, scope: !7)
diff --git a/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.ttir b/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.ttir
new file mode 100644
index 0000000000000000000000000000000000000000..3f80af9caa3187de22ad852edbfbf906075a2e30
--- /dev/null
+++ b/.triton/dump/f5d48c7e9f2699ef21617a065eeff857/triton_.ttir
@@ -0,0 +1,34 @@
+module {
+  tt.func public @triton__0d1d2de(%arg0: !tt.ptr<i64, 1> {tt.divisibility = 16 : i32}, %arg1: !tt.ptr<f32, 1> {tt.divisibility = 16 : i32}, %arg2: i64 {tt.divisibility = 16 : i32, tt.max_divisibility = 16 : i32}) attributes {noinline = false} {
+    %cst = arith.constant dense<50257> : tensor<256xi64>
+    %cst_0 = arith.constant dense<0> : tensor<256xi64>
+    %c256_i64 = arith.constant 256 : i64
+    %cst_1 = arith.constant dense<-1.000000e+00> : tensor<256xf32>
+    %cst_2 = arith.constant dense<-1> : tensor<256xi64>
+    %0 = tt.get_program_id x : i32
+    %1 = arith.extsi %0 : i32 to i64
+    %2 = arith.muli %1, %c256_i64 : i64
+    %3 = tt.make_range {end = 256 : i32, start = 0 : i32} : tensor<256xi32>
+    %4 = arith.extsi %3 : tensor<256xi32> to tensor<256xi64>
+    %5 = tt.splat %2 : (i64) -> tensor<256xi64>
+    %6 = arith.addi %5, %4 : tensor<256xi64>
+    %7 = tt.splat %arg0 : (!tt.ptr<i64, 1>) -> tensor<256x!tt.ptr<i64, 1>>
+    %8 = tt.addptr %7, %6 : tensor<256x!tt.ptr<i64, 1>>, tensor<256xi64>
+    %9 = tt.load %8 {cache = 1 : i32, evict = 1 : i32, isVolatile = false} : tensor<256xi64>
+    %10 = arith.cmpi ne, %9, %cst_2 : tensor<256xi64>
+    %11 = arith.select %10, %9, %cst_0 : tensor<256xi1>, tensor<256xi64>
+    %12 = arith.addi %11, %cst : tensor<256xi64>
+    %13 = arith.cmpi slt, %11, %cst_0 : tensor<256xi64>
+    %14 = arith.select %13, %12, %11 : tensor<256xi1>, tensor<256xi64>
+    %15 = arith.cmpi sge, %14, %cst_0 : tensor<256xi64>
+    %16 = arith.cmpi slt, %14, %cst : tensor<256xi64>
+    %17 = arith.andi %15, %16 : tensor<256xi1>
+    tt.assert %17, "index out of bounds: 0 <= tmp7 < 50257", "<frozen importlib._bootstrap_external>", "_call_with_frames_removed", 883 : tensor<256xi1>
+    %18 = arith.muli %6, %cst : tensor<256xi64>
+    %19 = arith.addi %14, %18 : tensor<256xi64>
+    %20 = tt.splat %arg1 : (!tt.ptr<f32, 1>) -> tensor<256x!tt.ptr<f32, 1>>
+    %21 = tt.addptr %20, %19 : tensor<256x!tt.ptr<f32, 1>>, tensor<256xi64>
+    tt.store %21, %cst_1 {cache = 1 : i32, evict = 1 : i32} : tensor<256xf32>
+    tt.return
+  }
+}